1. 08 Jan, 2014 4 commits
  2. 07 Jan, 2014 1 commit
  3. 04 Jan, 2014 4 commits
  4. 03 Jan, 2014 1 commit
  5. 02 Jan, 2014 3 commits
    • Jingoo Han's avatar
      PCI: designware: Fix indent code style · 58275f2f
      Jingoo Han authored
      Fix indent code style and replace 'MSI interrupt controller' of comment
      with 'MSI controller' to fix the following checkpatch issues:
      
        ERROR: code indent should use tabs where possible
        WARNING: please, no spaces at the start of a line
        WARNING: line over 80 characters
      Signed-off-by: default avatarJingoo Han <jg1.han@samsung.com>
      Signed-off-by: default avatarBjorn Helgaas <bhelgaas@google.com>
      58275f2f
    • Jingoo Han's avatar
      PCI: mvebu: Use max_t() instead of max(resource_size_t,) · 06489002
      Jingoo Han authored
      Use max_t() instead of max(resource_size_t,) in order to fix
      the following checkpatch warning.
      
        WARNING: max() should probably be max_t(resource_size_t, SZ_64K, size)
        WARNING: max() should probably be max_t(resource_size_t, SZ_1M, size)
      Signed-off-by: default avatarJingoo Han <jg1.han@samsung.com>
      Signed-off-by: default avatarBjorn Helgaas <bhelgaas@google.com>
      Acked-by: default avatarJason Cooper <jason@lakedaemon.net>
      06489002
    • Thomas Petazzoni's avatar
      PCI: mvebu: Call pci_ioremap_io() at startup instead of dynamically · 31e45ec3
      Thomas Petazzoni authored
      The mvebu PCI host controller driver uses an emulated PCI-to-PCI bridge to
      leverage the core PCI kernel enumeration logic to dynamically create and
      remove the MBus windows needed to access the memory and I/O regions of each
      PCI interface.
      
      In the context of this PCI-to-PCI bridge emulation, the driver emulates
      all reads and writes to the PCI bridge registers.  Upon a write to the
      registers configuring the I/O base and limit, the driver was creating the
      MBus window and calling pci_ioremap_io() to setup the mapping.
      
      However, it turns out that accesses to these registers are made in an IRQ
      disabled context, while pci_ioremap_io() is a potentially sleeping
      function.  Not only this is wrong, but it is causing fairly loud warnings
      at boot time when the appropriate kernel hacking options are enabled.
      
      This patch solves this by moving the pci_ioremap_io() call to the startup
      of the driver.  At this point, we don't know how many PCI interfaces will
      be enabled, so we are simply remapping the entire PCI I/O space to virtual
      addresses.  This is reasonable since this I/O space is limited to 1 MB in
      size, and also because the MBus windows continue to be created in a dynamic
      fashion only when devices need them.
      Signed-off-by: default avatarThomas Petazzoni <thomas.petazzoni@free-electrons.com>
      Signed-off-by: default avatarBjorn Helgaas <bhelgaas@google.com>
      31e45ec3
  6. 20 Dec, 2013 14 commits
  7. 19 Dec, 2013 11 commits
    • Greg Kroah-Hartman's avatar
      PCI/MSI: Export MSI mode using attributes, not kobjects · 1c51b50c
      Greg Kroah-Hartman authored
      The PCI MSI sysfs code is a mess with kobjects for things that don't really
      need to be kobjects.  This patch creates attributes dynamically for the MSI
      interrupts instead of using kobjects.
      
      Note, this removes a directory from sysfs.  Old MSI kobjects:
      
        pci_device
           └── msi_irqs
               └── 40
                   └── mode
      
      New MSI attributes:
      
        pci_device
           └── msi_irqs
               └── 40
      
      As there was only one file "mode" with the kobject model, the interrupt
      number is now a file that returns the "mode" of the interrupt (msi vs.
      msix).
      Signed-off-by: default avatarGreg Kroah-Hartman <gregkh@linuxfoundation.org>
      Signed-off-by: default avatarBjorn Helgaas <bhelgaas@google.com>
      Acked-by: default avatarNeil Horman <nhorman@tuxdriver.com>
      1c51b50c
    • Bjorn Helgaas's avatar
      PCI/portdrv: Remove extra get_device()/put_device() for pcie_device · e75f34ce
      Bjorn Helgaas authored
      Previously pcie_device_init() called get_device() if device_register() for
      the new pcie_device succeeded, and remove_iter() called put_device() when
      removing before unregistering the device.
      
      But device_register() already increments the reference count in
      device_add(), so we don't need to do it again here.
      Signed-off-by: default avatarBjorn Helgaas <bhelgaas@google.com>
      e75f34ce
    • Levente Kurusa's avatar
      PCI/portdrv: Add put_device() after device_register() failure · f3986205
      Levente Kurusa authored
      This is required so that we give up the last reference to the device.
      Removed the kfree() as put_device will result in release_pcie_device()
      being called and hence the container of the device will be kfree'd.
      
      [bhelgaas: fix conflict after my previous cleanup]
      Signed-off-by: default avatarLevente Kurusa <levex@linux.com>
      Signed-off-by: default avatarBjorn Helgaas <bhelgaas@google.com>
      f3986205
    • Bjorn Helgaas's avatar
      PCI/portdrv: Cleanup error paths · 8f3acca9
      Bjorn Helgaas authored
      Make the straightline path the normal no-error path.  Check for errors and
      return them directly, instead of checking for success and putting the
      normal path in an "if" body.
      
      No functional change.
      Signed-off-by: default avatarBjorn Helgaas <bhelgaas@google.com>
      8f3acca9
    • Sachin Kamat's avatar
      PCI: mvebu: Remove redundant of_match_ptr · 339135ff
      Sachin Kamat authored
      mvebu_pcie_of_match_table is always compiled in.  Hence of_match_ptr is not
      required.
      Signed-off-by: default avatarSachin Kamat <sachin.kamat@linaro.org>
      Signed-off-by: default avatarBjorn Helgaas <bhelgaas@google.com>
      Acked-by: default avatarThomas Petazzoni <thomas.petazzoni@free-electrons.com>
      339135ff
    • Richard Zhu's avatar
      PCI: imx6: Fix bugs in PCIe startup code · bc9ef770
      Richard Zhu authored
      LTSSM shouldn't be set once in assert_core_reset().  Move peripheral reset
      just before LTSSM start.
      Signed-off-by: default avatarRichard Zhu <r65037@freescale.com>
      Signed-off-by: default avatarBjorn Helgaas <bhelgaas@google.com>
      Acked-by: default avatarShawn Guo <shawn.guo@linaro.org>
      Cc: Frank Li <lznuaa@gmail.com>
      Cc: Harro Haan <hrhaan@gmail.com>
      Cc: Jingoo Han <jg1.han@samsung.com>
      Cc: Mohit KUMAR <Mohit.KUMAR@st.com>
      Cc: Pratyush Anand <pratyush.anand@st.com>
      Cc: Richard Zhu <r65037@freescale.com>
      Cc: Sascha Hauer <s.hauer@pengutronix.de>
      Cc: Sean Cross <xobs@kosagi.com>
      Cc: Siva Reddy Kallam <siva.kallam@samsung.com>
      Cc: Srikanth T Shivanand <ts.srikanth@samsung.com>
      Cc: Tim Harvey <tharvey@gateworks.com>
      Cc: Troy Kisky <troy.kisky@boundarydevices.com>
      Cc: Yinghai Lu <yinghai@kernel.org>
      bc9ef770
    • Marek Vasut's avatar
      PCI: imx6: Start link in Gen1 before negotiating for Gen2 mode · fa33a6d8
      Marek Vasut authored
      This patch first forces the link into Gen1 mode before starting up the link
      and, only after the link is up, start negotiating possible Gen2 mode
      operation.  This is because without such sequence, some PCIe switches are
      not detected at all.
      Signed-off-by: default avatarMarek Vasut <marex@denx.de>
      Signed-off-by: default avatarBjorn Helgaas <bhelgaas@google.com>
      Acked-by: default avatarShawn Guo <shawn.guo@linaro.org>
      Cc: Frank Li <lznuaa@gmail.com>
      Cc: Harro Haan <hrhaan@gmail.com>
      Cc: Jingoo Han <jg1.han@samsung.com>
      Cc: Mohit KUMAR <Mohit.KUMAR@st.com>
      Cc: Pratyush Anand <pratyush.anand@st.com>
      Cc: Richard Zhu <r65037@freescale.com>
      Cc: Sascha Hauer <s.hauer@pengutronix.de>
      Cc: Sean Cross <xobs@kosagi.com>
      Cc: Siva Reddy Kallam <siva.kallam@samsung.com>
      Cc: Srikanth T Shivanand <ts.srikanth@samsung.com>
      Cc: Tim Harvey <tharvey@gateworks.com>
      Cc: Troy Kisky <troy.kisky@boundarydevices.com>
      Cc: Yinghai Lu <yinghai@kernel.org>
      fa33a6d8
    • Marek Vasut's avatar
      PCI: imx6: Factor out link up wait loop · 66a60f93
      Marek Vasut authored
      Split the function that waits for the PCIe link to come up from the rest if
      the host init function.  We will find this change useful in the subsequent
      patch, since this will be called twice then.
      
      No functional change.
      
      [bhelgaas: remove useless "return;"]
      Signed-off-by: default avatarMarek Vasut <marex@denx.de>
      Signed-off-by: default avatarBjorn Helgaas <bhelgaas@google.com>
      Acked-by: default avatarShawn Guo <shawn.guo@linaro.org>
      Cc: Frank Li <lznuaa@gmail.com>
      Cc: Harro Haan <hrhaan@gmail.com>
      Cc: Jingoo Han <jg1.han@samsung.com>
      Cc: Mohit KUMAR <Mohit.KUMAR@st.com>
      Cc: Pratyush Anand <pratyush.anand@st.com>
      Cc: Richard Zhu <r65037@freescale.com>
      Cc: Sascha Hauer <s.hauer@pengutronix.de>
      Cc: Sean Cross <xobs@kosagi.com>
      Cc: Siva Reddy Kallam <siva.kallam@samsung.com>
      Cc: Srikanth T Shivanand <ts.srikanth@samsung.com>
      Cc: Tim Harvey <tharvey@gateworks.com>
      Cc: Troy Kisky <troy.kisky@boundarydevices.com>
      Cc: Yinghai Lu <yinghai@kernel.org>
      66a60f93
    • Marek Vasut's avatar
      PCI: imx6: Factor out PHY reset · 982aa234
      Marek Vasut authored
      Split the PCIe PHY reset from the link up function to make the code a
      little more structured.
      
      No functional change.
      Signed-off-by: default avatarMarek Vasut <marex@denx.de>
      Signed-off-by: default avatarBjorn Helgaas <bhelgaas@google.com>
      Acked-by: default avatarShawn Guo <shawn.guo@linaro.org>
      Cc: Frank Li <lznuaa@gmail.com>
      Cc: Harro Haan <hrhaan@gmail.com>
      Cc: Jingoo Han <jg1.han@samsung.com>
      Cc: Mohit KUMAR <Mohit.KUMAR@st.com>
      Cc: Pratyush Anand <pratyush.anand@st.com>
      Cc: Richard Zhu <r65037@freescale.com>
      Cc: Sascha Hauer <s.hauer@pengutronix.de>
      Cc: Sean Cross <xobs@kosagi.com>
      Cc: Siva Reddy Kallam <siva.kallam@samsung.com>
      Cc: Srikanth T Shivanand <ts.srikanth@samsung.com>
      Cc: Tim Harvey <tharvey@gateworks.com>
      Cc: Troy Kisky <troy.kisky@boundarydevices.com>
      Cc: Yinghai Lu <yinghai@kernel.org>
      982aa234
    • Marek Vasut's avatar
      PCI: imx6: Report "link up" only after link training completes · 7f9f40c0
      Marek Vasut authored
      While waiting for the PHY to report the PCIe link is up, we might hit a
      situation where the link training is still in progress, while the PHY
      already reports the link is up.  Add additional check for this condition.
      Signed-off-by: default avatarMarek Vasut <marex@denx.de>
      Signed-off-by: default avatarBjorn Helgaas <bhelgaas@google.com>
      Acked-by: default avatarShawn Guo <shawn.guo@linaro.org>
      Cc: Frank Li <lznuaa@gmail.com>
      Cc: Harro Haan <hrhaan@gmail.com>
      Cc: Jingoo Han <jg1.han@samsung.com>
      Cc: Mohit KUMAR <Mohit.KUMAR@st.com>
      Cc: Pratyush Anand <pratyush.anand@st.com>
      Cc: Richard Zhu <r65037@freescale.com>
      Cc: Sascha Hauer <s.hauer@pengutronix.de>
      Cc: Sean Cross <xobs@kosagi.com>
      Cc: Siva Reddy Kallam <siva.kallam@samsung.com>
      Cc: Srikanth T Shivanand <ts.srikanth@samsung.com>
      Cc: Tim Harvey <tharvey@gateworks.com>
      Cc: Troy Kisky <troy.kisky@boundarydevices.com>
      Cc: Yinghai Lu <yinghai@kernel.org>
      7f9f40c0
    • Marek Vasut's avatar
      PCI: imx6: Make reset-gpio optional · c28f8a1f
      Marek Vasut authored
      Some boards do not have a PCIe reset GPIO.  To avoid probe failure on these
      boards, make the reset GPIO optional as well.
      
      [bhelgaas: whitespace fixes]
      Signed-off-by: default avatarMarek Vasut <marex@denx.de>
      Signed-off-by: default avatarBjorn Helgaas <bhelgaas@google.com>
      Reviewed-by: default avatarJingoo Han <jg1.han@samsung.com>
      Acked-by: default avatarShawn Guo <shawn.guo@linaro.org>
      Cc: Frank Li <lznuaa@gmail.com>
      Cc: Harro Haan <hrhaan@gmail.com>
      Cc: Mohit KUMAR <Mohit.KUMAR@st.com>
      Cc: Pratyush Anand <pratyush.anand@st.com>
      Cc: Richard Zhu <r65037@freescale.com>
      Cc: Sascha Hauer <s.hauer@pengutronix.de>
      Cc: Sean Cross <xobs@kosagi.com>
      Cc: Siva Reddy Kallam <siva.kallam@samsung.com>
      Cc: Srikanth T Shivanand <ts.srikanth@samsung.com>
      Cc: Tim Harvey <tharvey@gateworks.com>
      Cc: Troy Kisky <troy.kisky@boundarydevices.com>
      Cc: Yinghai Lu <yinghai@kernel.org>
      c28f8a1f
  8. 18 Dec, 2013 2 commits
    • Bjorn Helgaas's avatar
      Merge branch 'pci/vc' into next · 608235a3
      Bjorn Helgaas authored
      * pci/vc:
        PCI: Rename PCI_VC_PORT_REG1/2 to PCI_VC_PORT_CAP1/2
        PCI: Add Virtual Channel to save/restore support
        PCI: Add support for save/restore of extended capabilities
        PCI: Add pci_wait_for_pending() (refactor pci_wait_for_pending_transaction())
      608235a3
    • Bjorn Helgaas's avatar
      Merge branch 'pci/pciehp' into next · a737f76b
      Bjorn Helgaas authored
      * pci/pciehp:
        PCI: pciehp: Move Attention & Power Indicator support tests to accessors
        PCI: pciehp: Use symbolic constants for Slot Control fields
        PCI: pciehp: Use symbolic constants, not hard-coded bitmask
        PCI: pciehp: Simplify "Power Fault Detected" checking/clearing
        PCI: pciehp: Announce slot capabilities (slot #, button, LEDs, etc)
        PCI: pciehp: Make various functions void since they can't fail
        PCI: pciehp: Remove error checks when accessing PCIe Capability
        PCI: pciehp: Drop pciehp_readw()/pciehp_writew() wrappers
      a737f76b