- 24 Jan, 2023 6 commits
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Dmitry Baryshkov authored
Describe DSI supplies used on apq8064 (vdda-supply) and msm8994/96 (vcca-supply). Signed-off-by:
Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Acked-by:
Rob Herring <robh@kernel.org> Patchwork: https://patchwork.freedesktop.org/patch/518810/ Link: https://lore.kernel.org/r/20230118032432.1716616-5-dmitry.baryshkov@linaro.orgSigned-off-by:
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Dmitry Baryshkov authored
Some platforms might use less than full 4 lanes DSI interface. Allow using any amount of lanes starting from 1 up to 4. Signed-off-by:
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Dmitry Baryshkov authored
APQ8064 requires listing four clocks in the assigned-clocks / assigned-clock-parents properties. Account for that. Signed-off-by:
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Dmitry Baryshkov authored
Stop mentioning #address-cells/#size-cells which are defined in display/dsi-controller.yaml. Use unevaluatedProperties instead of additionalProperties to allow skipping properties defined in other schema files. Signed-off-by:
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Bryan O'Donoghue authored
Each compatible has a different set of clocks which are associated with it. Add in the list of clocks for each compatible. Acked-by:
Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by:
Bryan O'Donoghue <bryan.odonoghue@linaro.org> Patchwork: https://patchwork.freedesktop.org/patch/519080/ Link: https://lore.kernel.org/r/20230118171621.102694-3-bryan.odonoghue@linaro.orgSigned-off-by:
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Bryan O'Donoghue authored
Currently we do not differentiate between the various users of the qcom,mdss-dsi-ctrl. The driver is flexible enough to operate from one compatible string but, the hardware does have some significant differences in the number of clocks. To facilitate documenting the clocks add the following compatible strings - qcom,apq8064-dsi-ctrl - qcom,msm8916-dsi-ctrl - qcom,msm8953-dsi-ctrl - qcom,msm8974-dsi-ctrl - qcom,msm8996-dsi-ctrl - qcom,msm8998-dsi-ctrl - qcom,sc7180-dsi-ctrl - qcom,sc7280-dsi-ctrl - qcom,sdm660-dsi-ctrl - qcom,sdm845-dsi-ctrl - qcom,sm8150-dsi-ctrl - qcom,sm8250-dsi-ctrl - qcom,sm8350-dsi-ctrl - qcom,sm8450-dsi-ctrl - qcom,sm8550-dsi-ctrl - qcom,qcm2290-dsi-ctrl Deprecate qcom,dsi-ctrl-6g-qcm2290 in favour of the desired format while we do so. Several MDSS yaml files exist which document the dsi sub-node. For each existing SoC MDSS yaml, provide the right dsi compat string. Acked-by:
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- 22 Jan, 2023 18 commits
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Dmitry Baryshkov authored
Merge display-related changes targeting Qualcomm DRM MSM driver. Notable changes: DPU, DSI, MDSS: - Support for SM8350, SM8450 SM8550 and SC8280XP platform Core: - Added bindings for SM8150 (driver support already present) DPU: - Partial support for DSC on SM8150 and SM8250 - Fixed color transformation matrix being lost on suspend/resume DP: - Support for DP on SDM845 and SC8280XP platforms - HPD fixes - Support for limiting DP link rate via DT property, this enables support for HBR3 rates. DSI: - Validate display modes according to the DSI OPP table - DSI PHY support for the SM6375 platform - Fixed byte intf clock selection for 14nm PHYs MDP5: - Schema conversion to YAML Misc fixes as usual Signed-off-by:
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Dmitry Baryshkov authored
Merge branches 'msm-next-lumag-core', 'msm-next-lumag-dpu', 'msm-next-lumag-dp', 'msm-next-lumag-dsi', 'msm-next-lumag-hdmi', 'msm-next-lumag-mdp5' and 'msm-next-lumag-mdp4' into msm-next-lumag DPU, DSI, MDSS: - Support for SM8350, SM8450 SM8550 and SC8280XP platform Core: - Added bindings for SM8150 (driver support already present) DPU: - Partial support for DSC on SM8150 and SM8250 - Fixed color transformation matrix being lost on suspend/resume DP: - Support for DP on SDM845 and SC8280XP platforms - HPD fixes - Support for limiting DP link rate via DT property, this enables support for HBR3 rates. DSI: - Validate display modes according to the DSI OPP table - DSI PHY support for the SM6375 platform - Fixed byte intf clock selection for 14nm PHYs MDP5: - Schema conversion to YAML Misc fixes as usual Signed-off-by: -
Konrad Dybcio authored
v2.5.0 support was originally added for SC7280, but this hw is also present on SM8350, which has one more DSI host. Bump up the dsi count and fill in the register of the secondary host to allow it to probe. This should not have any adverse effects on SC7280, as the secondary CTRL will only be touched if it's defined, anyway. Fixes: 65c391b3 ("drm/msm/dsi: Add DSI support for SC7280") Signed-off-by:
Konrad Dybcio <konrad.dybcio@linaro.org> Reviewed-by:
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Dmitry Baryshkov authored
According to the vendor kernel, byte intf clock rate should be a half of the byte clock only when DSI PHY version is above 2.0 (in other words, 10nm PHYs and later) and only if PHY is used in D-PHY mode. Currently MSM DSI code handles only the second part of the clause (C-PHY vs D-PHY), skipping DSI PHY version check, which causes issues on some of 14nm DSI PHY platforms (e.g. qcm2290). Move divisor selection to DSI PHY code, pass selected divisor through shared timings and set byte intf clock rate accordingly. Cc: Loic Poulain <loic.poulain@linaro.org> Signed-off-by:
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Bryan O'Donoghue authored
When converting from .txt to .yaml we didn't include descriptions for the existing regulator supplies. - vdd - vdda - vddio Add those descriptions into the yaml now as they were prior to the conversion. In the .txt description we marked these regulators as required, however, that requirement appears to have been in error. Taking the example of sc7180-trogdor-wormdingler.dtsi. The avdd and avee come from GPIO controlled external regulators, not the SoC and in this case there's no need for vddio to power an I/O bus. Similarly the regulators for the LCD are controlled by the panel driver not by the dsi-ctrl driver. It would be possible to connect a different type of panel to the DSI bus here in which case we may or may not want to make use of vdd, vdda or vddio. This is also the case for older chipsets like apq8064, msm8916 etc the vdd* regulators in the dsi-ctrl block are helpers not dependencies. Add the description of vdd, vdda and vddio back in for the existing upstream dts where vdd, vdda or vddio are already declared but, don't declare those regulators required - they are not SoC requirements. Fixes: 4dbe55c9 ("dt-bindings: msm: dsi: add yaml schemas for DSI bindings") Acked-by:
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Konrad Dybcio authored
On some SoCs (hello SM6375) vdds-supply is not wired to any smd-rpm or rpmh regulator, but instead powered by the VDD_MX/mx.lvl line, which is voted for in the DSI ctrl node. Signed-off-by:
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Konrad Dybcio authored
SM6375 uses a boring standard 7nm PHY. Add a configuration entry for it. Signed-off-by:
Konrad Dybcio <konrad.dybcio@somainline.org> Signed-off-by:
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Konrad Dybcio authored
SM6375 has a single 7nm DSI PHY. Document it. Signed-off-by:
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Abhinav Kumar authored
Currently there is no protection against a user trying to set an unsupported mode on DSI. Implement a check based on the opp table whether the byte clock for the mode can be supported by validating whether an opp table entry exists. For devices which have not added opp table support yet, skip this check otherwise it will break bootup on those devices. changes in v3: - make the comment shorter - handle all errors except ENODEV Closes: https://gitlab.freedesktop.org/drm/msm/-/issues/15Reported-by:
Rob Clark <robdclark@gmail.com> Signed-off-by:
Abhinav Kumar <quic_abhinavk@quicinc.com> Reviewed-by:
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Abhinav Kumar authored
Re-arrange the dsi_calc_pclk method to two helpers, one to compute the DSI byte clk and the other to compute the pclk. This makes the separation of the two clean and also allows clients to compute and use the dsi byte clk separately. changes in v2: - move the assignments to definition lines Signed-off-by:
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Jiasheng Jiang authored
Drop the redundant fail label and change the "goto fail" into "return ret" since they are the same. Reviewed-by:
Doug Anderson <dianders@chromium.org> Signed-off-by:
Jiasheng Jiang <jiasheng@iscas.ac.cn> Reviewed-by:
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Jiasheng Jiang authored
Add check for the return value of alloc_ordered_workqueue as it may return NULL pointer and cause NULL pointer dereference. Signed-off-by:
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Neil Armstrong authored
Add support for DSI 2.7.0 (block used on sm8550). Signed-off-by:
Neil Armstrong <neil.armstrong@linaro.org> Reviewed-by:
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Neil Armstrong authored
SM8550 use a 4nm DSI PHYs, which share register definitions with 7nm DSI PHYs. Rather than duplicating the driver, handle 4nm variant inside the common 5+7nm driver. Signed-off-by:
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Neil Armstrong authored
Document the SM8550 DSI PHY which is very close from the 7nm and 5nm DSI PHYs found in earlier platforms. Acked-by:
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Adam Skladowski authored
Document omitted 28nm compatible which will be used on MSM8976 SoC. Signed-off-by:
Adam Skladowski <a39.skl@gmail.com> Acked-by:
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Dmitry Baryshkov authored
Add support for DSI 2.6.0 (block used on sm8450). Tested-by:
Vinod Koul <vkoul@kernel.org> Reviewed-by:
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Dmitry Baryshkov authored
SM8350 and SM8450 use 5nm DSI PHYs, which share register definitions with 7nm DSI PHYs. Rather than duplicating the driver, handle 5nm variants inside the common 5+7nm driver. Co-developed-by:
Robert Foss <robert.foss@linaro.org> Signed-off-by:
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- 21 Jan, 2023 10 commits
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Jessica Zhang authored
Add a !drm_atomic_crtc_needs_modeset() check to _dpu_crtc_setup_cp_blocks() so that CTM is reapplied if the LM/DSPP blocks were reallocated during modeset or after a suspend/resume. Changes in V2: - Fixed commit message Changes in V3: - Added mention of suspend/resume case back to commit message Closes: https://gitlab.freedesktop.org/drm/msm/-/issues/23Signed-off-by:
Jessica Zhang <quic_jesszhan@quicinc.com> Reviewed-by:
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Dmitry Baryshkov authored
Correct sm8350_dpu_cfg.dma_cfg to point to sm8350_regdma rather than sm8250_regdma. Fixes: 0e91bcbb ("drm/msm/dpu: Add SM8350 to hw catalog") Signed-off-by:
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Dmitry Baryshkov authored
SC8280XP configuration missed the reg_dma configuration. We do not use regdma for now, but let's put the correct pointer anyway. Fixes: 4a352c2f ("drm/msm/dpu: Introduce SC8280XP") Signed-off-by:
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Dmitry Baryshkov authored
Describe DP and eDP devices as subdevices to the MDSS on SC8280XP platform. Fixes: 45af56bf ("dt-bindings: display/msm: Add binding for SC8280XP MDSS") Signed-off-by:
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Dmitry Baryshkov authored
Add qcom,sc8280xp-edp to the list of eDP devices, unblocking `aux-bus' property and fobidding `#sound-dai-cells' property. Also since sc8280xp-edp, overriding sc8280xp-dp, will contain 5 reg resources, drop the reg contraint (as it will become equivalent to the top-level one, requiring min 4 and max 5 reg entries). Fixes: b6f8c4de ("dt-bindings: msm/dp: Add SDM845 and SC8280XP compatibles") Signed-off-by:
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Dmitry Baryshkov authored
Describe missing dpu_encoder_phys_wb_is_master() argument and struct dpu_encoder_virt.wide_bus_en field. Signed-off-by:
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Dmitry Baryshkov authored
According to the discussion ([1]) on the mailing list, platforms before sm8250 (and derivatives) should program HDMI_DP_CORE_SELECT register to route audio to the DP ports. Enable DPU_MDP_AUDIO_SELECT on sc8180x to program correponding register. [1] https://lore.kernel.org/all/f86504ba-835a-6e30-6c30-8bb89b1359c4@quicinc.com/Signed-off-by:
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Dmitry Baryshkov authored
Rewrite dpu_hw_ctl_setup_blendstage() to use static data configuration rather than using a switch-case. This simplifies adding support for new pipes. Signed-off-by:
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Dmitry Baryshkov authored
Extract the common expression in the dpu_hw_ctl_setup_blendstage() function. Signed-off-by:
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Dmitry Baryshkov authored
SM8550 uses new register to map SSPP_DMA4 and SSPP_DMA5 units to blend stages. Add proper support for this register to allow using these two planes for image processing. Fixes: efcd0107 ("drm/msm/dpu: add support for SM8550") Cc: Neil Armstrong <neil.armstrong@linaro.org> Signed-off-by:
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- 20 Jan, 2023 5 commits
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Dmitry Baryshkov authored
Follow the 'generic names' rule and rename mdp nodes to display-controller. Reviewed-by:
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Dmitry Baryshkov authored
Follow the 'generic names' rule and rename mdss nodes to display-subsystem. Signed-off-by:
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Dmitry Baryshkov authored
Add (optional) core clock to the mdss bindings to let the MDSS driver access hardware registers before MDP driver probes. Signed-off-by:
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Dmitry Baryshkov authored
Add platform-specific compatible entries to the qcom,mdp5.yaml to allow distinguishing between various platforms. Reviewed-by:
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Dmitry Baryshkov authored
Convert the mdp5.txt into the yaml format. Changes to the existing (txt) schema: - MSM8996 has additional "iommu" clock, define it separately - Add new properties used on some of platforms: - interconnects, interconnect-names - iommus - power-domains - operating-points-v2, opp-table Reviewed-by:
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- 18 Jan, 2023 1 commit
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Bjorn Andersson authored
During initalization of the DisplayPort controller an EV_HPD_INIT_SETUP event is generated, but with a delay of 100 units. This delay existed to circumvent bug in the QMP combo PHY driver, where if the DP part was powered up before USB, the common properties would not be properly initialized - and USB wouldn't work. This issue was resolved in the recent refactoring of the QMP driver, so it's now possible to remove this delay. While there is still a timing dependency in the current implementation, test indicates that it's now possible to boot with an external display on USB Type-C and have the display power up, without disconnecting and reconnecting the cable. Signed-off-by:
Bjorn Andersson <quic_bjorande@quicinc.com> Reviewed-by:
Kuogee Hsieh <quic_khsieh@quicinc.com> Patchwork: https://patchwork.freedesktop.org/patch/518729/ Link: https://lore.kernel.org/r/20230117172951.2748456-1-quic_bjorande@quicinc.comSigned-off-by:
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