- 25 Aug, 2015 2 commits
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Rafał Miłecki authored
Using struct spi_device_id for storing list of flash devices comes from early SPI NOR framework days. Thanks to the commit 70f3ce05 ("mtd: spi-nor: make spi_nor_scan() take a chip type name, not spi_device_id") we can stop using spi_device_id and just switch to our own struct. Signed-off-by: Rafał Miłecki <zajec5@gmail.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
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Oleksij Rempel authored
Add the full description of the Toshiba TC58NVG0S3E NAND chip in the nand_ids table so that we can later use the NAND ECC info and ONFI timing mode in controller drivers. Tested with asm9260_nand driver. [Brian: driver still under review] Signed-off-by: Oleksij Rempel <linux@rempel-privat.de> Reviewed-by: Boris Brezillon <boris.brezillon@free-electrons.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
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- 22 Aug, 2015 1 commit
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Javier Martinez Canillas authored
The SPI core currently reports the MODALIAS uevent as "spi:<modalias>" even for SPI devices that were registered by OF. That means the OF module alias exported by MODULE_OF_TABLE(of,...) is currently not used and user-space has no way to autoload this module. But it is still a good practice to add the OF module alias information into the kernel module even when it currently is unused so once the SPI core is changed to report a correct OF modalias uevent, module autoloading will be working for this driver. Signed-off-by: Javier Martinez Canillas <javier@osg.samsung.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
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- 19 Aug, 2015 11 commits
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Ezequiel García authored
The read ID count should be made as large as the maximum READ_ID size, so there's no need to have dynamic size. This commit sets the hardware maximum read ID count, which should be more than enough on all cases. Also, we get rid of the read_id_bytes, and use a macro instead. Signed-off-by: Ezequiel Garcia <ezequiel@vanguardiasur.com.ar> Acked-by: Robert Jarzmik <robert.jarzmik@free.fr> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
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Robert Jarzmik authored
When 2 commands are submitted in a row, and the second is very quick, the completion of the second command might never come. This happens especially if the second command is quick, such as a status read after an erase. The issue is that in the interrupt handler, the status bits are cleared after the new command is issued. There is a small temporal window where this happens : - the previous command has set the command done bit - the ready for a command bit is set - the handler submits the next command - just then, the command completes, and the command done bit is still set - the handler clears the "previous" command done bit - the handler exits In this flow, the "command done" of the next command will never trigger a new interrupt to finish the status command, as it was cleared for both commands. Fix this by clearing the status bit before submitting a new command. Signed-off-by: Robert Jarzmik <robert.jarzmik@free.fr> Acked-by: Ezequiel Garcia <ezequiel@vanguardiasur.com.ar> Tested-by: Ezequiel Garcia <ezequiel@vanguardiasur.com.ar> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
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Robert Jarzmik authored
When the nand is first probe, and upon the first command start, the status bits should be cleared before the interrupts are unmasked. The bug is tricky : if the bootloader left a status bit set, the unmasking of interrupts does trigger the interrupt handler before the first command is issued, blocking the good behavior of the nand. The same would happen if in pxa3xx_nand code flow a status bit is left, and then a command is started. Signed-off-by: Robert Jarzmik <robert.jarzmik@free.fr> Acked-by: Ezequiel Garcia <ezequiel@vanguardiasur.com.ar> Tested-by: Ezequiel Garcia <ezequiel@vanguardiasur.com.ar> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
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Antoine Ténart authored
When keeping the configuration set by the bootloader (by using the marvell,nand-keep-config property), the pxa3xx_nand_detect_config() function is called and set the chunk size to 512 as a default value if NDCR_PAGE_SZ is not set. In the other case, when not keeping the bootloader configuration, no chunk size is set. Fix this by adding a default chunk size of 512. Fixes: 70ed8523 ("mtd: nand: pxa3xx: Introduce multiple page I/O support") Signed-off-by: Antoine Tenart <antoine.tenart@free-electrons.com> Acked-by: Robert Jarzmik <robert.jarzmik@free> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
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Axel Lin authored
Remove extra space after the "platform:" prefix and make the alias matches driver name. Signed-off-by: Axel Lin <axel.lin@ingics.com> Acked-by: Roger Quadros <rogerq@ti.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
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Colin Ian King authored
static analysis by smatch caught the following error: drivers/mtd/maps/physmap_of.c:135 of_get_probes() error: potential null dereference 'res'. (kzalloc returns null) Check for failed kzalloc and return -ENOMEM in of_flash_probe if this occurs. Signed-off-by: Colin Ian King <colin.king@canonical.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
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Alexey Khoroshilov authored
If mtd_device_register() fails in nettel_init(), iomap left mapped. The patch adds failure handling for mtd_device_register(). Found by Linux Driver Verification project (linuxtesting.org). Signed-off-by: Alexey Khoroshilov <khoroshilov@ispras.ru> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
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Andy Shevchenko authored
It is better to have device name prefixed the actual error message. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
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Andy Shevchenko authored
In recent kernels we have a lot of helper functions, including devres API, to make life of device driver developer easy. Convert the driver using devm_kzalloc() and pcim_enable_device(). Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
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Andy Shevchenko authored
Let's use module_pci_driver() macro to reduce code base of the driver. There is no functional change. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
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Andy Shevchenko authored
There is no need to user to see the core part of the driver. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
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- 14 Aug, 2015 5 commits
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Antony Pavlov authored
Spansion S25FL204K is a 4-Mbit 3.0V Serial Flash Memory with Uniform 4 kB Sectors. Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com> Acked-by: Rafał Miłecki <zajec5@gmail.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
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Fabio Estevam authored
The current "We only connect the NOR to this controller now." text is not very clear, so explain it better by saying that generic SPI is not supported by SPI_FSL_QUADSPI and only SPI NOR is. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
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Joachim Eastwood authored
Add SPI-NOR driver for the SPI Flash Interface (SPIFI) controller that is found on newer NXP MCU devices. The controller supports serial SPI Flash devices with 1-, 2- and 4-bit width in either SPI mode 0 or 3. The controller can operate in either command or memory mode. In memory mode the Flash is exposed as normal memory and can be directly accessed by the CPU. Signed-off-by: Joachim Eastwood <manabian@gmail.com> Reviewed-by: Ezequiel Garcia <ezequiel@vanguardiasur.com.ar> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
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Joachim Eastwood authored
Add device tree binding documentation for the SPI Flash Interface (SPIFI) found on NXP LPC18xx and LPC43xx devies. Signed-off-by: Joachim Eastwood <manabian@gmail.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
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Ezequiel Garcia authored
The initial buffer is used for the initial commands used to detect a flash device (STATUS, READID and PARAM). ONFI param page is 256 bytes, and there are three redundant copies to be read. JEDEC param page is 512 bytes, and there are also three redundant copies to be read. Hence this buffer should be at least 512 x 3. This commits rounds the buffer size to 2048. Signed-off-by: Ezequiel Garcia <ezequiel@vanguardiasur.com.ar> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
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- 07 Aug, 2015 1 commit
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Axel Lin authored
While IS_ENABLED() is perfectly fine for CONFIG_* symbols, it is not for other symbols such as __BIG_ENDIAN that is provided directly by the compiler. Switch to use CONFIG_CPU_BIG_ENDIAN instead of __BIG_ENDIAN. Fixes: 27c5b17c ("mtd: nand: add NAND driver "library" for Broadcom STB NAND controller") Signed-off-by: Axel Lin <axel.lin@ingics.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
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- 06 Aug, 2015 10 commits
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Frank Li authored
Erase function will use cmd 0x20 (SPINOR_OP_BE_4K) if kenrel enable option CONFIG_MTD_SPI_NOR_USE_4K_SECTORS. This command is not in fsl-quadspi driver LUT. So driver continue report fsl-quadspi 21e0000.qspi: Unsupported cmd 0x20. This patch fix this issue. Signed-off-by: Frank Li <Frank.Li@freescale.com> Acked-by: Han Xu <Han.xu@freescale.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
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Frank Li authored
The uboot may run the QuadSpi controler with command: #sf probe So we should reset the module in the probe. This patch also clear the pending interrupts which arised by the uboot code. Signed-off-by: Huang Shijie <shijie8@gmail.com> Signed-off-by: Frank Li <Frank.Li@freescale.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
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Frank Li authored
QSPI1 cannot wake up CCM from WAIT mode on SX ARD board, add pmqos to let PM NOT enter WAIT mode when accessing QSPI1, refer to TKT245618. Signed-off-by: Frank Li <Frank.Li@freescale.com> Signed-off-by: Han Xu <Han.xu@freescale.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
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Allen Xu authored
We found there is a low probability(5%) QSPI access timeout issue, usually it happened on kernel boot stage, the first time kernel tried to access QSPI chip. The READ_ID command was sent but not executed, consequently the probe function failed. The root cause is that the divider is not glitchless in i.MX6SX chip. If qspi clock enabled then change clock frequency by call clk_set_rate, there will be glitch at low possiblity rate and pass to qspi controller. The controler will be hang by this glitch. Based on the new clock flag(CLK_SET_RATE_GATE) and new framework, we need to change the approach of seting clock rate. 1. Disable clock. 2. call clk_set_rate. 3. Enable clock again. Signed-off-by: Han Xu <han.xu@freescale.com> Signed-off-by: Frank Li <Frank.Li@freescale.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
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Frank Li authored
new compatible string: "fsl,imx6ul-qspi". Signed-off-by: Frank Li <Frank.Li@freescale.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
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Frank Li authored
Add i.mx6ul chip support Signed-off-by: Frank Li <Frank.Li@freescale.com> Acked-by: Han xu <han.xu@freescale.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
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Frank Li authored
new compatible string: "fsl,imx7d-qspi" Signed-off-by: Frank Li <Frank.Li@freescale.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
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Frank Li authored
Support i.mx7d. quadspi in i.mx7d increase rxfifo. require fill at least 16byte to trigger data transfer. Signed-off-by: Frank Li <Frank.Li@freescale.com> Signed-off-by: Han Xu <han.xu@freescale.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
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Han Xu authored
add several quirk to distinguish different version of qspi module. Signed-off-by: Han Xu <han.xu@freescale.com> Signed-off-by: Frank Li <Frank.Li@freescale.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
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Han Xu authored
QSPI may failed to map enough memory (256MB) for AHB read in previous implementation, especially in 3G/1G memory layout kernel. Dynamically map memory to avoid such issue. This implementation generally map QUADSPI_MAX_IOMAP (default 4MB) memory for AHB read, it should be enough for common scenarios, and the side effect (0.6% performance drop) is minor. Previous implementation root@imx6qdlsolo:~# dd if=/dev/mtd0 of=/dev/null bs=1K count=32K 32768+0 records in 32768+0 records out 33554432 bytes (34 MB) copied, 2.16006 s, 15.5 MB/s root@imx6qdlsolo:~# dd if=/dev/mtd0 of=/dev/null bs=32M count=1 1+0 records in 1+0 records out 33554432 bytes (34 MB) copied, 1.43149 s, 23.4 MB/s After applied the patch root@imx6qdlsolo:~# dd if=/dev/mtd0 of=/dev/null bs=1K count=32K 32768+0 records in 32768+0 records out 33554432 bytes (34 MB) copied, 2.1743 s, 15.4 MB/s root@imx6qdlsolo:~# dd if=/dev/mtd0 of=/dev/null bs=32M count=1 1+0 records in 1+0 records out 33554432 bytes (34 MB) copied, 1.43158 s, 23.4 MB/s Signed-off-by: Han Xu <han.xu@freescale.com> Signed-off-by: Frank Li <Frank.Li@freescale.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
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- 21 Jul, 2015 1 commit
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Brian Norris authored
When we added the "jedec,spi-nor" compatible string for use in this driver, we added it as a modalias option. The modalias can be derived in different ways for platform devices vs. device tree (of_*) matching. But for device tree matching (the primary target of this identifier string), the modalias is determined from the first entry in the 'compatible' property. IOW, the following properties would bind to this driver: // Option (a), modalias = "spi-nor" compatible = "jedec,spi-nor"; // Option (b), modalias = "spi-nor" compatible = "idontknowwhatimdoing,spi-nor"; But the following would not: // Option (c), modalias = "shinynewdevice" compatible = "myvendor,shinynewdevice", "jedec,spi-nor"; So, we'd like to match (a) and (c) (even when we don't have an explicit entry for "shinynewdevice"), and we'd rather not allow (b). To do this, we (1) always (for devices without specific platform data) pass the modalias to the spi-nor library; (2) rework the spi-nor library to not reject "bad" names, and instead just fall back to autodetection; and (3) add the .of_match_table to properly catch all "jedec,spi-nor". This allows (a) and (c) without warnings, and rejects (b). Signed-off-by: Brian Norris <computersforpeace@gmail.com>
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- 20 Jul, 2015 6 commits
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Roy Spliet authored
Replaces the hard coded "always use EDO" policy with that prescribed by the ONFI 3.1 specification that EDO mode should always be used if tRC is below 30ns. Signed-off-by: Roy Spliet <r.spliet@ultimaker.com> Acked-by: Boris Brezillon <boris.brezillon@free-electrons.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
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Roy Spliet authored
The TIMING_CFG register was previously statically set to a magic value (extracted from Allwinner's BSP) when initializing the NAND controller. Now that we have more details about the TIMING_CFG register layout (extracted from the A83 user manual) we can dynamically calculate the appropriate value for each NAND chip and set it when selecting the chip. Signed-off-by: Roy Spliet <r.spliet@ultimaker.com> Acked-by: Boris Brezillon <boris.brezillon@free-electrons.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
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Alexey Firago authored
Micron n25q064 flash supports 4 KiB erase sectors. Signed-off-by: Alexey Firago <alexey_firago@mentor.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
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Alexander Stein authored
QUADSPI_MCR_CLR_TXF_MASK is the correct mask for clearing the TX FIFO. Signed-off-by: Alexander Stein <alexander.stein@systec-electronic.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
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Nicolas Iooss authored
r852_ecc_correct() reads a 32-bit register into a 16-bit variable, ecc_reg, but this variable is later used as if it was larger. This is reported by clang when building the kernel with many warnings: drivers/mtd/nand/r852.c:512:11: error: shift count >= width of type [-Werror,-Wshift-count-overflow] ecc_reg >>= 16; ^ ~~ Fix this by making ecc_reg 32-bit, like the return type of r852_read_reg_dword(). Signed-off-by: Nicolas Iooss <nicolas.iooss_linux@m4x.org> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
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Sandeep Paulraj authored
It is needed for k2l keystone2 EVM which uses NAND flash with 4K page size, hence add support for 4K page size nand devices. [Brian: similar work submitted by Murali Karicheri <m-karicheri2@ti.com> and Hao Zhang <hzhang@ti.com>] Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com> Signed-off-by: Ivan Khoronzhuk <ivan.khoronzhuk@ti.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
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- 07 Jul, 2015 2 commits
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Brian Norris authored
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Scott Wood authored
Commit 66507c7b ("mtd: nand: Add support to use nand_base poi databuf as bounce buffer") added a flag NAND_USE_BOUNCE_BUFFER using the same bit value as the existing NAND_BUSWIDTH_AUTO. Cc: Kamal Dasu <kdasu.kdev@gmail.com> Fixes: 66507c7b ("mtd: nand: Add support to use nand_base poi databuf as bounce buffer") Signed-off-by: Scott Wood <scottwood@freescale.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
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- 06 Jul, 2015 1 commit
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shengyong authored
Do not call free_device() in init_nandsim, the caller - ns_init_module - will take care of that if something goes wrong. Signed-off-by: Sheng Yong <shengyong1@huawei.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
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