1. 01 Nov, 2015 3 commits
  2. 31 Oct, 2015 4 commits
    • Linus Walleij's avatar
      gpio: dt-bindings: document the official use of "ngpios" · aacaffd1
      Linus Walleij authored
      There are a bunch of drivers that utilize the "ngpios" DT property
      without any vendor prefix. Try to start cleaning up the mess by
      defining what we mean by this property.
      
      Cc: devicetree@vger.kernel.org
      Cc: Pramod Kumar <pramodku@broadcom.com>
      Cc: Jonas Gorski <jogo@openwrt.org>
      Signed-off-by: default avatarLinus Walleij <linus.walleij@linaro.org>
      aacaffd1
    • Alban Bedel's avatar
      gpio: MAINTAINERS: Add an entry for the ATH79 GPIO driver · aad7a211
      Alban Bedel authored
      Add an entry for the ATH79 GPIO driver with myself as maintainer.
      Signed-off-by: default avatarAlban Bedel <albeu@free.fr>
      Signed-off-by: default avatarLinus Walleij <linus.walleij@linaro.org>
      aad7a211
    • Mika Westerberg's avatar
      gpio / ACPI: Allow shared GPIO event to be read via operation region · c103a10f
      Mika Westerberg authored
      In Microsoft Surface3 the GPIO detecting lid state is shared between GPIO
      event and operation region. Below is simplied version of the DSDT from
      Surface3 including relevant parts:
      
          Scope (GPO0)
          {
              Name (_AEI, ResourceTemplate ()
              {
                  GpioInt (Edge, ActiveBoth, Shared, PullNone, 0x0000,
                      "\\_SB.GPO0", 0x00, ResourceConsumer, ,
                      )
                      {   // Pin list
                          0x004C
                      }
              })
      
              OperationRegion (GPOR, GeneralPurposeIo, Zero, One)
              Field (GPOR, ByteAcc, NoLock, Preserve)
              {
                  Connection (
                      GpioIo (Shared, PullNone, 0x0000, 0x0000,
                          IoRestrictionNone, "\\_SB.GPO0", 0x00,
                          ResourceConsumer,,)
                          {   // Pin list
                              0x004C
                          }
                  ),
                  HELD,   1
              }
      
              Method (_E4C, 0, Serialized)  // _Exx: Edge-Triggered GPE
              {
                  If ((HELD == One))
                  {
                      ^^LID.LIDB = One
                  }
                  Else
                  {
                      ^^LID.LIDB = Zero
                      Notify (LID, 0x80) // Status Change
                  }
      
                  Notify (^^PCI0.SPI1.NTRG, One) // Device Check
              }
          }
      
      When GPIO 0x4c changes we call ASL method _E4C which tries to read HELD
      field (the same GPIO). This triggers following error on the console:
      
          ACPI Error: Method parse/execution failed [\_SB.GPO0._E4C]
              (Node ffff88013f4b4438), AE_ERROR (20150930/psparse-542)
      
      The error happens because ACPI GPIO operation region handler
      (acpi_gpio_adr_space_handler()) tries to acquire the very same GPIO which
      returns an error (-EBUSY) because the GPIO is already reserved for the GPIO
      event.
      
      Fix this so that we "borrow" the event GPIO if we find the GPIO belongs to
      an event. Allow this only for GPIOs that are read.
      
      To be able to go through acpi_gpio->events list for operation region access
      we need to make sure the list is properly initialized whenever GPIO chip is
      registered.
      
      Link: https://bugzilla.kernel.org/show_bug.cgi?id=106571Signed-off-by: default avatarMika Westerberg <mika.westerberg@linux.intel.com>
      Signed-off-by: default avatarLinus Walleij <linus.walleij@linaro.org>
      c103a10f
    • Linus Walleij's avatar
      gpio: group port-mapped I/O drivers in a menu · bc6a73bb
      Linus Walleij authored
      Create a Kconfig submenu for drivers using X86 port-mapped I/O
      and depend on X86 for this.
      Suggested-by: default avatarMika Westerberg <mika.westerberg@linux.intel.com>
      Cc: William Breathitt Gray <vilhelm.gray@gmail.com>
      Cc: Andreas Bofjall <andreas@gazonk.org>
      Cc: Diego Elio Pettenò <flameeyes@flameeyes.eu>
      Cc: Daniel Krueger <daniel.krueger@systec-electronic.com>
      Cc: Bruno Randolf <br1@einfach.org>
      Cc: Vivien Didelot <vivien.didelot@savoirfairelinux.com>
      Acked-by: default avatarSimon Guinot <simon.guinot@sequanux.org>
      Signed-off-by: default avatarLinus Walleij <linus.walleij@linaro.org>
      bc6a73bb
  3. 30 Oct, 2015 1 commit
  4. 27 Oct, 2015 6 commits
  5. 26 Oct, 2015 1 commit
    • YD Tseng's avatar
      gpio: driver for AMD Promontory · 6057d40f
      YD Tseng authored
      This patch adds a new GPIO driver for AMD Promontory chip.
      
      This GPIO controller is enumerated by ACPI and the ACPI compliant
      hardware ID is AMDF030.
      
      Change history:
      
      v2: 1. fix coding style
          2. registers renaming
      v3: 1. change include file
          2. fix coding style
          3. remove module_init/exit, add module_platform_driver
          4. remove MODULE_ALIAS
      v4: 1. change TOTAL_GPIO_PINS to PT_TOTAL_GPIO
          2. remove PCI dependency in Kconfig
          3. fix subject line
      Signed-off-by: default avatarYD Tseng <Yd_Tseng@asmedia.com.tw>
      Signed-off-by: default avatarLinus Walleij <linus.walleij@linaro.org>
      6057d40f
  6. 22 Oct, 2015 1 commit
  7. 20 Oct, 2015 1 commit
  8. 19 Oct, 2015 1 commit
  9. 16 Oct, 2015 8 commits
  10. 15 Oct, 2015 2 commits
    • Linus Walleij's avatar
      gpio: pl061: assign the apropriate handler for irqs · 26ba9cd4
      Linus Walleij authored
      The PL061 can handle level IRQs and edge IRQs, however it is
      just utilizing handle_simple_irq() for all IRQs. Inspired by
      Stefan Agners patch to vf610, this assigns the right handler
      depending on what type is set up, and after this
      handle_bad_irq() is only used as default and if the type is
      not specified, as is done in the OMAP driver: defining the
      IRQ type is really not optional for this driver.
      
      The interrupt handler was just writing the interrupt clearing
      register for all lines that were high when entering the handling
      loop, this is wrong: that register is only supposed to be
      written (on a per-line basis) for edge IRQs, so this ACK
      was moved to the .irq_ack() callback as is proper.
      
      Tested with PL061 on the ARM RealView PB11MPCore and the
      MMC/SC card detect GPIO.
      
      Cc: Jonas Gorski <jogo@openwrt.org>
      Cc: Stefan Agner <stefan@agner.ch>
      Signed-off-by: default avatarLinus Walleij <linus.walleij@linaro.org>
      26ba9cd4
    • Dan Carpenter's avatar
      gpio: pl061: returning with lock held in pl061_irq_type() · 21d4de14
      Dan Carpenter authored
      We were returning with "chip->lock" held by mistake.  It's safe to
      move the return to before we take the spinlock.
      
      Fixes: 1dbf7f29 ('gpio: pl061: detail IRQ trigger handling')
      Signed-off-by: default avatarDan Carpenter <dan.carpenter@oracle.com>
      Signed-off-by: default avatarLinus Walleij <linus.walleij@linaro.org>
      21d4de14
  11. 05 Oct, 2015 6 commits
  12. 02 Oct, 2015 6 commits
    • Thierry Reding's avatar
      gpio: pca953x: Add TI TCA9539 support · 2db8aba8
      Thierry Reding authored
      The TCA9539 is almost identical to the PCA9555 and software-compatible
      with this driver. It exposes 16 general purpose I/O pins in two 8-bit
      configurations.
      Signed-off-by: default avatarThierry Reding <treding@nvidia.com>
      Signed-off-by: default avatarLinus Walleij <linus.walleij@linaro.org>
      2db8aba8
    • Julia Lawall's avatar
      gpio: max730x: eliminate double free · 7474f23d
      Julia Lawall authored
      The function __max730x_remove is called from the remove functions of
      drivers/gpio/gpio-max7300.c and drivers/gpio/gpio-max7301.c.  In both
      cases, the probe function allocates ts using devm_kzalloc.  Explicitly
      freeing such a value with kfree will cause a double free.
      Signed-off-by: default avatarJulia Lawall <Julia.Lawall@lip6.fr>
      Reviewed-by: default avatarAlexandre Courbot <acourbot@nvidia.com>
      Signed-off-by: default avatarLinus Walleij <linus.walleij@linaro.org>
      7474f23d
    • Grygorii Strashko's avatar
      gpio: omap: convert to use generic irq handler · 450fa54c
      Grygorii Strashko authored
      This patch converts TI OMAP GPIO driver to use generic irq handler
      instead of chained IRQ handler. This way OMAP GPIO driver will be
      compatible with RT kernel where it will be forced thread IRQ handler
      while in non-RT kernel it still will be executed in HW IRQ context.
      As part of this change the IRQ wakeup configuration is applied to
      GPIO Bank IRQ as it now will be under control of IRQ PM Core during
      suspend.
      
      There are also additional benefits:
       - on-RT kernel there will be no complains any more about PM runtime usage
         in atomic context  "BUG: sleeping function called from invalid context";
       - GPIO bank IRQs will appear in /proc/interrupts and its usage statistic
          will be  visible;
       - GPIO bank IRQs could be configured through IRQ proc_fs interface and,
         as result, could be a part of IRQ balancing process if needed;
       - GPIO bank IRQs will be under control of IRQ PM Core during
         suspend to RAM.
      
      Disadvantage:
       - additional runtime overhed as call chain till
         omap_gpio_irq_handler() will be longer now
       - necessity to use wa_lock in omap_gpio_irq_handler() to W/A warning
         in handle_irq_event_percpu()
         WARNING: CPU: 1 PID: 35 at kernel/irq/handle.c:149 handle_irq_event_percpu+0x51c/0x638()
      
      This patch doesn't fully follows recommendations provided by Sebastian
      Andrzej Siewior [1], because It's required to go through and check all
      GPIO IRQ pin states as fast as possible and pass control to handle_level_irq
      or handle_edge_irq. handle_level_irq or handle_edge_irq will perform actions
      specific for IRQ triggering type and wakeup corresponding registered
      threaded IRQ handler (at least it's expected to be threaded).
      IRQs can be lost if handle_nested_irq() will be used, because excecution
      time of some pin specific GPIO IRQ handler can be very significant and
      require accessing ext. devices (I2C).
      
      Idea of such kind reworking was also discussed in [2].
      
      [1] http://www.spinics.net/lists/linux-omap/msg120665.html
      [2] http://www.spinics.net/lists/linux-omap/msg119516.htmlTested-by: default avatarTony Lindgren <tony@atomide.com>
      Tested-by: default avatarAustin Schuh <austin@peloton-tech.com>
      Signed-off-by: default avatarGrygorii Strashko <grygorii.strashko@ti.com>
      Acked-by: default avatarSantosh Shilimkar <ssantosh@kernel.org>
      Signed-off-by: default avatarLinus Walleij <linus.walleij@linaro.org>
      450fa54c
    • Grygorii Strashko's avatar
      gpio: omap: move pm runtime in irq_chip.irq_bus_lock/sync_unlock · aca82d1c
      Grygorii Strashko authored
      The PM runtime API can't be used in atomic contex on -RT even if
      it's configured as irqsafe. As result, below error report can
      be seen when PM runtime API called from IRQ chip's callbacks
      irq_startup/irq_shutdown/irq_set_type, because they are
      protected by RAW spinlock:
      
      BUG: sleeping function called from invalid context at kernel/locking/rtmutex.c:917
      in_atomic(): 1, irqs_disabled(): 128, pid: 96, name: insmod
      3 locks held by insmod/96:
       #0:  (&dev->mutex){......}, at: [<c04752c8>] __driver_attach+0x54/0xa0
       #1:  (&dev->mutex){......}, at: [<c04752d4>] __driver_attach+0x60/0xa0
       #2:  (class){......}, at: [<c00a408c>] __irq_get_desc_lock+0x60/0xa4
      irq event stamp: 1834
      hardirqs last  enabled at (1833): [<c06ab2a4>] _raw_spin_unlock_irqrestore+0x88/0x90
      hardirqs last disabled at (1834): [<c06ab068>] _raw_spin_lock_irqsave+0x2c/0x64
      softirqs last  enabled at (0): [<c003d220>] copy_process.part.52+0x410/0x19d8
      softirqs last disabled at (0): [<  (null)>]   (null)
      Preemption disabled at:[<  (null)>]   (null)
      
      CPU: 1 PID: 96 Comm: insmod Tainted: G        W  O    4.1.3-rt3-00618-g57e2387-dirty #184
      Hardware name: Generic DRA74X (Flattened Device Tree)
      [<c00190f4>] (unwind_backtrace) from [<c0014734>] (show_stack+0x20/0x24)
      [<c0014734>] (show_stack) from [<c06a62ec>] (dump_stack+0x88/0xdc)
      [<c06a62ec>] (dump_stack) from [<c006ca44>] (___might_sleep+0x198/0x2a8)
      [<c006ca44>] (___might_sleep) from [<c06ab6d4>] (rt_spin_lock+0x30/0x70)
      [<c06ab6d4>] (rt_spin_lock) from [<c04815ac>] (__pm_runtime_resume+0x68/0xa4)
      [<c04815ac>] (__pm_runtime_resume) from [<c04123f4>] (omap_gpio_irq_type+0x188/0x1d8)
      [<c04123f4>] (omap_gpio_irq_type) from [<c00a64e4>] (__irq_set_trigger+0x68/0x130)
      [<c00a64e4>] (__irq_set_trigger) from [<c00a7bc4>] (irq_set_irq_type+0x44/0x6c)
      [<c00a7bc4>] (irq_set_irq_type) from [<c00abbf8>] (irq_create_of_mapping+0x120/0x174)
      [<c00abbf8>] (irq_create_of_mapping) from [<c0577b74>] (of_irq_get+0x48/0x58)
      [<c0577b74>] (of_irq_get) from [<c0540a14>] (i2c_device_probe+0x54/0x15c)
      [<c0540a14>] (i2c_device_probe) from [<c04750dc>] (driver_probe_device+0x184/0x2c8)
      [<c04750dc>] (driver_probe_device) from [<c0475310>] (__driver_attach+0x9c/0xa0)
      [<c0475310>] (__driver_attach) from [<c0473238>] (bus_for_each_dev+0x7c/0xb0)
      [<c0473238>] (bus_for_each_dev) from [<c0474af4>] (driver_attach+0x28/0x30)
      [<c0474af4>] (driver_attach) from [<c0474760>] (bus_add_driver+0x154/0x200)
      [<c0474760>] (bus_add_driver) from [<c0476348>] (driver_register+0x88/0x108)
      [<c0476348>] (driver_register) from [<c0541600>] (i2c_register_driver+0x3c/0x90)
      [<c0541600>] (i2c_register_driver) from [<bf003018>] (pcf857x_init+0x18/0x24 [gpio_pcf857x])
      [<bf003018>] (pcf857x_init [gpio_pcf857x]) from [<c000998c>] (do_one_initcall+0x128/0x1e8)
      [<c000998c>] (do_one_initcall) from [<c06a4220>] (do_init_module+0x6c/0x1bc)
      [<c06a4220>] (do_init_module) from [<c00dd0c8>] (load_module+0x18e8/0x21c4)
      [<c00dd0c8>] (load_module) from [<c00ddaa0>] (SyS_init_module+0xfc/0x158)
      [<c00ddaa0>] (SyS_init_module) from [<c000ff40>] (ret_fast_syscall+0x0/0x54)
      
      The IRQ chip interface defines only two callbacks which are executed in
      non-atomic contex - irq_bus_lock/irq_bus_sync_unlock, so lets move
      PM runtime calls there.
      Tested-by: default avatarTony Lindgren <tony@atomide.com>
      Tested-by: default avatarAustin Schuh <austin@peloton-tech.com>
      Signed-off-by: default avatarGrygorii Strashko <grygorii.strashko@ti.com>
      Acked-by: default avatarSantosh Shilimkar <ssantosh@kernel.org>
      Signed-off-by: default avatarLinus Walleij <linus.walleij@linaro.org>
      aca82d1c
    • Linus Walleij's avatar
      gpio: add DT bindings for existing consumer flags · 69d301fd
      Linus Walleij authored
      It is customary for GPIO controllers to support open drain/collector
      and open source/emitter configurations. Add standard GPIO line flags
      to account for this and augment the documentation to say that these
      are the most generic bindings.
      
      Several people approached me to add new flags to the lines, and this
      makes sense, but let's first bind up the most common cases before we
      start to add exotic stuff.
      
      Thanks to H. Nikolaus Schaller for ideas on how to encode single-ended
      wiring such as open drain/source and open collector/emitter.
      
      Cc: Tony Lindgren <tony@atomide.com>
      Cc: Grygorii Strashko <grygorii.strashko@ti.com>
      Cc: H. Nikolaus Schaller <hns@goldelico.com>
      Signed-off-by: default avatarLinus Walleij <linus.walleij@linaro.org>
      69d301fd
    • Diego Elio Pettenò's avatar
      gpio: add GPIO support for IT87xx, replacing gpio-it8761e · b8664924
      Diego Elio Pettenò authored
      This patch adds support for the GPIOs found on the ITE super-I/O chips
      IT87xx.
      Signed-off-by: default avatarDiego Elio Pettenò <flameeyes@flameeyes.eu>
      Signed-off-by: default avatarChristophe Vu-Brugier <cvubrugier@fastmail.fm>
      Signed-off-by: default avatarLinus Walleij <linus.walleij@linaro.org>
      b8664924