1. 28 Feb, 2019 6 commits
    • hongjiefang's avatar
      mmc: core: Add a debug print when the card may have been replaced · 099b6481
      hongjiefang authored
      If the card was removed in suspended state and a new one was inserted,
      print a debug log when the check detects that it's not the old card.
      Signed-off-by: default avatarhongjiefang <hongjiefang@asrmicro.com>
      Signed-off-by: default avatarUlf Hansson <ulf.hansson@linaro.org>
      099b6481
    • Ulf Hansson's avatar
      Merge branch 'fixes' into next · 82b62487
      Ulf Hansson authored
      82b62487
    • Avri Altman's avatar
      mmc: core: Add sd discard timeout · ad9be7ff
      Avri Altman authored
      The busy timeout is 250msec per discard command.
      Signed-off-by: default avatarAvri Altman <avri.altman@wdc.com>
      Signed-off-by: default avatarUlf Hansson <ulf.hansson@linaro.org>
      ad9be7ff
    • Avri Altman's avatar
      mmc: core: Add discard support to sd · bc47e2f6
      Avri Altman authored
      SD spec v5.1 adds discard support. The flows and commands are similar to
      mmc, so just set the discard arg in CMD38.
      
      A host which supports DISCARD shall check if the DISCARD_SUPPORT (b313)
      is set in the SD_STATUS register.  If the card does not support discard,
      the host shall not issue DISCARD command, but ERASE command instead.
      
      Post the DISCARD operation, the card may de-allocate the discarded
      blocks partially or completely. So the host mustn't make any assumptions
      concerning the content of the discarded region. This is unlike ERASE
      command, in which the region is guaranteed to contain either '0's or
      '1's, depends on the content of DATA_STAT_AFTER_ERASE (b55) in the scr
      register.
      
      One more important difference compared to ERASE is the busy timeout
      which we will address on the next patch.
      Signed-off-by: default avatarAvri Altman <avri.altman@wdc.com>
      Signed-off-by: default avatarUlf Hansson <ulf.hansson@linaro.org>
      bc47e2f6
    • BOUGH CHEN's avatar
      mmc: sdhci-esdhc-imx: clear the HALT bit when enable CQE · 85236d2b
      BOUGH CHEN authored
      After system suspend, CQE is in cqhci_off state, which set the HALT bit, make
      CQE in HALT state. If the SoC do not power down the USDHC module, then when
      system resume back, this bit keep the same, still set. Though there is a
      sdhci reset during sdhci_resume_host(), but this reset do not impact the
      CQE part, so need to clear this bit when enable CQE, otherwise CQE will
      stuck in the first CMDQ request after system resume back.
      
      Find this issue on NXP i.MX845s-mek board
      
      [  105.919862] mmc2: cqhci: timeout for tag 6
      [  105.923965] mmc2: cqhci: ============ CQHCI REGISTER DUMP ===========
      [  105.930407] mmc2: cqhci: Caps:      0x0000310a | Version:  0x00000510
      [  105.936847] mmc2: cqhci: Config:    0x00001001 | Control:  0x00000001
      [  105.943286] mmc2: cqhci: Int stat:  0x00000000 | Int enab: 0x00000006
      [  105.949725] mmc2: cqhci: Int sig:   0x00000006 | Int Coal: 0x00000000
      [  105.956164] mmc2: cqhci: TDL base:  0x7809b000 | TDL up32: 0x00000000
      [  105.962604] mmc2: cqhci: Doorbell:  0x00000040 | TCN:      0x00000000
      [  105.969043] mmc2: cqhci: Dev queue: 0x00000000 | Dev Pend: 0x00000000
      [  105.975483] mmc2: cqhci: Task clr:  0x00000000 | SSC1:     0x00011000
      [  105.981922] mmc2: cqhci: SSC2:      0x00000001 | DCMD rsp: 0x00000000
      [  105.988362] mmc2: cqhci: RED mask:  0xfdf9a080 | TERRI:    0x00000000
      [  105.994801] mmc2: cqhci: Resp idx:  0x00000000 | Resp arg: 0x00000000
      [  106.001240] mmc2: sdhci: ============ SDHCI REGISTER DUMP ===========
      [  106.007680] mmc2: sdhci: Sys addr:  0xb2b37800 | Version:  0x00000002
      [  106.014120] mmc2: sdhci: Blk size:  0x00000200 | Blk cnt:  0x00000001
      [  106.020560] mmc2: sdhci: Argument:  0x00010000 | Trn mode: 0x00000013
      [  106.026999] mmc2: sdhci: Present:   0x01f88008 | Host ctl: 0x00000030
      [  106.033439] mmc2: sdhci: Power:     0x00000002 | Blk gap:  0x00000080
      [  106.039878] mmc2: sdhci: Wake-up:   0x00000008 | Clock:    0x0000000f
      [  106.046318] mmc2: sdhci: Timeout:   0x0000008f | Int stat: 0x00000000
      [  106.052757] mmc2: sdhci: Int enab:  0x107f4000 | Sig enab: 0x107f4000
      [  106.059196] mmc2: sdhci: AC12 err:  0x00000000 | Slot int: 0x00000502
      [  106.065635] mmc2: sdhci: Caps:      0x07eb0000 | Caps_1:   0x8000b407
      [  106.072075] mmc2: sdhci: Cmd:       0x00000d1a | Max curr: 0x00ffffff
      [  106.078514] mmc2: sdhci: Resp[0]:   0x00000900 | Resp[1]:  0x31360181
      [  106.084954] mmc2: sdhci: Resp[2]:   0x44473430 | Resp[3]:  0x00450100
      [  106.091392] mmc2: sdhci: Host ctl2: 0x00000008
      [  106.095836] mmc2: sdhci: ADMA Err:  0x00000000 | ADMA Ptr: 0x7804b208
      [  106.102274] mmc2: sdhci: ============================================
      [  106.108785] mmc2: running CQE recovery
      Signed-off-by: default avatarHaibo Chen <haibo.chen@nxp.com>
      Acked-by: default avatarAdrian Hunter <adrian.hunter@intel.com>
      Signed-off-by: default avatarUlf Hansson <ulf.hansson@linaro.org>
      85236d2b
    • Chaotian Jing's avatar
      mmc: core: do not retry CMD6 in __mmc_switch() · 3a0681c7
      Chaotian Jing authored
      the response type of CMD6 is R1B, when the first CMD6 gets response
      CRC error, do retry may get timeout error due to card may still in
      busy state, which cause this retry make no sense.
      Signed-off-by: default avatarChaotian Jing <chaotian.jing@mediatek.com>
      Signed-off-by: default avatarUlf Hansson <ulf.hansson@linaro.org>
      3a0681c7
  2. 27 Feb, 2019 4 commits
  3. 26 Feb, 2019 1 commit
  4. 25 Feb, 2019 29 commits