- 03 Sep, 2021 1 commit
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Marc Zyngier authored
Correctly escape the * not to be used as emphasis. Also take this opportunity to clarify the fate of the rest of the legacy APIs. Reported-by:
Stephen Rothwell <sfr@canb.auug.org.au> Signed-off-by:
Marc Zyngier <maz@kernel.org> Link: https://lore.kernel.org/r/20210903085343.923036-1-maz@kernel.org
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- 23 Aug, 2021 3 commits
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Marc Zyngier authored
* irq/qcom-pdc-nowake-cleanup: : Fix the QCOM PDC mishandling of the interrupt hierarchy by trimming : it when necessary. : Export irq_domain_disconnect_hierarchy as a consequence of it. irqchip/qcom-pdc: Trim unused levels of the interrupt hierarchy irqdomain: Export irq_domain_disconnect_hierarchy() Signed-off-by: -
Marc Zyngier authored
The QCOM PDC driver creates a bunch of unnecessary levels in the interrupt hierarchy when dealing with non-wakeup-capable interrupts. By definition, these lines are terminated at the PDC level, and everything below this is completely fake. This also results in additional complexity as most of the callbacks have to check for the validity of the parent level. Needless to say, this doesn't look very good. Solve this by disconnecting the interrupt hierarchy below the last valid level, and considerably simplify the handling of all the other interrupts by avoiding now unnecessary cheks. In most cases, the standard irq_*_parent() handlers are directly used. This also cures an issue reporting by Maulik where gpio_to_irq() returns an error after having observed a set of invalid levels. Signed-off-by:
Maulik Shah <mkshah@codeaurora.org> Tested-by:
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Maulik Shah authored
Export irq_domain_disconnect_hierarchy() so irqchip module drivers can use it. Signed-off-by:
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- 20 Aug, 2021 3 commits
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Marc Zyngier authored
* irq/misc-5.15: : . : Various irqchip fixes: : : - Fix edge interrupt support on loongson systems : - Advertise lack of wake-up logic on mtk-sysirq : - Fix mask tracking on the Apple AIC : - Correct priority reading of arm64 pseudo-NMI when SCR_EL3.FIQ==0 : . irqchip/gic-v3: Fix priority comparison when non-secure priorities are used irqchip/apple-aic: Fix irq_disable from within irq handlers Signed-off-by: -
Chen-Yu Tsai authored
When non-secure priorities are used, compared to the raw priority set, the value read back from RPR is also right-shifted by one and the highest bit set. Add a macro to do the modifications to the raw priority when doing the comparison against the RPR value. This corrects the pseudo-NMI behavior when non-secure priorities in the GIC are used. Tested on 5.10 with the "IPI as pseudo-NMI" series [1] applied on MT8195. [1] https://lore.kernel.org/linux-arm-kernel/1604317487-14543-1-git-send-email-sumit.garg@linaro.org/ Fixes: 33678059 ("irqchip/gic-v3: Support pseudo-NMIs when SCR_EL3.FIQ == 0") Reviewed-by:
Alexandru Elisei <alexandru.elisei@arm.com> Signed-off-by:
Chen-Yu Tsai <wenst@chromium.org> [maz: Added comment contributed by Alex] Signed-off-by:
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Sven Peter authored
When disable_irq_nosync for an interrupt is called from within its interrupt handler, this interrupt is only marked as disabled with the intention to mask it when it triggers again. The AIC hardware however automatically masks the interrupt when it is read. aic_irq_eoi then unmasks it again if it's not disabled *and* not masked. This results in a state mismatch between the hardware state and the state kept in irq_data: The hardware interrupt is masked but IRQD_IRQ_MASKED is not set. Any further calls to unmask_irq will directly return and the interrupt can never be enabled again. Fix this by keeping the hardware and irq_data state in sync by unmasking in aic_irq_eoi if and only if the irq_data state also assumes the interrupt to be unmasked. Fixes: 76cde263 ("irqchip/apple-aic: Add support for the Apple Interrupt Controller") Signed-off-by:
Sven Peter <sven@svenpeter.dev> Acked-by:
Hector Martin <marcan@marcan.st> Signed-off-by:
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- 18 Aug, 2021 2 commits
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Marc Zyngier authored
- Tree-wide conversion to generic_handle_domain_irq() - irqdomain documentation update Drag the pinctl ib-rockchip branch to resolve conflicts. * irq/generic_handle_domain_irq: pinctrl/rockchip: drop the gpio related codes gpio/rockchip: drop irq_gc_lock/irq_gc_unlock for irq set type gpio/rockchip: support next version gpio controller gpio/rockchip: use struct rockchip_gpio_regs for gpio controller gpio/rockchip: add driver for rockchip gpio dt-bindings: gpio: change items restriction of clock for rockchip,gpio-bank pinctrl/rockchip: add pinctrl device to gpio bank struct pinctrl/rockchip: separate struct rockchip_pin_bank to a head file pinctrl/rockchip: always enable clock for gpio controller Signed-off-by: -
Marc Zyngier authored
Merge Linus' ib-rockchip branch to avoid ugly conflicts with the generic_handle_domain_irq rework. Signed-off-by:
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- 16 Aug, 2021 9 commits
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Jianqun Xu authored
With the patch to separate the gpio driver from the pinctrl driver, now the pinctrl-rockchip can drop the gpio related codes now. Signed-off-by:
Jianqun Xu <jay.xu@rock-chips.com> Link: https://lore.kernel.org/r/20210816012146.1119289-1-jay.xu@rock-chips.comSigned-off-by:
Linus Walleij <linus.walleij@linaro.org>
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Jianqun Xu authored
There has spin lock for irq set type already, so drop irq_gc_lock and irq_gc_unlock. Reviewed-by:
Heiko Stuebner <heiko@sntech.de> Signed-off-by:
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Jianqun Xu authored
The next version gpio controller on SoCs like rk3568 have more write mask bits for registers. Signed-off-by:
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Jianqun Xu authored
Store register offsets in the struct rockchip_gpio_regs, this patch prepare for the driver update for new gpio controller. Reviewed-by:
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Jianqun Xu authored
This patch add support for rockchip gpio controller, which is supported in pinctrl driver in the past. With this patch, the pinctrl-rockchip driver will drop gpio related codes and populate platform driver to gpio-rockchip. Signed-off-by:
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Jianqun Xu authored
In the past we only need on clock which name "pclk" for a gpio controller. In the new version gpio controller, there add some register to change debounce clock dynamic, so the dt node needs to add the second clock, we call it "dbclk". The clock property need 2 items on some rockchip chips such as RK3568 SoCs. Signed-off-by:
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Jianqun Xu authored
Store a pointer from the pinctrl device for the gpio bank. Signed-off-by:
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Jianqun Xu authored
Separate struct rockchip_pin_bank to pinctrl-rockchip.h file, which will be used by gpio-rockchip driver in the future. Signed-off-by:
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Jianqun Xu authored
Since gate and ungate pclk of gpio has very litte benifit for system power consumption, just keep it always ungate. Signed-off-by:
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- 12 Aug, 2021 20 commits
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Marc Zyngier authored
- Fix edge interrupt support on loongson systems - Advertise lack of wake-up logic on mtk-sysirq * irq/misc-5.15: irqchip/mtk-sysirq: Skip setting irq-wake irqchip/loongson-pch-pic: Improve edge triggered interrupt support Signed-off-by: -
Marc Zyngier authored
- Tree-wide conversion to generic_handle_domain_irq() - irqdomain documentation update * irq/generic_handle_domain_irq: EDAC/altera: Convert to generic_handle_domain_irq() powerpc: Bulk conversion to generic_handle_domain_irq() nios2: Bulk conversion to generic_handle_domain_irq() xtensa: Bulk conversion to generic_handle_domain_irq() SH: Bulk conversion to generic_handle_domain_irq() gpu: Bulk conversion to generic_handle_domain_irq() mips: Bulk conversion to generic_handle_domain_irq() arc: Bulk conversion to generic_handle_domain_irq() ARM: Bulk conversion to generic_handle_domain_irq() mfd: Bulk conversion to generic_handle_domain_irq() pinctrl: Bulk conversion to generic_handle_domain_irq() gpio: Bulk conversion to generic_handle_domain_irq() Documentation: Update irq_domain.rst with new lookup APIs Signed-off-by: -
Marc Zyngier authored
Replace generic_handle_irq(irq_linear_revmap()) with a single call to generic_handle_domain_irq(). Signed-off-by: -
Marc Zyngier authored
Wherever possible, replace constructs that match either generic_handle_irq(irq_find_mapping()) or generic_handle_irq(irq_linear_revmap()) to a single call to generic_handle_domain_irq(). Signed-off-by: -
Marc Zyngier authored
Wherever possible, replace constructs that match either generic_handle_irq(irq_find_mapping()) or generic_handle_irq(irq_linear_revmap()) to a single call to generic_handle_domain_irq(). Signed-off-by: -
Marc Zyngier authored
Wherever possible, replace constructs that match either generic_handle_irq(irq_find_mapping()) or generic_handle_irq(irq_linear_revmap()) to a single call to generic_handle_domain_irq(). Signed-off-by: -
Marc Zyngier authored
Wherever possible, replace constructs that match either generic_handle_irq(irq_find_mapping()) or generic_handle_irq(irq_linear_revmap()) to a single call to generic_handle_domain_irq(). Signed-off-by: -
Marc Zyngier authored
Wherever possible, replace constructs that match either generic_handle_irq(irq_find_mapping()) or generic_handle_irq(irq_linear_revmap()) to a single call to generic_handle_domain_irq(). Signed-off-by: -
Marc Zyngier authored
Wherever possible, replace constructs that match either generic_handle_irq(irq_find_mapping()) or generic_handle_irq(irq_linear_revmap()) to a single call to generic_handle_domain_irq(). Acked-by:
Thomas Bogendoerfer <tsbogend@alpha.franken.de> Signed-off-by:
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Marc Zyngier authored
Wherever possible, replace constructs that match either generic_handle_irq(irq_find_mapping()) or generic_handle_irq(irq_linear_revmap()) to a single call to generic_handle_domain_irq(). Acked-by:
Vineet Gupta <vgupta@synopsys.com> Signed-off-by:
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Marc Zyngier authored
Wherever possible, replace constructs that match either generic_handle_irq(irq_find_mapping()) or generic_handle_irq(irq_linear_revmap()) to a single call to generic_handle_domain_irq(). Acked-by:
Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com> Signed-off-by:
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Marc Zyngier authored
Wherever possible, replace constructs that match either generic_handle_irq(irq_find_mapping()) or generic_handle_irq(irq_linear_revmap()) to a single call to generic_handle_domain_irq(). Acked-by:
Lee Jones <lee.jones@linaro.org> Signed-off-by:
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Marc Zyngier authored
Wherever possible, replace constructs that match either generic_handle_irq(irq_find_mapping()) or generic_handle_irq(irq_linear_revmap()) to a single call to generic_handle_domain_irq(). Acked-by:
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Marc Zyngier authored
Wherever possible, replace constructs that match either generic_handle_irq(irq_find_mapping()) or generic_handle_irq(irq_linear_revmap()) to a single call to generic_handle_domain_irq(). Reviewed-by:
Geert Uytterhoeven <geert+renesas@glider.be> Acked-by:
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Marc Zyngier authored
Catch up with the recent irqdomain updates, and document {generic_,}handle_domain_irq(), irq_resolve_mapping() as well as the deprecation of some of the older APIs. Signed-off-by: -
Markus Schneider-Pargmann authored
mtk-sysirq doesn't require specific logic to work with wakeup IRQs. To allow registered IRQs to be used as a wakeup-source, add the flag IRQCHIP_SKIP_SET_WAKE. Signed-off-by:
Markus Schneider-Pargmann <msp@baylibre.com> Signed-off-by:
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Marc Zyngier authored
- Add support for partitionned EPPIs, modeled after the existing partitioned PPI support * irq/gicv3-eppi-partition: irqchip/gic-v3: Fix selection of partition domain for EPPIs irqchip/gic-v3: Add __gic_get_ppi_index() to find the PPI number from hwirq Signed-off-by: -
James Morse authored
commit 5f51f803 ("irqchip/gic-v3: Add EPPI range support") added GIC_IRQ_TYPE_PARTITION support for EPPI to gic_irq_domain_translate(), and commit 52085d3f ("irqchip/gic-v3: Dynamically allocate PPI partition descriptors") made the gic_data.ppi_descs array big enough for EPPI, but neither gic_irq_domain_select() nor partition_domain_translate() were updated. This means partitions are created by partition_create_desc() for the EPPI range, but can't be registered as they will always match the root domain and map to the summary interrupt. Update gic_irq_domain_select() to match PPI and EPPI. The fwspec for PPI and EPPI both start from 0. Use gic_irq_domain_translate() to find the hwirq from the fwspec, then convert this to a ppi index. Reported-by:
Valentin Schneider <valentin.schneider@arm.com> Signed-off-by:
James Morse <james.morse@arm.com> Reviewed-by:
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James Morse authored
gic_get_ppi_index() is a useful concept for ppi partitions, as the GIC has two PPI ranges but needs mapping to a single range when used as an index in the gic_data.ppi_descs[] array. Add a double-underscore version which takes just the intid. This will be used in the partition domain select and translate helpers to enable partition support for the EPPI range. Signed-off-by:
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Huacai Chen authored
Edge-triggered mode and level-triggered mode need different handlers, and edge-triggered mode need a specific ack operation. So improve it. Fixes: ef8c01eb ("irqchip: Add Loongson PCH PIC controller") Signed-off-by:
Chen Zhu <zhuchen@loongson.cn> Signed-off-by:
Huacai Chen <chenhuacai@loongson.cn> Signed-off-by:
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- 26 Jul, 2021 2 commits
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Marc Zyngier authored
irqchip-wide replacement of bitmap allocation using kcalloc() and co with bitmap-specific allocators (Andy Shevchenko) * irq/bitmap_zalloc: irqchip/mvebu-odmi: Switch to bitmap_zalloc() irqchip/mvebu-gicp: Switch to devm_bitmap_zalloc() irqchip/ls-scfg-msi: Switch to devm_bitmap_zalloc() irqchip/gic-v3: Switch to bitmap_zalloc() irqchip/gic-v2m: Switch to bitmap_zalloc() irqchip/alpine-msi: Switch to bitmap_zalloc() irqchip/partitions: Switch to bitmap_zalloc() Signed-off-by: -
Andy Shevchenko authored
Switch to bitmap_zalloc() to show clearly what we are allocating. Besides that it returns pointer of bitmap type instead of opaque void *. Signed-off-by:
Andy Shevchenko <andriy.shevchenko@linux.intel.com> Signed-off-by:
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