- 09 Jun, 2023 40 commits
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Alex Deucher authored
amdgpu_discovery_get_ip_version() has not been used since commit c40bdfb2 ("drm/amdgpu: fix incorrect VCN revision in SRIOV") so drop it. Reviewed-by:
Luben Tuikov <luben.tuikov@amd.com> Reviewed-by:
Christian König <christian.koenig@amd.com> Signed-off-by:
Alex Deucher <alexander.deucher@amd.com>
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Alex Deucher authored
This was already fixed and dropped in: commit baf3f8f3 ("drm/amdgpu: handle SRIOV VCN revision parsing") commit c40bdfb2 ("drm/amdgpu: fix incorrect VCN revision in SRIOV") But seems to have been accidently been left around in a merge. Reviewed-by:
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Alex Deucher authored
Reduces preemption latency. Only enable this for gfx10 and 11 for now to avoid changing behavior on gfx 8 and 9. v2: move MES MQDs into VRAM as well (YuBiao) v3: enable on gfx10, 11 only (Alex) v4: minor style changes, document why gfx10/11 only (Alex) Reviewed-by:
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Guchun Chen authored
Once command submission failed due to userptr invalidation in amdgpu_cs_submit, legacy code will perform cleanup of scheduler job. However, it's not needed at all, as former commit has integrated job cleanup stuff into amdgpu_job_free. Otherwise, because of double free, a NULL pointer dereference will occur in such scenario. Bug: https://gitlab.freedesktop.org/drm/amd/-/issues/2457 Fixes: f7d66fb2 ("drm/amdgpu: cleanup scheduler job initialization v2") Signed-off-by:
Guchun Chen <guchun.chen@amd.com> Reviewed-by:
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Srinivasan Shanmugam authored
The following checkpatch errors & warning is removed. ERROR: else should follow close brace '}' ERROR: trailing statements should be on next line WARNING: Prefer 'unsigned int' to bare use of 'unsigned' WARNING: Possible repeated word: 'Fences' WARNING: Missing a blank line after declarations WARNING: braces {} are not necessary for single statement blocks WARNING: Comparisons should place the constant on the right side of the test WARNING: printk() should include KERN_<LEVEL> facility level Cc: Christian König <christian.koenig@amd.com> Cc: Alex Deucher <alexander.deucher@amd.com> Signed-off-by:Srinivasan Shanmugam <srinivasan.shanmugam@amd.com> Reviewed-by:
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Yifan Zhang authored
APUs w/ gfx9 onwards doesn't reply on PCIe atomics, rather it is internal path w/ native atomic support. Set have_atomics_support to true. Signed-off-by:
Yifan Zhang <yifan1.zhang@amd.com> Reviewed-by:
Lang Yu <lang.yu@amd.com> Acked-by:
Felix Kuehling <Felix.Kuehling@amd.com> Acked-by:
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Alex Deucher authored
Always restore the MQD not just when we do a reset. This allows us to move the MQD to VRAM if we want. v2: always reset ring pointer as well (Christian) Reviewed-by:
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Thong Thai authored
Update the maximum resolution reported for HEVC encoding on VCN 3 devices to reflect its 8K encoding capability. v2: Also update the max height for H.264 encoding to match spec. (Ruijing) Signed-off-by:
Thong Thai <thong.thai@amd.com> Reviewed-by:
Ruijing Dong <ruijing.dong@amd.com> Acked-by:
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Arnd Bergmann authored
A global function without a header prototype has made it into linux-next during the merge window: drivers/gpu/drm/amd/amdgpu/../display/amdgpu_dm/amdgpu_dm.c:6339:6: error: no previous prototype for 'amdgpu_dm_connector_funcs_force' [-Werror=missing-prototypes] Mark the function static instead, as there are no other callers outside this file. Fixes: 0ba4a784 ("drm/amd/display: implement force function in amdgpu_dm_connector_funcs") Reported-by:
kernel test robot <lkp@intel.com> Link: https://lore.kernel.org/oe-kbuild-all/202304251640.JClqTim9-lkp@intel.com/Signed-off-by:
Arnd Bergmann <arnd@arndb.de> Signed-off-by:
Hamza Mahfooz <hamza.mahfooz@amd.com> Signed-off-by:
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Alex Deucher authored
Always restore the MQD not just when we do a reset. This allows us to move the MQD to VRAM if we want. v2: always reset ring pointer as well (Christian) Reviewed-by:
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Alex Deucher authored
Always restore the MQD not just when we do a reset. This allows us to move the MQD to VRAM if we want. v2: always reset ring pointer as well (Christian) Reviewed-by:
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Alex Deucher authored
Always restore the MQD not just when we do a reset. This allows us to move the MQD to VRAM if we want. v2: always reset ring pointer as well (Christian) Reviewed-by:
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Alex Deucher authored
Just check the return value directly. Reviewed-by:
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Alex Deucher authored
Just check the return value directly. Reviewed-by:
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Mario Limonciello authored
This message shows up on s0i3 resume for DCN31 and DCN314 platforms but it has been decided that this flow won't be changed and the message is expected behavior. Downgrade the message to debug. Signed-off-by:
Mario Limonciello <mario.limonciello@amd.com> Acked-by:
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Alex Deucher authored
And remove the duplicate local variants. Reviewed-by:
Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by:
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Alex Deucher authored
And remove the duplicate local variants. Reviewed-by:
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Alex Deucher authored
To replace the IP specific variants which are largely duplicate. Reviewed-by:
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Aric Cyr authored
This version brings along following fixes: - FW Release 0.0.165.0 - Add w/a to disable DP dual mode on certain ports - Revert "Update scaler recout data for visual confirm" - Filter out invalid bits in pipe_fuses - Adding debug option to override Z8 watermark values - Change default Z8 watermark values - Workaround wrong HDR colorimetry with some receivers Acked-by:
Alan Liu <HaoPing.Liu@amd.com> Signed-off-by:
Aric Cyr <aric.cyr@amd.com> Signed-off-by:
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Anthony Koo authored
- Add dmub boot options to disable ips states on init Acked-by:
Anthony Koo <Anthony.Koo@amd.com> Signed-off-by:
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George Shen authored
[Why] Certain ports on DCN3.2 configs do not properly populate the BIOS info table flag to indicate DP dual mode is unsupported. [How] Add a workaround to disable DP dual mode on the ports with the missing BIOS info table flag. Reviewed-by:
Michael Strauss <Michael.Strauss@amd.com> Acked-by:
George Shen <george.shen@amd.com> Signed-off-by:
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Leo Ma authored
This reverts commit 1068e987. A regression is found on this change, so revert it for the time being and resubmit when issue is fixed. Reviewed-by:
Martin Leung <Martin.Leung@amd.com> Acked-by:
Leo Ma <hanghong.ma@amd.com> Signed-off-by:
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Samson Tam authored
[Why] Reading pipe_fuses from register may have invalid bits set, which may affect the num_pipes erroneously. [How] Add read_pipes_fuses() call and filter bits based on expected number of pipes. Reviewed-by:
Alvin Lee <Alvin.Lee2@amd.com> Acked-by:
Samson Tam <Samson.Tam@amd.com> Signed-off-by:
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Leo Chen authored
[Why & How] Adding debug options to override Z8 watermark values for testing purposes. Reviewed-by:
Nicholas Kazlauskas <Nicholas.Kazlauskas@amd.com> Acked-by:
Leo Chen <sancchen@amd.com> Signed-off-by:
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Leo Chen authored
[Why & How] Previous Z8 watermark values were causing flickering and OTC underflow. Updating Z8 watermark values based on the measurement. Reviewed-by:
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Ilya Bakoulin authored
[Why] Some scalers do not pick up color space updates unless the DP link is disabled/re-enabled which can result in incorrect/washed out HDR colors in some cases. [How] Call set_dpms_on to disable the link, re-train and re-enable with the updated output color space. Reviewed-by:
Ilya Bakoulin <Ilya.Bakoulin@amd.com> Signed-off-by:
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Srinivasan Shanmugam authored
Log when Channel Equalization is successful. Cc: Aurabindo Pillai <aurabindo.pillai@amd.com> Cc: Fangzhi Zuo <Jerry.Zuo@amd.com> Reviewed-by:
Rodrigo Siqueira <Rodrigo.Siqueira@amd.com> Signed-off-by:
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Srinivasan Shanmugam authored
Fix the following checkpatch warnings & error in amdgpu_psp.c WARNING: Comparisons should place the constant on the right side of the test WARNING: braces {} are not necessary for single statement blocks WARNING: please, no space before tabs WARNING: braces {} are not necessary for single statement blocks ERROR: that open brace { should be on the previous line Suggested-by: -
Alex Deucher authored
No longer used. Remove it. Reviewed-by:
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Alex Deucher authored
No longer used. Remove it. Reviewed-by:
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Philip Yang authored
With XNACK on if svm_range_set_attr set the range access or access_in_place attribute, we don't call svm_range_validate_and_map to update GPU mapping. This avoids prefaulting the range pages on system memory if the range is not prefetch to VRAM and not mapped to GPUs. Signed-off-by:
Philip Yang <Philip.Yang@amd.com> Reviewed-by:
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Srinivasan Shanmugam authored
Include eDP v1.4 panels supported sink rates in debug output, useful info for knowing optimized link rates Cc: Aurabindo Pillai <aurabindo.pillai@amd.com> Cc: Jerry Zuo <jerry.zuo@amd.com> Reviewed-by:
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Harshit Mogalapalli authored
We have a NULL check for 'dc_dmub_srv' in dc_dmub_srv_cmd_run_list() but we are dereferencing it before checking. Fix this moving the dereference next to NULL check. This issue is found with Smatch(static analysis tool). Fixes: e97cc04f ("drm/amd/display: refactor dmub commands into single function") Signed-off-by:
Harshit Mogalapalli <harshit.m.mogalapalli@oracle.com> Signed-off-by:
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Srinivasan Shanmugam authored
Fix the following issues reported by checkpatch: WARNING: please, no space before tabs WARNING: Prefer 'unsigned int' to bare use of 'unsigned' WARNING: sizeof *rd should be sizeof(*rd) WARNING: Missing a blank line after declarations WARNING: sizeof rd->id should be sizeof(rd->id) WARNING: static const char * array should probably be static const char * const WARNING: Symbolic permissions 'S_IRUGO' are not preferred. Consider using octal permissions '0444'. WARNING: Prefer seq_puts to seq_printf ERROR: space prohibited after that open parenthesis '(' Cc: Christian König <christian.koenig@amd.com> Cc: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: -
YuBiao Wang authored
Enable mcbp under sriov by default. Asics with soc21 supports mcbp now so we should set it enabled. Signed-off-by:
YuBiao Wang <YuBiao.Wang@amd.com> Reviewed-by:
Horace Chen <horace.chen@amd.com> Signed-off-by:
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Xiaomeng Hou authored
PASID_SRC is not actually present in the Interrupt Packet, the field is taken as reserved bits now. So remove it from IV entry to avoid misuse. Signed-off-by:
Xiaomeng Hou <Xiaomeng.Hou@amd.com> Reviewed-by:
Aaron Liu <aaron.liu@amd.com> Signed-off-by:
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Srinivasan Shanmugam authored
Fix the following checkpatch errors: ERROR: trailing statements should be on next line ERROR: space required after that ',' (ctx:VxV) ERROR: code indent should use tabs where possible Cc: Christian König <christian.koenig@amd.com> Cc: Alex Deucher <alexander.deucher@amd.com> Signed-off-by:
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Horace Chen authored
[Why] This WPTR_POLL_ENABLE is a hardware contigious polling which will cause FCLK and UCLK to keep on a high level. Mostly its case can be covered by F32_WPTR_POLL_ENABLE which polls by firmware. So to save power, SR-IOV also needs to disable this bit Signed-off-by:
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Stanley.Yang authored
Query sdma_utcl1_wr_fifo_sed fiel to detect UTCL1_WR_FIFO SED error counts Signed-off-by:
Stanley.Yang <Stanley.Yang@amd.com> Reviewed-by:
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Chia-I Wu authored
mgr->ctx_handles should be protected by mgr->lock. v2: improve commit message v3: add a Fixes tag Signed-off-by:
Chia-I Wu <olvaffe@gmail.com> Reviewed-by:
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