1. 08 Oct, 2016 35 commits
  2. 02 Oct, 2016 5 commits
    • Linus Torvalds's avatar
      Linux 4.8 · c8d2bc9b
      Linus Torvalds authored
      c8d2bc9b
    • Linus Torvalds's avatar
      Merge branch 'fixes' of git://git.armlinux.org.uk/~rmk/linux-arm · f76d9c61
      Linus Torvalds authored
      Pull ARM fixes from Russell King:
       "Three relatively small fixes for ARM:
      
         - Roger noticed that dma_max_pfn() was calculating the upper limit
           wrongly, by adding the PFN offset of memory twice.
      
         - A fix from Robin to correct parsing of MPIDR values when the
           address size is larger than one BE32 unit.
      
         - A fix from Srinivas to ensure that we do not rely on the boot
           loader (or previous Linux kernel) setting the translation table
           base register a certain way in the decompressor, which can lead to
           crashes"
      
      * 'fixes' of git://git.armlinux.org.uk/~rmk/linux-arm:
        ARM: 8618/1: decompressor: reset ttbcr fields to use TTBR0 on ARMv7
        ARM: 8617/1: dma: fix dma_max_pfn()
        ARM: 8616/1: dt: Respect property size when parsing CPUs
      f76d9c61
    • Srinivas Ramana's avatar
      ARM: 8618/1: decompressor: reset ttbcr fields to use TTBR0 on ARMv7 · 117e5e9c
      Srinivas Ramana authored
      If the bootloader uses the long descriptor format and jumps to
      kernel decompressor code, TTBCR may not be in a right state.
      Before enabling the MMU, it is required to clear the TTBCR.PD0
      field to use TTBR0 for translation table walks.
      
      The commit dbece458 ("ARM: 7501/1: decompressor:
      reset ttbcr for VMSA ARMv7 cores") does the reset of TTBCR.N, but
      doesn't consider all the bits for the size of TTBCR.N.
      
      Clear TTBCR.PD0 field and reset all the three bits of TTBCR.N to
      indicate the use of TTBR0 and the correct base address width.
      
      Fixes: dbece458 ("ARM: 7501/1: decompressor: reset ttbcr for VMSA ARMv7 cores")
      Acked-by: default avatarRobin Murphy <robin.murphy@arm.com>
      Signed-off-by: default avatarSrinivas Ramana <sramana@codeaurora.org>
      Signed-off-by: default avatarRussell King <rmk+kernel@arm.linux.org.uk>
      117e5e9c
    • Linus Torvalds's avatar
      Merge branch 'x86-urgent-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip · be67d60b
      Linus Torvalds authored
      Pull x86 fixes from Thomas Gleixner:
       "The last regression fixes for 4.8 final:
      
         - Two patches addressing the fallout of the CR4 optimizations which
           caused CR4-less machines to fail.
      
         - Fix the VDSO build on big endian machines
      
         - Take care of FPU initialization if no CPUID is available otherwise
           task struct size ends up being zero
      
         - Fix up context tracking in case load_gs_index fails"
      
      * 'x86-urgent-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip:
        x86/entry/64: Fix context tracking state warning when load_gs_index fails
        x86/boot: Initialize FPU and X86_FEATURE_ALWAYS even if we don't have CPUID
        x86/vdso: Fix building on big endian host
        x86/boot: Fix another __read_cr4() case on 486
        x86/init: Fix cr4_init_shadow() on CR4-less machines
      be67d60b
    • Linus Torvalds's avatar
      Merge branch 'upstream' of git://git.linux-mips.org/pub/scm/ralf/upstream-linus · 66188fb1
      Linus Torvalds authored
      Pull MIPS fixes from Ralf Baechle:
       "Another round of fixes:
      
         - CM: Fix mips_cm_max_vp_width for non-MT kernels on MT systems
         - CPS: Avoid BUG() when offlining pre-r6 CPUs
         - DEC: Avoid gas warnings due to suspicious instruction scheduling by
           manually expanding assembler macros.
         - FTLB: Fix configuration by moving confiuguratoin after probing
         - FTLB: clear execution hazard after changing FTLB enable
         - Highmem: Fix detection of unsupported highmem with cache aliases
         - I6400: Don't touch FTLBP chicken bits
         - microMIPS: Fix BUILD_ROLLBACK_PROLOGUE
         - Malta: Fix IOCU disable switch read for MIPS64
         - Octeon: Fix probing of devices attached to GPIO lines
         - uprobes: Misc small fixes"
      
      * 'upstream' of git://git.linux-mips.org/pub/scm/ralf/upstream-linus:
        MIPS: CM: Fix mips_cm_max_vp_width for non-MT kernels on MT systems
        MIPS: Fix detection of unsupported highmem with cache aliases
        MIPS: Malta: Fix IOCU disable switch read for MIPS64
        MIPS: Fix BUILD_ROLLBACK_PROLOGUE for microMIPS
        MIPS: clear execution hazard after changing FTLB enable
        MIPS: Configure FTLB after probing TLB sizes from config4
        MIPS: Stop setting I6400 FTLBP
        MIPS: DEC: Avoid la pseudo-instruction in delay slots
        MIPS: Octeon: mark GPIO controller node not populated after IRQ init.
        MIPS: uprobes: fix use of uninitialised variable
        MIPS: uprobes: remove incorrect set_orig_insn
        MIPS: fix uretprobe implementation
        MIPS: smp-cps: Avoid BUG() when offlining pre-r6 CPUs
      66188fb1