- 26 Aug, 2015 2 commits
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Mika Westerberg authored
When running -rt kernel and an interrupt happens on a GPIO line controlled by Intel Cherryview/Braswell pinctrl driver we get: BUG: sleeping function called from invalid context at kernel/locking/rtmutex.c:917 in_atomic(): 1, irqs_disabled(): 1, pid: 0, name: swapper/0 Preemption disabled at:[<ffffffff81092e9f>] cpu_startup_entry+0x17f/0x480 CPU: 0 PID: 0 Comm: swapper/0 Not tainted 4.1.5-rt5 #16 ... Call Trace: <IRQ> [<ffffffff816283c6>] dump_stack+0x4a/0x61 [<ffffffff81077e17>] ___might_sleep+0xe7/0x170 [<ffffffff8162d6cf>] rt_spin_lock+0x1f/0x50 [<ffffffff812e52ed>] chv_gpio_irq_ack+0x3d/0xa0 [<ffffffff810a72f5>] handle_edge_irq+0x75/0x180 [<ffffffff810a3457>] generic_handle_irq+0x27/0x40 [<ffffffff812e57de>] chv_gpio_irq_handler+0x7e/0x110 [<ffffffff810050aa>] handle_irq+0xaa/0x190 ... This is because desc->lock is raw_spinlock and is held when chv_gpio_irq_ack() is called by the genirq core. chv_gpio_irq_ack() in turn takes pctrl->lock which in -rt is an rt-mutex causing might_sleep() rightfully to complain about sleeping function called from invalid context. In order to keep -rt happy but at the same time make sure that register accesses get serialized, convert the driver to use raw_spinlock instead. Suggested-by:
Linus Walleij <linus.walleij@linaro.org> Signed-off-by:
Mika Westerberg <mika.westerberg@linux.intel.com> Signed-off-by:
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Mika Westerberg authored
The Intel Baytrail pinctrl driver implements irqchip callbacks which are called with desc->lock raw_spinlock held. In mainline this is fine because spinlock resolves to raw_spinlock. However, running the same code in -rt we get: BUG: sleeping function called from invalid context at kernel/locking/rtmutex.c:917 in_atomic(): 1, irqs_disabled(): 1, pid: 0, name: swapper/0 Preemption disabled at:[<ffffffff81092e9f>] cpu_startup_entry+0x17f/0x480 CPU: 0 PID: 0 Comm: swapper/0 Not tainted 4.1.5-rt5 #13 ... Call Trace: <IRQ> [<ffffffff816283c6>] dump_stack+0x4a/0x61 [<ffffffff81077e17>] ___might_sleep+0xe7/0x170 [<ffffffff8162d6cf>] rt_spin_lock+0x1f/0x50 [<ffffffff812e3b88>] byt_gpio_clear_triggering+0x38/0x60 [<ffffffff812e3bc1>] byt_irq_mask+0x11/0x20 [<ffffffff810a7013>] handle_level_irq+0x83/0x150 [<ffffffff810a3457>] generic_handle_irq+0x27/0x40 [<ffffffff812e3a5f>] byt_gpio_irq_handler+0x7f/0xc0 [<ffffffff810050aa>] handle_irq+0xaa/0x190 ... This is because in -rt spinlocks are preemptible so taking the driver private spinlock in irqchip callbacks causes might_sleep() to trigger. In order to keep -rt happy but at the same time make sure that register accesses get serialized, convert the driver to use raw_spinlock instead. Also shorten the critical section a bit in few places. Suggested-by:
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- 25 Aug, 2015 2 commits
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Fabio Estevam authored
platform_driver does not need to set an owner as it will be populated by the driver core. The semantic patch that makes this change is available in scripts/coccinelle/api/platform_no_drv_owner.cocci. Signed-off-by:
Fabio Estevam <fabio.estevam@freescale.com> Signed-off-by:
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Mike Looijmans authored
Group names should be smc0_nand_grp and smc0_nor_grp, otherwise you'll get errors like this if you try to pinmux them via the devicetree: zynq-pinctrl 700.pinctrl: invalid group "smc0_nand_grp" for function "smc0_nand" Probably a typo while creating these tables. Signed-off-by:
Mike Looijmans <mike.looijmans@topic.nl> Acked-by:
Sören Brinkmann <soren.brinkmann@xilinx.com> Acked-by:
Moritz Fischer <moritz.fischer@ettus.com> Signed-off-by:
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- 24 Aug, 2015 1 commit
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Ben Hutchings authored
The pfc in the R8A7790 (and probably others in the R-Car gen 2 family) supports switching SDHI signals between 3.3V and 1.8V nominal voltage, and the SD driver should do that when switching to and from UHS modes. Add a flag for pins that have configurable I/O voltage and SoC operations to get and set the nominal voltage. Implement the pinconf power-source parameter using these operations. Signed-off-by:
Ben Hutchings <ben.hutchings@codethink.co.uk> Acked-by:
Laurent Pinchart <laurent.pinchart@ideasonboard.com> Signed-off-by:
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- 13 Aug, 2015 9 commits
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Heiko Stuebner authored
pclk_pd_pmu needs to keep running and with the upcoming gpio clock handling this is not always the case anymore. So add it to the list of critical clocks for now. Signed-off-by:
Heiko Stuebner <heiko@sntech.de> Signed-off-by:
Lin Huang <hl@rock-chips.com> Reviewed-by:
Douglas Anderson <dianders@chromium.org> Acked-by:
Stephen Boyd <sboyd@codeaurora.org> Signed-off-by:
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Marcus Cooper authored
Signed-off-by:
Marcus Cooper <codekipper@gmail.com> Reviewed-by:
Hans de Goede <hdegoede@redhat.com> Signed-off-by:
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Wei Chen authored
To set/get atlas7 pull & drive strength, we use lots of if/else to check pad type. But except mask value or immediate value, all actions in these conditional branches are the same. So we use predefined pull info table and drive strength table to reduce these redundancy code. Signed-off-by:
Wei Chen <Wei.Chen@csr.com> Signed-off-by:
Barry Song <Baohua.Song@csr.com> Signed-off-by:
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Mika Westerberg authored
There is a hardware issue in Intel Baytrail where concurrent GPIO register access might result reads of 0xffffffff and writes might get dropped completely. Prevent this from happening by taking the serializing lock in all places where it is possible that more than one thread might be accessing the hardware concurrently. Signed-off-by:
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Mika Westerberg authored
The FSF address is already mentioned in the COPYING file. No need to duplicate that information to individual files. Signed-off-by:
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Lin Huang authored
gpio can keep state even the clock disable, for save power consumption, only enable gpio clock when it setting Signed-off-by:
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Colin Ian King authored
Trivial change, fix spelling mistake 'invaild' -> 'invalid' in dev_err message. Signed-off-by:
Colin Ian King <colin.king@canonical.com> Acked-by:
Hongzhou Yang <hongzhou.yang@mediatek.com> Signed-off-by:
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Mika Westerberg authored
There is a hardware issue in Intel Braswell/Cherryview where concurrent GPIO register access might results reads of 0xffffffff and writes might get dropped. Prevent this from happening by taking the serializing lock for all places where it is possible that more than one thread might be accessing the hardware concurrently. Signed-off-by:
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Masahiro Yamada authored
The initial version of this driver missed to add I2C ch6 pin-muxing. Signed-off-by:
Masahiro Yamada <yamada.masahiro@socionext.com> Signed-off-by:
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- 11 Aug, 2015 1 commit
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Linus Walleij authored
Let us see the current value on the input line in debugfs. Signed-off-by:
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- 03 Aug, 2015 1 commit
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Masahiro Yamada authored
These are user-visible strings, so can exceed 80 columns. Signed-off-by:
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- 28 Jul, 2015 4 commits
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Wei Chen authored
We had not implemented the pm interface of atlas7 pinctrl and gpio drivers. So when system resumes from sleep, all pin configuration and gpio status will be lost. Now, we implement these interfaces to support pm. At the same time, this patch also drops a lot of if-else by look-up table for getting and setting pull. Signed-off-by:
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Linus Walleij authored
Split the UART pin groups so we can activate RX/TX, CTS/RTS and the modem pins (DCD, DSR, RI, DTR) as three different groups with function u0. Signed-off-by: -
Krzysztof Kozlowski authored
Thomas Abraham's Linaro email address bounces for several months. Also there were no replies for several emails sent on LKML to his Samsung address. Move his name to CREDITS. Signed-off-by:
Krzysztof Kozlowski <k.kozlowski@samsung.com> Cc: Tomasz Figa <tomasz.figa@gmail.com> Cc: Thomas Abraham <thomas.ab@samsung.com> Cc: Linus Walleij <linus.walleij@linaro.org> Link: http://lkml.org/lkml/2015/6/15/15Signed-off-by:
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Rob Herring authored
set_irq_flags is ARM specific with custom flags which have genirq equivalents. Convert drivers to use the genirq interfaces directly, so we can kill off set_irq_flags. The translation of flags is as follows: IRQF_VALID -> !IRQ_NOREQUEST IRQF_PROBE -> !IRQ_NOPROBE IRQF_NOAUTOEN -> IRQ_NOAUTOEN For IRQs managed by an irqdomain, the irqdomain core code handles clearing and setting IRQ_NOREQUEST already, so there is no need to do this in .map() functions and we can simply remove the set_irq_flags calls. Some users also modify IRQ_NOPROBE and this has been maintained although it is not clear that is really needed. There appears to be a great deal of blind copy and paste of this code. Signed-off-by:
Rob Herring <robh@kernel.org> Cc: Stephen Warren <swarren@wwwdotorg.org> Cc: Lee Jones <lee@kernel.org> Cc: Matthias Brugger <matthias.bgg@gmail.com> Cc: Tomasz Figa <tomasz.figa@gmail.com> Cc: Thomas Abraham <thomas.abraham@linaro.org> Cc: Kukjin Kim <kgene@kernel.org> Cc: Krzysztof Kozlowski <k.kozlowski@samsung.com> Cc: linux-gpio@vger.kernel.org Cc: linux-rpi-kernel@lists.infradead.org Cc: linux-arm-kernel@lists.infradead.org Cc: linux-mediatek@lists.infradead.org Cc: linux-samsung-soc@vger.kernel.org Signed-off-by:
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- 27 Jul, 2015 9 commits
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Linus Walleij authored
We no longer have to do GPIO initialization before the pinctrl initialization, instead we can initialize the pinctrl portions of the driver first and then the GPIO. Thus we can move GPIO initialization to a subsystem_initcall(), but not yet to a device_initcall(). Signed-off-by: -
Linus Walleij authored
This gets the GPIO ranges out of the driver and into the device tree where they belong. Standard DT bindings already exist for this. Since no systems with this are deployed we can just augment all device trees and the drivers at the same time and simplify the world. This also defines the array of GPIO chips related to the pin controller. Cc: arm@kernel.org Acked-by:
Olof Johansson <olof@lixom.net> Signed-off-by:
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Maxime Ripard authored
The current interrupt parsing code was working by accident, because the default was actually parsing the first node of interrupts. While that was mostly working (and the flags were actually ignored), this binding has never been documented, and doesn't work with SoCs that have multiple interrupt banks anyway. Add a proper interrupt xlate function, that uses the same description than the GPIOs (<bank> <pin> <flags>), that will make things less confusing. The EINT number will still be used as the hwirq number, but won't be exposed through the DT. Signed-off-by:
Maxime Ripard <maxime.ripard@free-electrons.com> Reviewed-by:
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Masahiro Yamada authored
Use dev_err() rather than pr_err() to display the error message. pinctrl_dev_get_name(pctldev) is no longer necessary because dev_err() shows which device the message is related to. Signed-off-by:
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Masahiro Yamada authored
Use dev_err() rather than pr_err() to display the error message. (Besides, dev_err() is already used 7 lines below in this function.) Also, drop the redundant information "on %s" because dev_err() shows which device the message is related to. Signed-off-by:
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Maxime Ripard authored
In order to ease the debugging, add a name to the irq_chips. Signed-off-by:
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Maxime Ripard authored
The current code uses some custom variable affectations, while we have common functions to do exactly that. Move to the common functions. Signed-off-by:
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Baruch Siach authored
This adds pinctrl and gpio driver to the CX92755 SoC "General Purpose Pin Mapping" hardware block. The CX92755 is one SoC from the Conexant Digicolor series. Pin mapping hardware supports configuring pins as either GPIO, or up to 3 other "client select" functions. This driver adds support for pin muxing using the generic device tree binding, and a basic gpiolib driver for the GPIO functionality. This driver does not currently support GPIO interrupts, and pad configuration. v2: * Address review comments for Linus Walleij: - Add a pointer to pinctrl_desc in struct dc_pinmap - Drop the now redundant pinctrl_pin_desc field - Adapt dc_get_group_{name,pins} to these changes, and add a comment explaining the 1-to-1 pin-groups relation * Staticise dc_pmxops * Protect the GP_CLIENTSEL clct parameter with parenthesis Signed-off-by:Baruch Siach <baruch@tkos.co.il> Signed-off-by:
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Baruch Siach authored
Add pinctrl device tree binding documentation for the General Purpose Pin Mapping module of the Conexant CX92755 SoC. Signed-off-by:
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- 23 Jul, 2015 3 commits
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Linus Walleij authored
If the pin controller probes before the GPIO driver it needs to populate the GPIO driver state containers ahead of the actual driver probe as the addresses are used by both halves of the driver. Signed-off-by: -
Linus Walleij authored
Instead of indexing around the GPIO ranges to find a chip, look directly in the local array of state containers for nmk_gpio_chip:s. Signed-off-by: -
Linus Walleij authored
Break out the function that allocates the nomadik GPIO chip state container to its own function. Signed-off-by:
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- 17 Jul, 2015 8 commits
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kbuild test robot authored
Signed-off-by:
Fengguang Wu <fengguang.wu@intel.com> Signed-off-by:
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Thomas Gleixner authored
The irq argument of most interrupt flow handlers is unused or merily used instead of a local variable. The handlers which need the irq argument can retrieve the irq number from the irq descriptor. Search and update was done with coccinelle and the invaluable help of Julia Lawall. Signed-off-by:Thomas Gleixner <tglx@linutronix.de> Cc: Julia Lawall <Julia.Lawall@lip6.fr> Cc: Jiang Liu <jiang.liu@linux.intel.com> Cc: Linus Walleij <linus.walleij@linaro.org> Cc: linux-gpio@vger.kernel.org
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Thomas Gleixner authored
The irq argument of most interrupt flow handlers is unused or merily used instead of a local variable. The handlers which need the irq argument can retrieve the irq number from the irq descriptor. Search and update was done with coccinelle and the invaluable help of Julia Lawall. Signed-off-by: -
Thomas Gleixner authored
The irq argument of most interrupt flow handlers is unused or merily used instead of a local variable. The handlers which need the irq argument can retrieve the irq number from the irq descriptor. Search and update was done with coccinelle and the invaluable help of Julia Lawall. Signed-off-by: -
Thomas Gleixner authored
The irq argument of most interrupt flow handlers is unused or merily used instead of a local variable. The handlers which need the irq argument can retrieve the irq number from the irq descriptor. Search and update was done with coccinelle and the invaluable help of Julia Lawall. Signed-off-by: -
Thomas Gleixner authored
The irq argument of most interrupt flow handlers is unused or merily used instead of a local variable. The handlers which need the irq argument can retrieve the irq number from the irq descriptor. Search and update was done with coccinelle and the invaluable help of Julia Lawall. Signed-off-by: -
Thomas Gleixner authored
The irq argument of most interrupt flow handlers is unused or merily used instead of a local variable. The handlers which need the irq argument can retrieve the irq number from the irq descriptor. Search and update was done with coccinelle and the invaluable help of Julia Lawall. Signed-off-by: -
Thomas Gleixner authored
The irq argument of most interrupt flow handlers is unused or merily used instead of a local variable. The handlers which need the irq argument can retrieve the irq number from the irq descriptor. Search and update was done with coccinelle and the invaluable help of Julia Lawall. Signed-off-by:
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