- 19 Dec, 2023 3 commits
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Mauro Carvalho Chehab authored
KUnit reuquires debugfs, as otherwise, it won't build: $ make ARCH=x86_64 O=.kunit --jobs=8 ERROR:root:../drivers/gpu/drm/xe/display/intel_display_debugfs.c:1612:6: error: redefinition of ‘intel_display_debugfs_register’ 1612 | void intel_display_debugfs_register(struct drm_i915_private *i915) | ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ In file included from ../drivers/gpu/drm/xe/display/intel_display_debugfs.c:18: ../drivers/gpu/drm/xe/display/intel_display_debugfs.h:18:20: note: previous definition of ‘intel_display_debugfs_register’ with type ‘void(struct xe_device *)’ 18 | static inline void intel_display_debugfs_register(struct drm_i915_private *i915) {} | ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ../drivers/gpu/drm/xe/display/intel_display_debugfs.c:1935:6: error: redefinition of ‘intel_connector_debugfs_add’ 1935 | void intel_connector_debugfs_add(struct intel_connector *intel_connector) | ^~~~~~~~~~~~~~~~~~~~~~~~~~~ ../drivers/gpu/drm/xe/display/intel_display_debugfs.h:19:20: note: previous definition of ‘intel_connector_debugfs_add’ with type ‘void(struct intel_connector *)’ 19 | static inline void intel_connector_debugfs_add(struct intel_connector *connector) {} | ^~~~~~~~~~~~~~~~~~~~~~~~~~~ ../drivers/gpu/drm/xe/display/intel_display_debugfs.c:1993:6: error: redefinition of ‘intel_crtc_debugfs_add’ 1993 | void intel_crtc_debugfs_add(struct drm_crtc *crtc) | ^~~~~~~~~~~~~~~~~~~~~~ ../drivers/gpu/drm/xe/display/intel_display_debugfs.h:20:20: note: previous definition of ‘intel_crtc_debugfs_add’ with type ‘void(struct drm_crtc *)’ 20 | static inline void intel_crtc_debugfs_add(struct drm_crtc *crtc) {} | ^~~~~~~~~~~~~~~~~~~~~~ Signed-off-by:Mauro Carvalho Chehab <mchehab@kernel.org> Cc: Thomas Hellström <thomas.hellstrom@linux.intel.com> Reviewed-by:
Matthew Brost <matthew.brost@intel.com> Signed-off-by:
Rodrigo Vivi <rodrigo.vivi@intel.com>
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Lucas De Marchi authored
Some of the tests may benefit from running with ARCH=um, forgoing any additional setup on the CI build side. Add min config for that. Tested with: ./tools/testing/kunit/kunit.py build \ --kunitconfig drivers/gpu/drm/xe/.kunitconfig \ --jobs $(nproc) \ --build_dir build_kunit Signed-off-by:
Lucas De Marchi <lucas.demarchi@intel.com> Cc: Mauro Carvalho Chehab <mchehab@kernel.org> Signed-off-by:
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Lucas De Marchi authored
mem_type field was added in commit d8b52a02 ("drm/xe: Implement stolen memory.") to designate the TTM memory type for that mgr. Add kernel-doc with its description. Signed-off-by:
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- 12 Dec, 2023 28 commits
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Lucas De Marchi authored
Fix the following error while building for 32b: In file included from ../drivers/gpu/drm/xe/xe_gt.c:6: ../drivers/gpu/drm/xe/xe_gt.c: In function ‘gt_ttm_mgr_init’: ../include/linux/minmax.h:20:35: error: comparison of distinct pointer types lacks a cast [-Werror] 20 | (!!(sizeof((typeof(x) *)1 == (typeof(y) *)1))) | ^~ Cast it to u64 so size of the second operand matches the first one when building it for 32 bits. Signed-off-by:
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Lucas De Marchi authored
Leave the types as u64, but cast the pointers to unsigned long before assigning so the compiler doesn't throw warning about casting a pointer to integer of different size. Also, size_t should use %zu, not %ld. Signed-off-by:
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Lucas De Marchi authored
writeq() and readq() and other functions working on 64 bit variables are not provided by 32b arch. For that it's needed to choose between linux/io-64-nonatomic-hi-lo.h and linux/io-64-nonatomic-lo-hi.h, spliting the read/write in 2 accesses. For xe driver, it doesn't matter much, so just choose one and include in xe_mmio.h. This also removes some ifdef CONFIG_64BIT we had around because of the missing 64bit functions. Signed-off-by:
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Lucas De Marchi authored
Either use the proper format or cast up to 64b depending on the case. Signed-off-by:
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Lucas De Marchi authored
Make sure it's 64bit value in both 32b and 64b arch. Signed-off-by:
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Philippe Lecluse authored
As also cause issue on PVC, moving back to what we did before stolen was introduced Signed-off-by:
Philippe Lecluse <philippe.lecluse@intel.com> Reviewed-by:
Matthew Auld <matthew.auld@intel.com> Signed-off-by:
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Matthew Auld authored
On DG2 we are now getting: [ 104.456607] xe 0000:03:00.0: [drm] *ERROR* PCODE timeout, retrying with preemption disabled Looks like we just need to invert the error check for xe_pcode_try_request(), which returns zero on success. Signed-off-by:
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Philippe Lecluse authored
On DG1, BAR2 is not reliable for reporting Vram size, need to use GSMBASE. Simplify xe_mmio_total_vram_size to report vram size and usable size. Signed-off-by:
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Maarten Lankhorst authored
The bo_create ioctl relied on the internal ordering of memory regions to be the same, make sure we don't allocate stolen instead of VRAM0. Also remove a debug warning left in. Signed-off-by:
Maarten Lankhorst <maarten.lankhorst@linux.intel.com> Reviewed-by:
Philippe Lecluse <philippe.lecluse1@gmail.com> Signed-off-by:
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Matthew Brost authored
SRIOV has a use case of GuC MMIO send / recv, add a function for it. Signed-off-by:
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Matthew Brost authored
Now aligns with the xe_guc_ct_send naming. Signed-off-by:
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Matthew Brost authored
Starting in 70.6.* GuC firmware the CSS header includes the submission version, pull this from the CSS header. Prior 70.* versions accidentally omitted this informatio so hard code to the correct values. This information will be used by VFs when communicating with the PF. Signed-off-by:
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Matthew Brost authored
The blob doesn't fully support this yet, so fake for now to ensure our driver load order is correct. Once the blob supports pulling gt->info.engine_mask from the blob, this patch can be removed. Signed-off-by:
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Matthew Brost authored
Fix the below splat: [ 142.510525] [IGT] xe_exec_basic: starting subtest once-userptr [ 142.511339] BUG: kernel NULL pointer dereference, address: 0000000000000228 [ 142.518311] #PF: supervisor read access in kernel mode [ 142.523458] #PF: error_code(0x0000) - not-present page [ 142.528604] PGD 0 P4D 0 [ 142.531153] Oops: 0000 [#1] PREEMPT SMP NOPTI [ 142.535518] CPU: 4 PID: 1199 Comm: kworker/u16:8 Not tainted 6.1.0-rc1-xe+ #1 [ 142.542656] Hardware name: Intel Corporation Tiger Lake Client Platform/TigerLake U DDR4 SODIMM RVP, BIOS TGLSFWI1.R00.3243.A01.2006102133 06/10/2020 [ 142.556033] Workqueue: events_unbound async_op_work_func [xe] [ 142.561810] RIP: 0010:xe_bo_is_stolen+0x0/0x20 [xe] [ 142.566709] Code: 20 c8 75 05 83 fa 07 74 05 c3 cc cc cc cc 48 8b 87 08 02 00 00 0f b6 80 2c ff ff ff c3 cc cc cc cc 66 0f 1f 84 00 00 00 00 00 <48> 8b 87 28 02 00 00 83 78 10 07 0f 94 c0 c3 cc cc cc cc 66 66 2e [ 142.585447] RSP: 0018:ffffc900019eb888 EFLAGS: 00010246 [ 142.590678] RAX: 0000000000000002 RBX: 0000000000000000 RCX: ffff88813f6a2108 [ 142.597821] RDX: 0000000000000000 RSI: 0000000000000000 RDI: 0000000000000000 [ 142.604962] RBP: ffffc900019ebbc0 R08: 0000000000000001 R09: 0000000000000000 [ 142.612101] R10: 0000000000000001 R11: 0000000000000001 R12: ffff88814107d600 [ 142.619242] R13: ffffc900019eba20 R14: ffff888140442000 R15: 0000000000000000 [ 142.626378] FS: 0000000000000000(0000) GS:ffff88849fa00000(0000) knlGS:0000000000000000 [ 142.634468] CS: 0010 DS: 0000 ES: 0000 CR0: 0000000080050033 [ 142.640219] CR2: 0000000000000228 CR3: 000000010a4c0006 CR4: 0000000000770ee0 [ 142.647361] DR0: 0000000000000000 DR1: 0000000000000000 DR2: 0000000000000000 [ 142.654505] DR3: 0000000000000000 DR6: 00000000fffe0ff0 DR7: 0000000000000400 [ 142.661639] PKRU: 55555554 [ 142.664367] Call Trace: [ 142.666830] <TASK> [ 142.668947] __xe_pt_bind_vma+0x1a1/0xa50 [xe] [ 142.673417] ? unwind_next_frame+0x187/0x770 [ 142.677699] ? __thaw_task+0xc0/0xc0 [ 142.681293] ? __lock_acquire+0x5e4/0x26e0 [ 142.685409] ? lockdep_hardirqs_on+0xbf/0x140 [ 142.689779] ? lock_acquire+0xd2/0x310 [ 142.693548] ? mark_held_locks+0x49/0x80 [ 142.697485] ? xe_vm_bind_vma+0xf1/0x3d0 [xe] [ 142.701866] xe_vm_bind_vma+0xf1/0x3d0 [xe] [ 142.706082] xe_vm_bind+0x76/0x140 [xe] [ 142.709944] vm_bind_ioctl+0x26f/0xb40 [xe] [ 142.714161] ? async_op_work_func+0x20c/0x450 [xe] [ 142.718974] async_op_work_func+0x20c/0x450 [xe] [ 142.723620] process_one_work+0x263/0x580 [ 142.727645] ? process_one_work+0x580/0x580 [ 142.731839] worker_thread+0x4d/0x3b0 [ 142.735518] ? process_one_work+0x580/0x580 [ 142.739714] kthread+0xeb/0x120 [ 142.742872] ? kthread_complete_and_exit+0x20/0x20 [ 142.747671] ret_from_fork+0x1f/0x30 [ 142.751264] </TASK> Signed-off-by:
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Maarten Lankhorst authored
This adds support for stolen memory, with the same allocator as vram_mgr. This allows us to skip a whole lot of copy-paste, by re-using parts of xe_ttm_vram_mgr. The stolen memory may be bound using VM_BIND, so it performs like any other memory region. We should be able to map a stolen BO directly using the physical memory location instead of through GGTT even on old platforms, but I don't know what the effects are on coherency. Signed-off-by:
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Matthew Brost authored
When a job is inflight we may access memory to read the hardware seqno. All user jobs have VM open which has a ref but kernel jobs do not require VM so it is possible to not have memory ref. To avoid this, take a memory ref on kernel job creation. Signed-off-by:
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Thomas Hellström authored
Add kerneldoc for structs and external functions. Signed-off-by:
Thomas Hellström <thomas.hellstrom@linux.intel.com> Cc: Matthew Brost <matthew.brost@intel.com> Signed-off-by:
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Rodrigo Vivi authored
Expand xe_mmio_wait32 to accept atomic and then use that directly when possible, and create own routine to wait for the pcode status. Signed-off-by:
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Rodrigo Vivi authored
Another clean-up towards killing the usage of i915_utils.h Signed-off-by:
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Rodrigo Vivi authored
We can run the bit operation locally without yet another macro. Signed-off-by:
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Rodrigo Vivi authored
We don't need any macro for a simple check we can do explicitly and clear. Signed-off-by:
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Rodrigo Vivi authored
To make it simpler, all of the status checks also waits and times out. Also, no ktime precision is needed in this case, and we can use usleep_range because we are not in atomic paths here. Signed-off-by:
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Rodrigo Vivi authored
Rather than a constant check on proto and wait not busy, let's wait for the expected success and then check the protocol afterwards. With this, we can now use the regular xe_mmio_wait32 and kill this local need for the wait_for. Signed-off-by:
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Rodrigo Vivi authored
Possible now that the wait function returns the last read value. So we can remove the users of i915's wait_for one by one... Signed-off-by:
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Rodrigo Vivi authored
This is already useful because it avoids some extra reads where registers might have changed after the timeout decision. But also, it will be important to end the kill of i915's wait_for. Signed-off-by:
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Rodrigo Vivi authored
Let's do it directly. Signed-off-by:
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Rodrigo Vivi authored
Then, move the i915_utils.h include to its user. The overall goal is to kill all the usages of the i915_utils stuff. Yes, wait_for also depends on <linux/delay.h>, so they go together to where it is needed. It will be likely needed anyway directly for udelay or usleep_range. Signed-off-by:
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Matthew Brost authored
Xe, is a new driver for Intel GPUs that supports both integrated and discrete platforms starting with Tiger Lake (first Intel Xe Architecture). The code is at a stage where it is already functional and has experimental support for multiple platforms starting from Tiger Lake, with initial support implemented in Mesa (for Iris and Anv, our OpenGL and Vulkan drivers), as well as in NEO (for OpenCL and Level0). The new Xe driver leverages a lot from i915. As for display, the intent is to share the display code with the i915 driver so that there is maximum reuse there. But it is not added in this patch. This initial work is a collaboration of many people and unfortunately the big squashed patch won't fully honor the proper credits. But let's get some git quick stats so we can at least try to preserve some of the credits: Co-developed-by:
Matt Roper <matthew.d.roper@intel.com> Co-developed-by:
Francois Dugast <francois.dugast@intel.com> Co-developed-by:
Nirmoy Das <nirmoy.das@intel.com> Co-developed-by:
Jani Nikula <jani.nikula@intel.com> Co-developed-by:
José Roberto de Souza <jose.souza@intel.com> Co-developed-by:
Dave Airlie <airlied@redhat.com> Co-developed-by:
Faith Ekstrand <faith.ekstrand@collabora.com> Co-developed-by:
Daniel Vetter <daniel.vetter@ffwll.ch> Co-developed-by:
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- 08 Dec, 2023 2 commits
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git://anongit.freedesktop.org/drm/drm-miscDave Airlie authored
drm-misc-next for 6.8: UAPI Changes: - Remove Userspace Mode-Setting ioctls - v3d: New uapi to handle jobs involving the CPU Cross-subsystem Changes: Core Changes: - atomic: Add support for FB-less planes which got reverted a bit later for lack of IGT tests and userspace code, Dump private objects state in drm_state_dump. - dma-buf: Add fence deadline support - encoder: Create per-encoder debugfs directory, move the bridge chain file to that directory Driver Changes: - Include drm_auth.h in driver that use it but don't include it, Drop drm_plane_helper.h from drivers that include it but don't use it - imagination: Plenty of small fixes - panfrost: Improve interrupt handling at poweroff - qaic: Convert to persistent DRM devices - tidss: Support for the AM62A7, a few probe improvements, some cleanups - v3d: Support for jobs involving the CPU - bridge: - Create transparent aux-bridge for DP/USB-C - lt8912b: Add suspend/resume support and power regulator support - panel: - himax-hx8394: Drop prepare, unprepare and shutdown logic, Support panel rotation - New panels: BOE BP101WX1-100, Powkiddy X55, Ampire AM8001280G, Evervision VGG644804, SDC ATNA45AF01 Signed-off-by: -
git://anongit.freedesktop.org/drm/drm-intelDave Airlie authored
- Improve display debug msgs and other general clean-ups (Ville, Rahuul) - PSR fixes and improvements around selective fetch (Jouni, Ville) - Remove FBC restrictions for Xe2LPD displays (Vinod) - Skip some timing checks on BXT/GLK DSI transcoders (Ville) - DP MST Fixes (Ville) - Correct the input parameter on _intel_dsb_commit (heminhong) - Fix IP version of the display WAs (Bala) - DGFX uses direct VBT pin mapping (Clint) - Proper handling of bool on PIPE_CONF_CHECK macros (Jani) - Skip state verification with TBT-ALT mod (Mika Kahona) - General organization of display code for reusage with Xe (Jouni, Luca, Jani, Maarten) - Squelch a sparse warning (Jani) - Don't use "proxy" headers (Andy Shevchenko) - Use devm_gpiod_get() for all GPIOs (Hans) - Fix ADL+ tiled plane stride (Ville) - Use octal permissions in display debugfs (Jani) Signed-off-by:
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- 07 Dec, 2023 7 commits
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Jouni Högander authored
Xe needs intel_fb_bo_framebuffer_fini for taking care of unpinning the fb and taking reference. In i915 this can be empty. Also move intel_frontbuffer_get to be done after intel_fb_bo_framebuffer_init to have reasonable sequences: intel_fb_bo_framebuffer_init intel_frontbuffer_get ... intel_frontbuffer_put intel_fb_bo_framebuffer_fini v2: Empty function instead of define Signed-off-by:
Jouni Högander <jouni.hogander@intel.com> Reviewed-by:
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Maarten Lankhorst authored
Works better for xe like that. obj is no longer const. Signed-off-by:
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Jani Nikula authored
Octal permissions are preferred over the symbolics ones. Signed-off-by:
Ville Syrjälä <ville.syrjala@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20231205134143.2427661-3-jani.nikula@intel.com
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Jani Nikula authored
Prefer struct intel_connector over struct drm_connector, and unify the declarations in the fops. Signed-off-by:
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Jani Nikula authored
Prefer struct intel_connector over struct drm_connector. Signed-off-by:
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Jani Nikula authored
Reduce the duplication. Signed-off-by:
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Luca Coelho authored
The uncore code may not always be available (e.g. when we build the display code with Xe), so we can't always rely on having the uncore's spinlock. To handle this, split the spin_lock/unlock_irqsave/restore() into spin_lock/unlock() followed by a call to local_irq_save/restore() and create wrapper functions for locking and unlocking the uncore's spinlock. In these functions, we have a condition check and only actually try to lock/unlock the spinlock when I915 is defined, and thus uncore is available. This keeps the ifdefs contained in these new functions and all such logic inside the display code. Cc: Tvrtko Ursulin <tvrto.ursulin@intel.com> Cc: Jani Nikula <jani.nikula@intel.com> Cc: Ville Syrjala <ville.syrjala@linux.intel.com> Cc: Rodrigo Vivi <rodrigo.vivi@intel.com> Signed-off-by:
Luca Coelho <luciano.coelho@intel.com> Reviewed-by:
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