- 11 Jun, 2021 40 commits
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Calvin Johnson authored
Depending on the device node type, call the specific OF or ACPI mdiobus_register function. Note: For both ACPI and DT cases, endianness of MDIO controllers need to be specified using the "little-endian" property. Signed-off-by:
Calvin Johnson <calvin.johnson@oss.nxp.com> Signed-off-by:
Ioana Ciornei <ioana.ciornei@nxp.com> Acked-by:
Grant Likely <grant.likely@arm.com> Signed-off-by:
David S. Miller <davem@davemloft.net>
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Calvin Johnson authored
Define acpi_mdiobus_register() to Register mii_bus and create PHYs for each ACPI child node. Signed-off-by:
Rafael J. Wysocki <rafael@kernel.org> Acked-by:
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Calvin Johnson authored
Introduce a wrapper around the _ADR evaluation. Signed-off-by:
Andy Shevchenko <andy.shevchenko@gmail.com> Signed-off-by:
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Calvin Johnson authored
Refactor of_mdiobus_register_phy() to use fwnode_mdiobus_register_phy(). Also, remove the of_find_mii_timestamper() since the fwnode variant is used instead. Signed-off-by:
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Calvin Johnson authored
Introduce fwnode_mdiobus_register_phy() to register PHYs on the mdiobus. From the compatible string, identify whether the PHY is c45 and based on this create a PHY device instance which is registered on the mdiobus. Along with fwnode_mdiobus_register_phy() also introduce fwnode_find_mii_timestamper() and fwnode_mdiobus_phy_device_register() since they are needed. While at it, also use the newly introduced fwnode operation in of_mdiobus_phy_device_register(). Signed-off-by:
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Calvin Johnson authored
Callers of unregister_mii_timestamper() currently check for NULL value of mii_ts before calling it. Place the NULL check inside unregister_mii_timestamper() and update the callers accordingly. Signed-off-by:
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Calvin Johnson authored
With the introduction of fwnode_get_phy_id(), refactor of_get_phy_id() to use fwnode equivalent. Signed-off-by:
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Calvin Johnson authored
Extract phy_id from compatible string. This will be used by fwnode_mdiobus_register_phy() to create phy device using the phy_id. Signed-off-by:
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Calvin Johnson authored
Refactor of_phy_find_device() to use fwnode_phy_find_device(). Signed-off-by:
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Calvin Johnson authored
Define fwnode_phy_find_device() to iterate an mdiobus and find the phy device of the provided phy fwnode. Additionally define device_phy_find_device() to find phy device of provided device. Define fwnode_get_phy_node() to get phy_node using named reference. Signed-off-by:
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Calvin Johnson authored
Define fwnode_mdio_find_device() to get a pointer to the mdio_device from fwnode passed to the function. Refactor of_mdio_find_device() to use fwnode_mdio_find_device(). Signed-off-by:
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Calvin Johnson authored
Introduce a mechanism based on generic ACPI _DSD device properties definition [1] to get PHYs registered on a MDIO bus and provide them to be connected to MAC. [1] http://www.uefi.org/sites/default/files/resources/_DSD-device-properties-UUID.pdf Describe properties "phy-handle" and "phy-mode". Signed-off-by:
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Wong Vee Khee authored
The commit 8532f613 ("net: stmmac: introduce MSI Interrupt routines for mac, safety, RX & TX") introduced the converity warnings:- 1. Unused value (UNUSED_VALUE) assigned_value: Assigning value REQ_IRQ_ERR_MAC to irq_err here, but that stored value is not used. 2. Unused value (UNUSED_VALUE) assigned_value: Assigning value REQ_IRQ_ERR_NO to irq_err here, but that stored value is overwritten before it can used. 3. Unused value (UNUSED_VALUE) assigned_value: Assigning value REQ_IRQ_ERR_WOL to irq_err here, but that stored value is not used. Fixed these by removing the unnecessary value assignments. Fixes: 8532f613 ("net: stmmac: introduce MSI Interrupt routines for mac, safety, RX & TX") Signed-off-by:
Wong Vee Khee <vee.khee.wong@linux.intel.com> Signed-off-by:
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Oleksij Rempel authored
Take over PHY power management, otherwise PHY framework will try to access ASIX MDIO bus before MAC resume was completed. Fixes: e532a096 ("net: usb: asix: ax88772: add phylib support") Signed-off-by:
Oleksij Rempel <o.rempel@pengutronix.de> Reported-by:
Marek Szyprowski <m.szyprowski@samsung.com> Reported-by:
Jon Hunter <jonathanh@nvidia.com> Suggested-by:
Heiner Kallweit <hkallweit1@gmail.com> Tested-by:
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David S. Miller authored
Peng Li says: ==================== net: pc300too: clean up some code style issues This patchset clean up some code style issues. ==================== Signed-off-by: -
Peng Li authored
Networking block comments don't use an empty /* line, use /* Comment... This patch fixes the comments style issues. Signed-off-by:
Peng Li <lipeng321@huawei.com> Signed-off-by:
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Peng Li authored
Add spaces required before the open parenthesis '('. Add spaces required after that close brace '}'. Signed-off-by:Guangbin Huang <huangguangbin2@huawei.com> Signed-off-by:
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Peng Li authored
According to the chackpatch.pl, comparison to NULL could be written "!card->plxbase". Signed-off-by:
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Peng Li authored
Should not initialise statics to 0. Signed-off-by:
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Peng Li authored
Should not use assignment in if condition. Signed-off-by:
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Peng Li authored
Fix the checkpatch error as "foo * bar" and should be "foo *bar". Signed-off-by:
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Peng Li authored
This patch fixes the checkpatch error about missing a blank line after declarations. Signed-off-by:
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Peng Li authored
This patch removes some redundant blank lines. Signed-off-by:
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gushengxian authored
Correct a grammatical error. Signed-off-by:
gushengxian <gushengxian@yulong.com> Signed-off-by:
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Heiner Kallweit authored
It has been reported that on RTL8106e the link-up interrupt may be significantly delayed if the user enables ASPM L1. Per default ASPM is disabled. The change leaves L1 enabled on the PCIe link (thus still allowing to reach higher package power saving states), but the NIC won't actively trigger it. Reported-by:
Koba Ko <koba.ko@canonical.com> Tested-by:
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wengjianfeng authored
Some labels are meaningless, so we delete them and use the return statement instead of the goto statement. Signed-off-by:
wengjianfeng <wengjianfeng@yulong.com> Reviewed-by:
Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com> Signed-off-by:
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David S. Miller authored
Julian Wiedmann says: ==================== s390/qeth: updates 2021-06-11 please apply the following patch series for qeth to netdev's net-next tree. This enables TX NAPI for those devices that didn't use it previously, so that we can eventually rip out the qdio layer's internal interrupt machinery. Other than that it's just the normal mix of minor improvements and cleanups. ==================== Signed-off-by: -
Alexandra Winter authored
Without the SWITCHDEV module, the bridgeport attribute LEARNING_SYNC of the physical device (self) does not provide any functionality. Instead of calling the no-op stub version of the switchdev functions, fail the setting of the attribute with an appropriate message. While at it, also add an error message for the 'not supported by HW' case. Signed-off-by:
Alexandra Winter <wintera@linux.ibm.com> Reviewed-by:
Julian Wiedmann <jwi@linux.ibm.com> Signed-off-by:
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Julian Wiedmann authored
Convert the large boolean array into a bitmap, this substantially reduces the struct's size. While at it also clarify the naming. Signed-off-by:
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Julian Wiedmann authored
qeth_tx_complete_buf() is the only remaining user of buf->q, and the callers can easily provide this as a parameter instead. Signed-off-by:
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Julian Wiedmann authored
Maintaining a pointer inside the aob's user-definable area is fragile and unnecessary. At this stage we only need it to overload the buffer's state field, and to access the buffer's TX queue. The first part is easily solved by tracking the aob's state within the aob itself. This also feels much cleaner and self-contained. For enabling the access to the associated TX queue, we can store the queue's index in the aob. Signed-off-by:
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Julian Wiedmann authored
With commit 396c1004 ("s390/qdio: let driver manage the QAOB") a pending TX buffer now has access to its associated QAOB during TX completion processing. We can thus reduce the amount of work & state propagation that needs to be done by qeth_qdio_handle_aob(). Move all this logic into the respective TX completion paths. Doing so even allows us to determine more precise TX_NOTIFY_* values via qeth_compute_cq_notification(aob->aorc, ...). Signed-off-by:
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Julian Wiedmann authored
Use a recently introduced helper to fill our ethtool stats strings. Signed-off-by:
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Julian Wiedmann authored
We have one field to track _whether_ a cmd is active on a ccw device ('irq_pending'), and one to track _which_ cmd it is ('active_cmd'). Get rid of the irq_pending field, by testing active_cmd for NULL. Signed-off-by: -
Julian Wiedmann authored
Set scan_threshold = 0 to opt out from the qdio layer's internal tasklet & timer mechanism for TX completions, and replace it with the TX NAPI infrastructure that qeth already uses for IQD devices. This avoids the fragile logic in qdio_check_output_queue(), enables tighter integration and gives us more tuning options via ethtool in the future. For now we continue to apply the same policy as the qdio layer: scan for completions if 32 TX buffers are in use, or after 1 sec. A re-scan is done after 10 sec, but only if no TX interrupt is pending. With scan_threshold = 0 we no longer get TX completion scans from within qdio_get_next_buffers(). So trigger these manually in qeth_poll() and in the RX path switch to the equivalent qdio_inspect_queue(). Signed-off-by:
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Julian Wiedmann authored
While the qdio layer already tracks the number of HW interrupts for a device, there's value in understanding how many of them have been raised due to our TX completion logic. Signed-off-by:
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David S. Miller authored
Vladimir Oltean says: ==================== DSA tagging driver for NXP SJA1110 This series adds support for tagging data and control packets on the new NXP SJA1110 switch (supported by the sja1105 driver). Up to this point it used the sja1105 driver, which allowed it to send data packets, but not PDUs as those required by STP and PTP. To accommodate this new tagger which has both a header and a trailer, we need to refactor the entire DSA tagging scheme, to replace the "overhead" concept with separate "needed_headroom" and "needed_tailroom" concepts, so that SJA1110 can declare its need for both. There is also some consolidation work for the receive path of tag_8021q and its callers (sja1105 and ocelot-8021q). Changes in v3: Rebase in front of the "Port the SJA1105 DSA driver to XPCS" series which seems to have stalled for now. Changes in v2: Export the dsa_8021q_rcv and sja1110_process_meta_tstamp symbols to avoid build errors as modules. ==================== Signed-off-by: -
Vladimir Oltean authored
The TX timestamping procedure for SJA1105 is a bit unconventional because the transmit procedure itself is unconventional. Control packets (and therefore PTP as well) are transmitted to a specific port in SJA1105 using "management routes" which must be written over SPI to the switch. These are one-shot rules that match by destination MAC address on traffic coming from the CPU port, and select the precise destination port for that packet. So to transmit a packet from NET_TX softirq context, we actually need to defer to a process context so that we can perform that SPI write before we send the packet. The DSA master dev_queue_xmit() runs in process context, and we poll until the switch confirms it took the TX timestamp, then we annotate the skb clone with that TX timestamp. This is why the sja1105 driver does not need an skb queue for TX timestamping. But the SJA1110 is a bit (not much!) more conventional, and you can request 2-step TX timestamping through the DSA header, as well as give the switch a cookie (timestamp ID) which it will give back to you when it has the timestamp. So now we do need a queue for keeping the skb clones until their TX timestamps become available. The interesting part is that the metadata frames from SJA1105 haven't disappeared completely. On SJA1105 they were used as follow-ups which contained RX timestamps, but on SJA1110 they are actually TX completion packets, which contain a variable (up to 32) array of timestamps. Why an array? Because: - not only is the TX timestamp on the egress port being communicated, but also the RX timestamp on the CPU port. Nice, but we don't care about that, so we ignore it. - because a packet could be multicast to multiple egress ports, each port takes its own timestamp, and the TX completion packet contains the individual timestamps on each port. This is unconventional because switches typically have a timestamping FIFO and raise an interrupt, but this one doesn't. So the tagger needs to detect and parse meta frames, and call into the main switch driver, which pairs the timestamps with the skbs in the TX timestamping queue which are waiting for one. Signed-off-by:
Vladimir Oltean <vladimir.oltean@nxp.com> Signed-off-by:
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Vladimir Oltean authored
This is really easy, since the full RX timestamp is in the DSA trailer and the tagger code transfers it to SJA1105_SKB_CB(skb)->tstamp, we just need to move it to the skb shared info region. This is as opposed to SJA1105, where the RX timestamp was received in a meta frame (so there needed to be a state machine to pair the 2 packets) and the timestamp was partial (so the packet, once matched with its timestamp, needed to be added to an RX timestamping queue where the PTP aux worker would reconstruct that timestamp). Signed-off-by:
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Vladimir Oltean authored
The SJA1110 has improved a few things compared to SJA1105: - To send a control packet from the host port with SJA1105, one needed to program a one-shot "management route" over SPI. This is no longer true with SJA1110, you can actually send "in-band control extensions" in the packets sent by DSA, these are in fact DSA tags which contain the destination port and switch ID. - When receiving a control packet from the switch with SJA1105, the source port and switch ID were written in bytes 3 and 4 of the destination MAC address of the frame (which was a very poor shot at a DSA header). If the control packet also had an RX timestamp, that timestamp was sent in an actual follow-up packet, so there were reordering concerns on multi-core/multi-queue DSA masters, where the metadata frame with the RX timestamp might get processed before the actual packet to which that timestamp belonged (there is no way to pair a packet to its timestamp other than the order in which they were received). On SJA1110, this is no longer true, control packets have the source port, switch ID and timestamp all in the DSA tags. - Timestamps from the switch were partial: to get a 64-bit timestamp as required by PTP stacks, one would need to take the partial 24-bit or 32-bit timestamp from the packet, then read the current PTP time very quickly, and then patch in the high bits of the current PTP time into the captured partial timestamp, to reconstruct what the full 64-bit timestamp must have been. That is awful because packet processing is done in NAPI context, but reading the current PTP time is done over SPI and therefore needs sleepable context. But it also aggravated a few things: - Not only is there a DSA header in SJA1110, but there is a DSA trailer in fact, too. So DSA needs to be extended to support taggers which have both a header and a trailer. Very unconventional - my understanding is that the trailer exists because the timestamps couldn't be prepared in time for putting them in the header area. - Like SJA1105, not all packets sent to the CPU have the DSA tag added to them, only control packets do: * the ones which match the destination MAC filters/traps in MAC_FLTRES1 and MAC_FLTRES0 * the ones which match FDB entries which have TRAP or TAKETS bits set So we could in theory hack something up to request the switch to take timestamps for all packets that reach the CPU, and those would be DSA-tagged and contain the source port / switch ID by virtue of the fact that there needs to be a timestamp trailer provided. BUT: - The SJA1110 does not parse its own DSA tags in a way that is useful for routing in cross-chip topologies, a la Marvell. And the sja1105 driver already supports cross-chip bridging from the SJA1105 days. It does that by automatically setting up the DSA links as VLAN trunks which contain all the necessary tag_8021q RX VLANs that must be communicated between the switches that span the same bridge. So when using tag_8021q on sja1105, it is possible to have 2 switches with ports sw0p0, sw0p1, sw1p0, sw1p1, and 2 VLAN-unaware bridges br0 and br1, and br0 can take sw0p0 and sw1p0, and br1 can take sw0p1 and sw1p1, and forwarding will happen according to the expected rules of the Linux bridge. We like that, and we don't want that to go away, so as a matter of fact, the SJA1110 tagger still needs to support tag_8021q. So the sja1110 tagger is a hybrid between tag_8021q for data packets, and the native hardware support for control packets. On RX, packets have a 13-byte trailer if they contain an RX timestamp. That trailer is padded in such a way that its byte 8 (the start of the "residence time" field - not parsed by Linux because we don't care) is aligned on a 16 byte boundary. So the padding has a variable length between 0 and 15 bytes. The DSA header contains the offset of the beginning of the padding relative to the beginning of the frame (and the end of the padding is obviously the end of the packet minus 13 bytes, the length of the trailer). So we discard it. Packets which don't have a trailer contain the source port and switch ID information in the header (they are "trap-to-host" packets). Packets which have a trailer contain the source port and switch ID in the trailer. On TX, the destination port mask and switch ID is always in the trailer, so we always need to say in the header that a trailer is present. The header needs a custom EtherType and this was chosen as 0xdadc, after 0xdada which is for Marvell and 0xdadb which is for VLANs in VLAN-unaware mode on SJA1105 (and SJA1110 in fact too). Because we use tag_8021q in concert with the native tagging protocol, control packets will have 2 DSA tags. Signed-off-by:
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