- 28 Sep, 2022 5 commits
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Ulf Hansson authored
Merge the mmc fixes for v6.0rc[n] into the next branch, to allow them to get tested together with the new mmc changes that are targeted for v6.1. Signed-off-by:
Ulf Hansson <ulf.hansson@linaro.org>
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Adrian Hunter authored
Centralize CMD and DATA reset handling so that is more obvious how reset is handled in different situations. Signed-off-by:
Adrian Hunter <adrian.hunter@intel.com> Reviewed-by:
Thierry Reding <treding@nvidia.com> Link: https://lore.kernel.org/r/20220926192022.85660-5-adrian.hunter@intel.comSigned-off-by:
Ulf Hansson <ulf.hansson@linaro.org>
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Adrian Hunter authored
SDHCI_QUIRK_RESET_CMD_DATA_ON_IOS is used by only ENE controllers but can be replaced by driver code. Amend the ENE code to hook the ->set_ios() mmc host operation and do the reset there. Signed-off-by:
Adrian Hunter <adrian.hunter@intel.com> Reviewed-by:
Thierry Reding <treding@nvidia.com> Link: https://lore.kernel.org/r/20220926192022.85660-4-adrian.hunter@intel.comSigned-off-by:
Ulf Hansson <ulf.hansson@linaro.org>
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Adrian Hunter authored
In SDHCI specification section 3.10.1 Error Interrupt Recovery, the flow chart shows Software Reset for CMD separately and before Software Reset for DAT, so the comment "Spec says we should do both at the same time" is not correct. Remove it. Signed-off-by:
Adrian Hunter <adrian.hunter@intel.com> Reviewed-by:
Thierry Reding <treding@nvidia.com> Link: https://lore.kernel.org/r/20220926192022.85660-3-adrian.hunter@intel.comSigned-off-by:
Ulf Hansson <ulf.hansson@linaro.org>
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Adrian Hunter authored
Tidy sdhci_do_reset() slightly by separating out sdhci_reset_for_all() which removes the need to test the mask in sdhci_do_reset(). Signed-off-by:
Adrian Hunter <adrian.hunter@intel.com> Reviewed-by:
Thierry Reding <treding@nvidia.com> Link: https://lore.kernel.org/r/20220926192022.85660-2-adrian.hunter@intel.comSigned-off-by:
Ulf Hansson <ulf.hansson@linaro.org>
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- 27 Sep, 2022 5 commits
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Kishon Vijay Abraham I authored
Add Vignesh Raghavendra as maintainer of TI SDHCI OMAP DRIVER. Cc: Vignesh Raghavendra <vigneshr@ti.com> Signed-off-by:
Kishon Vijay Abraham I <kishon@ti.com> Link: https://lore.kernel.org/r/20220923065005.20062-1-kishon@ti.comSigned-off-by:
Ulf Hansson <ulf.hansson@linaro.org>
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Richard Acayan authored
The Snapdragon 670 has the same quirk as Snapdragon 845 (needing to restore the dll config). Add a compatible string check to detect the need for this. Signed-off-by:
Richard Acayan <mailingradian@gmail.com> Reviewed-by:
Bhupesh Sharma <bhupesh.sharma@linaro.org> Acked-by:
Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20220923014322.33620-3-mailingradian@gmail.comSigned-off-by:
Ulf Hansson <ulf.hansson@linaro.org>
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Richard Acayan authored
The Snapdragon 670 supports eMMC with an SDHCI controller. Add the appropriate compatible to the documentation. Signed-off-by:
Richard Acayan <mailingradian@gmail.com> Reviewed-by:
Bhupesh Sharma <bhupesh.sharma@linaro.org> Reviewed-by:
Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20220923014322.33620-2-mailingradian@gmail.comSigned-off-by:
Ulf Hansson <ulf.hansson@linaro.org>
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Christophe JAILLET authored
A dma_free_coherent() call is missing in the error handling path of the probe, as already done in the remove function. Fixes: 3a96dff0 ("mmc: SD/MMC Host Controller for Wondermedia WM8505/WM8650") Signed-off-by:
Christophe JAILLET <christophe.jaillet@wanadoo.fr> Reviewed-by:
Dan Carpenter <dan.carpenter@oracle.com> Link: https://lore.kernel.org/r/53fc6ffa5d1c428fefeae7d313cf4a669c3a1e98.1663873255.git.christophe.jaillet@wanadoo.frSigned-off-by:
Ulf Hansson <ulf.hansson@linaro.org>
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Wenchao Chen authored
The block device uses multiple queues to access emmc. There will be up to 3 requests in the hsq of the host. The current code will check whether there is a request doing recovery before entering the queue, but it will not check whether there is a request when the lock is issued. The request is in recovery mode. If there is a request in recovery, then a read and write request is initiated at this time, and the conflict between the request and the recovery request will cause the data to be trampled. Signed-off-by:
Wenchao Chen <wenchao.chen@unisoc.com> Fixes: 511ce378 ("mmc: Add MMC host software queue support") Cc: stable@vger.kernel.org Link: https://lore.kernel.org/r/20220916090506.10662-1-wenchao.chen666@gmail.comSigned-off-by:
Ulf Hansson <ulf.hansson@linaro.org>
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- 23 Sep, 2022 1 commit
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Ulf Hansson authored
This reverts commit a3b884ce ("firmware: arm_scmi: Add clock management to the SCMI power domain"). Using the GENPD_FLAG_PM_CLK tells genpd to gate/ungate the consumer device's clock(s) during runtime suspend/resume through the PM clock API. More precisely, in genpd_runtime_resume() the clock(s) for the consumer device would become ungated prior to the driver-level ->runtime_resume() callbacks gets invoked. This behaviour isn't a good fit for all platforms/drivers. For example, a driver may need to make some preparations of its device in its ->runtime_resume() callback, like calling clk_set_rate() before the clock(s) should be ungated. In these cases, it's easier to let the clock(s) to be managed solely by the driver, rather than at the PM domain level. For these reasons, let's drop the use GENPD_FLAG_PM_CLK for the SCMI PM domain, as to enable it to be more easily adopted across ARM platforms. Fixes: a3b884ce ("firmware: arm_scmi: Add clock management to the SCMI power domain") Cc: Nicolas Pitre <npitre@baylibre.com> Cc: stable@vger.kernel.org Signed-off-by:
Ulf Hansson <ulf.hansson@linaro.org> Tested-by:
Peng Fan <peng.fan@nxp.com> Acked-by:
Sudeep Holla <sudeep.holla@arm.com> Link: https://lore.kernel.org/r/20220919122033.86126-1-ulf.hansson@linaro.org
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- 21 Sep, 2022 2 commits
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Ulf Hansson authored
Merge the mmc fixes for v6.0rc[n] into the next branch, to allow them to get tested together with the new mmc changes that are targeted for v6.1. Signed-off-by:
Ulf Hansson <ulf.hansson@linaro.org>
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Brian Norris authored
This loop intends to retry a max of 10 times, with some implicit termination based on the SD_{R,}OCR_S18A bit. Unfortunately, the termination condition depends on the value reported by the SD card (*rocr), which may or may not correctly reflect what we asked it to do. Needless to say, it's not wise to rely on the card doing what we expect; we should at least terminate the loop regardless. So, check both the input and output values, so we ensure we will terminate regardless of the SD card behavior. Note that SDIO learned a similar retry loop in commit 0797e5f1 ("mmc: core: Fixup signal voltage switch"), but that used the 'ocr' result, and so the current pre-terminating condition looks like: rocr & ocr & R4_18V_PRESENT (i.e., it doesn't have the same bug.) This addresses a number of crash reports seen on ChromeOS that look like the following: ... // lots of repeated: ... <4>[13142.846061] mmc1: Skipping voltage switch <4>[13143.406087] mmc1: Skipping voltage switch <4>[13143.964724] mmc1: Skipping voltage switch <4>[13144.526089] mmc1: Skipping voltage switch <4>[13145.086088] mmc1: Skipping voltage switch <4>[13145.645941] mmc1: Skipping voltage switch <3>[13146.153969] INFO: task halt:30352 blocked for more than 122 seconds. ... Fixes: f2119df6 ("mmc: sd: add support for signal voltage switch procedure") Cc: <stable@vger.kernel.org> Signed-off-by:
Brian Norris <briannorris@chromium.org> Reviewed-by:
Guenter Roeck <linux@roeck-us.net> Link: https://lore.kernel.org/r/20220914014010.2076169-1-briannorris@chromium.orgSigned-off-by:
Ulf Hansson <ulf.hansson@linaro.org>
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- 20 Sep, 2022 5 commits
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ye xingchen authored
Return the value rtsx_usb_send_cmd() directly instead of storing it in another redundant variable. Reported-by:
Zeal Robot <zealci@zte.com.cn> Signed-off-by:
ye xingchen <ye.xingchen@zte.com.cn> Link: https://lore.kernel.org/r/20220920064648.215375-1-ye.xingchen@zte.com.cnSigned-off-by:
Ulf Hansson <ulf.hansson@linaro.org>
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Peter Robinson authored
The MMC_SDHCI_OF_ASPEED is part of the Aspeed silicon so it makes sense to depend on ARCH_ASPEED and for compile testing. Signed-off-by:
Peter Robinson <pbrobinson@gmail.com> Link: https://lore.kernel.org/r/20220916115602.370003-1-pbrobinson@gmail.comSigned-off-by:
Ulf Hansson <ulf.hansson@linaro.org>
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AngeloGioacchino Del Regno authored
Add support for MT6795 with a new compatible string and platform data. Signed-off-by:
AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Link: https://lore.kernel.org/r/20220915120923.86038-3-angelogioacchino.delregno@collabora.comSigned-off-by:
Ulf Hansson <ulf.hansson@linaro.org>
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AngeloGioacchino Del Regno authored
Both of_device_id compatible strings and platform data were partially ordered by name. Fix the ordering. This commit brings no functional changes. Signed-off-by:
AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Link: https://lore.kernel.org/r/20220915120923.86038-2-angelogioacchino.delregno@collabora.comSigned-off-by:
Ulf Hansson <ulf.hansson@linaro.org>
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Wenchao Chen authored
Because the bit field size of the divider coefficient register is 1023, it is limited before returning the value. Signed-off-by:
Wenchao Chen <wenchao.chen@unisoc.com> Link: https://lore.kernel.org/r/20220914063702.20283-1-wenchao.chen666@gmail.comSigned-off-by:
Ulf Hansson <ulf.hansson@linaro.org>
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- 14 Sep, 2022 21 commits
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Ulf Hansson authored
Merge the mmc fixes for v6.0rc[n] into the next branch, to allow them to get tested together with the new mmc changes that are targeted for v6.1. Signed-off-by:
Ulf Hansson <ulf.hansson@linaro.org>
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Sergei Antonov authored
According to the datasheet [1] at page 377, 4-bit bus width is turned on by bit 2 of the Bus Width Register. Thus the current bitmask is wrong: define BUS_WIDTH_4 BIT(1) BIT(1) does not work but BIT(2) works. This has been verified on real MOXA hardware with FTSDC010 controller revision 1_6_0. The corrected value of BUS_WIDTH_4 mask collides with: define BUS_WIDTH_8 BIT(2). Additionally, 8-bit bus width mode isn't supported according to the datasheet, so let's remove the corresponding code. [1] https://bitbucket.org/Kasreyn/mkrom-uc7112lx/src/master/documents/FIC8120_DS_v1.2.pdf Fixes: 1b66e94e ("mmc: moxart: Add MOXA ART SD/MMC driver") Signed-off-by:
Sergei Antonov <saproj@gmail.com> Cc: Jonas Jensen <jonas.jensen@gmail.com> Cc: stable@vger.kernel.org Link: https://lore.kernel.org/r/20220907205753.1577434-1-saproj@gmail.comSigned-off-by:
Ulf Hansson <ulf.hansson@linaro.org>
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Wenchao Chen authored
When data crc occurs, the kernel will panic because host->cmd is null. Signed-off-by:
Wenchao Chen <wenchao.chen@unisoc.com> Fixes: efe8f5c9 ("mmc: sdhci: Capture eMMC and SD card errors") Cc: stable@vger.kernel.org Acked-by:
Adrian Hunter <adrian.hunter@intel.com> Link: https://lore.kernel.org/r/20220907035847.13783-1-wenchao.chen666@gmail.comSigned-off-by:
Ulf Hansson <ulf.hansson@linaro.org>
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Iskren Chernev authored
Most mmc blocks contain two pinctrls, default and sleep. But then dt-schema complains about pinctrl-1 not being defined. Signed-off-by:
Iskren Chernev <iskren.chernev@gmail.com> Acked-by:
Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by:
Bhupesh Sharma <bhupesh.sharma@linaro.org> Link: https://lore.kernel.org/r/20220910143213.477261-6-iskren.chernev@gmail.comSigned-off-by:
Ulf Hansson <ulf.hansson@linaro.org>
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Johan Jonker authored
Add rockchip,rk3128-dw-mshc compatible string. Signed-off-by:
Johan Jonker <jbx6244@gmail.com> Acked-by:
Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/f2cb42c8-3664-a2d5-074d-5c9a10c693e8@gmail.comSigned-off-by:
Ulf Hansson <ulf.hansson@linaro.org>
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Lad Prabhakar authored
The SDHI blocks on Renesas R-Car and RZ/G2 SoCs make use of IOMMU. This patch fixes the below dtbs_check warnings: arch/arm64/boot/dts/renesas/r8a774e1-hihope-rzg2h-ex-idk-1110wr.dtb: mmc@ee100000: Unevaluated properties are not allowed ('iommus' was unexpected) From schema: Documentation/devicetree/bindings/mmc/renesas,sdhi.yaml Signed-off-by:
Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Reviewed-by:
Geert Uytterhoeven <geert+renesas@glider.be> Acked-by:
Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20220831214314.7794-1-prabhakar.mahadev-lad.rj@bp.renesas.comSigned-off-by:
Ulf Hansson <ulf.hansson@linaro.org>
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ye xingchen authored
Return the value cqhci_init() directly instead of storing it in another redundant variable. Reported-by:
Zeal Robot <zealci@zte.com.cn> Signed-off-by:
ye xingchen <ye.xingchen@zte.com.cn> Acked-by:
Adrian Hunter <adrian.hunter@intel.com> Link: https://lore.kernel.org/r/20220830083349.276709-1-ye.xingchen@zte.com.cnSigned-off-by:
Ulf Hansson <ulf.hansson@linaro.org>
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Heiner Kallweit authored
Add SDIO interrupt support. Successfully tested on a S905X4-based system (V3 register layout) with a BRCM4334 SDIO wifi module (brcmfmac driver). Signed-off-by:
Heiner Kallweit <hkallweit1@gmail.com> Link: https://lore.kernel.org/r/27bffe3c-e579-3581-95e8-2587733487d2@gmail.comSigned-off-by:
Ulf Hansson <ulf.hansson@linaro.org>
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Heiner Kallweit authored
Constant IRQ_EN_MASK has no user currently. In preparation of adding SDIO interrupt support, revive it and adjust it to our needs. Signed-off-by:
Heiner Kallweit <hkallweit1@gmail.com> Link: https://lore.kernel.org/r/8056622f-2adf-4763-7423-9ccdf4ca78e1@gmail.comSigned-off-by:
Ulf Hansson <ulf.hansson@linaro.org>
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Jack Wang authored
dma_map_sg return 0 on error. Signed-off-by:
Jack Wang <jinpu.wang@ionos.com> Acked-by:
Paul Cercueil <paul@crapouillou.net> Link: https://lore.kernel.org/r/20220825074008.33349-3-jinpu.wang@ionos.comSigned-off-by:
Ulf Hansson <ulf.hansson@linaro.org>
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Jack Wang authored
dma_map_sg return 0 on error, also change the type for dma_len from int to unsigned int. Cc: Neil Armstrong <narmstrong@baylibre.com> Cc: Kevin Hilman <khilman@baylibre.com> Cc: Jerome Brunet <jbrunet@baylibre.com> Cc: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Signed-off-by:
Jack Wang <jinpu.wang@ionos.com> Link: https://lore.kernel.org/r/20220825074008.33349-2-jinpu.wang@ionos.comSigned-off-by:
Ulf Hansson <ulf.hansson@linaro.org>
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Christophe JAILLET authored
If clk_prepare_enable() fails, there is no point in calling clk_disable_unprepare() in the error handling path. Move the out_clk label at the right place. Fixes: b6507596 ("MIPS: Alchemy: au1xmmc: use clk framework") Signed-off-by:
Christophe JAILLET <christophe.jaillet@wanadoo.fr> Link: https://lore.kernel.org/r/21d99886d07fa7fcbec74992657dabad98c935c4.1661412818.git.christophe.jaillet@wanadoo.frSigned-off-by:
Ulf Hansson <ulf.hansson@linaro.org>
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Apurva Nandan authored
dma-coherent is mentioned in almost all TI K3 platform mmc nodes. Fix warning generated due to its missing match in yaml schema. Signed-off-by:
Apurva Nandan <a-nandan@ti.com> Acked-by:
Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20220819190729.32358-3-a-nandan@ti.comSigned-off-by:
Ulf Hansson <ulf.hansson@linaro.org>
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Heiner Kallweit authored
The delay parameter isn't set by any user, therefore simplify the code and switch to the basic workqueue API w/o delay support. This also reduces the size of struct mmc_host. Signed-off-by:
Heiner Kallweit <hkallweit1@gmail.com> Link: https://lore.kernel.org/r/13d8200a-e2a8-d907-38ce-a16fc5ce14aa@gmail.comSigned-off-by:
Ulf Hansson <ulf.hansson@linaro.org>
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Adam Skladowski authored
Document the compatible for SDHCI on SM6115. Signed-off-by:
Adam Skladowski <a39.skl@gmail.com> Acked-by:
Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20220815100952.23795-4-a39.skl@gmail.comSigned-off-by:
Ulf Hansson <ulf.hansson@linaro.org>
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Adrian Hunter authored
Currently, status is "Supported" not "Maintained" for SDHCI and CQHCI. Amend MAINTAINERS accordingly. Signed-off-by:
Adrian Hunter <adrian.hunter@intel.com> Link: https://lore.kernel.org/r/20220815105905.65188-1-adrian.hunter@intel.comSigned-off-by:
Ulf Hansson <ulf.hansson@linaro.org>
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Conor Dooley authored
Mails to Piotr bounce with a :550 5.1.1 User Unknown and the last mention of him on lore is the orphaning of Cadence NFC drivers. Remove him from the binding too. Signed-off-by:
Conor Dooley <conor.dooley@microchip.com> Link: https://lore.kernel.org/r/20220811204024.182453-1-mail@conchuod.ieSigned-off-by:
Ulf Hansson <ulf.hansson@linaro.org>
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AngeloGioacchino Del Regno authored
Add a compatible string for the MT6795 SoC's mtk-sd mmc controllers. Signed-off-by:
AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Acked-by:
Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20220729104441.39177-3-angelogioacchino.delregno@collabora.comSigned-off-by:
Ulf Hansson <ulf.hansson@linaro.org>
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Krzysztof Kozlowski authored
spi-max-frequency comes from spi-peripheral-props.yaml. Signed-off-by:
Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Acked-by:
Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20220727164202.385531-1-krzysztof.kozlowski@linaro.orgSigned-off-by:
Ulf Hansson <ulf.hansson@linaro.org>
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Chevron Li authored
Bayhub chips have better compatibility support for SDR50 than DDR50 and both mode have the same R/W performance when clock frequency >= 100MHz. Disable DDR50 mode and use SDR50 instead. Signed-off-by:
Chevron Li <chevron.li@bayhubtech.com> Acked-by:
Adrian Hunter <adrian.hunter@intel.com> Link: https://lore.kernel.org/r/20220729100524.387-1-chevron.li@bayhubtech.comSigned-off-by:
Ulf Hansson <ulf.hansson@linaro.org>
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Bhupesh Sharma authored
As Ulf noted in [1], the maximum operating frequency documented in the mmc-controller device-tree bindings should be updated to the maximum frequency supported by the mmc controller(s). Without this fix in place, the 'make dtbs_check' reports issues with 'max-frequency' value for ipq8074 sdhci node: arch/arm64/boot/dts/qcom/ipq8074-hk01.dtb: mmc@7824900: max-frequency:0:0: 384000000 is greater than the maximum of 200000000 [1]. https://www.spinics.net/lists/kernel/msg4442049.html Cc: Bjorn Andersson <bjorn.andersson@linaro.org> Signed-off-by:
Bhupesh Sharma <bhupesh.sharma@linaro.org> Reviewed-by:
Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20220726084520.2895454-1-bhupesh.sharma@linaro.orgSigned-off-by:
Ulf Hansson <ulf.hansson@linaro.org>
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- 11 Sep, 2022 1 commit
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Linus Torvalds authored
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