- 15 Oct, 2021 5 commits
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Dmitry Baryshkov authored
On sm8250 dispcc and videocc registers are powered up by the MMCX power domain. Currently we use a regulator to enable this domain on demand, however this has some consequences, as genpd code is not reentrant. Make gdsc code also use pm_runtime calls to ensure that registers are accessible during the gdsc_enable/gdsc_disable operations. Signed-off-by:
Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Reviewed-by:
Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20210829154757.784699-6-dmitry.baryshkov@linaro.orgSigned-off-by:
Stephen Boyd <sboyd@kernel.org>
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Dmitry Baryshkov authored
On sm8250 dispcc and videocc registers are powered up by the MMCX power domain. Use runtime PM calls to make sure that required power domain is powered on while we access clock controller's registers. Signed-off-by:
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Dmitry Baryshkov authored
On sm8250 dispcc and videocc registers are powered up by the MMCX power domain. Use runtime PM calls to make sure that required power domain is powered on while we access clock controller's registers. Signed-off-by:
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Dmitry Baryshkov authored
On sm8250 videocc requires MMCX power domain to be powered up before clock controller's registers become available. For now sm8250 was using external regulator driven by the power domain to describe this relationship. Switch into specifying power-domain and required opp-state directly. Signed-off-by:
Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20210829154757.784699-3-dmitry.baryshkov@linaro.orgSigned-off-by:
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Dmitry Baryshkov authored
On sm8250 dispcc requires MMCX power domain to be powered up before clock controller's registers become available. For now sm8250 was using external regulator driven by the power domain to describe this relationship. Switch into specifying power-domain and required opp-state directly. Signed-off-by:
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- 14 Oct, 2021 1 commit
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Stephen Boyd authored
After commit 3165d1e3 ("clk: qcom: gcc: Remove CPUSS clocks control for SC7280") this array is unused. Remove it. Reported-by:
kernel test robot <lkp@intel.com> Cc: Taniya Das <tdas@codeaurora.org> Fixes: 3165d1e3 ("clk: qcom: gcc: Remove CPUSS clocks control for SC7280") Link: https://lore.kernel.org/r/20211014191259.1689641-1-sboyd@kernel.orgSigned-off-by:
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- 13 Oct, 2021 21 commits
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Taniya Das authored
Add support for the camera clock controller found on SC7280 based devices. This would allow camera drivers to probe and control their clocks. Signed-off-by:
Taniya Das <tdas@codeaurora.org> Link: https://lore.kernel.org/r/1633567425-11953-2-git-send-email-tdas@codeaurora.org [sboyd@kernel.org: Make some VCOs unsigned long] Signed-off-by:
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Taniya Das authored
The camera clock controller clock provider have a bunch of generic properties that are needed in a device tree. Add the CAMCC clock IDs for camera client to request for the clocks. Signed-off-by:
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Taniya Das authored
Add support for the lpass clock controller found on SC7280 based devices. This would allow lpass peripheral loader drivers to control the clocks to bring the subsystem out of reset. Signed-off-by:
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Taniya Das authored
The LPASS(Low Power Audio Subsystem) clock provider have a bunch of generic properties that are needed in a device tree. Add the LPASS clock IDs for LPASS PIL client to request for the clocks. Signed-off-by:
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Taniya Das authored
Fix the order of the Kconfig symbol for SC_LPASS_CORECC_7180. Signed-off-by:
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AngeloGioacchino Del Regno authored
As shown downstream[1], this GDSC supports HW trigger mode and we're supposed to enable it in order to ensure correct operation. [1]: https://github.com/sonyxperiadev/kernel/blob/aosp/LA.UM.6.4.r1/arch/arm/boot/dts/qcom/sdm630.dtsi#L2181Signed-off-by:
AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Link: https://lore.kernel.org/r/20211008102041.268253-2-angelogioacchino.delregno@collabora.comSigned-off-by:
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AngeloGioacchino Del Regno authored
As also shown on downstream dts[1], for a correct operation of the Venus block, we have to retain MEM/PERIPH when halting the video_core, video_axi and video_subcore0 branches: add these CXCs to the main Venus GDSC. [1]: https://github.com/sonyxperiadev/kernel/blob/aosp/LA.UM.6.4.r1/arch/arm/boot/dts/qcom/sdm660-vidc.dtsi#L80Signed-off-by:
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Konrad Dybcio authored
Don't rely on the programmer to enter the name of array elements, since the computer can compute it with much less chance of making a mistake. Signed-off-by:
Konrad Dybcio <konrad.dybcio@somainline.org> Link: https://lore.kernel.org/r/20210923162645.23257-9-konrad.dybcio@somainline.orgSigned-off-by:
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Konrad Dybcio authored
MSM8992 is a cut-down version of MSM8994, featuring largely the same hardware. Signed-off-by:
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Konrad Dybcio authored
This will be required to support the modem. Signed-off-by:
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Konrad Dybcio authored
This GDSC is not present on msm8994. Signed-off-by:
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Konrad Dybcio authored
This should be the last "add missing clocks" commit, as to my knowledge there are no more clocks registered within gcc. Signed-off-by:
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Konrad Dybcio authored
Add necessary NoC clocks to provide frequency sources for relevant branch clocks. Signed-off-by:
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Konrad Dybcio authored
Fix up SPI QUP freq tables to account for the fact that not every QUP can run at the same set of frequencies. Signed-off-by:
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Konrad Dybcio authored
Switch to the newer-style parent_data and remove the hardcoded xo clock. Signed-off-by:
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Konrad Dybcio authored
Add documentation for the MSM8994 GCC driver. While at it, retire its compatible from the old, everyone-get-in-here file. Signed-off-by:
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Shawn Guo authored
Add support for RPM-managed clocks on the QCM2290 platform. Signed-off-by:
Shawn Guo <shawn.guo@linaro.org> Link: https://lore.kernel.org/r/20210917030434.19859-4-shawn.guo@linaro.orgReviewed-by:
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Shawn Guo authored
Add compatible for the RPM Clock Controller on the QCM2290 SoC. Signed-off-by:
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Shawn Guo authored
As there is a `rate` field in clk_smd_rpm, clk_smd_rpm_recalc_rate() can be used by branch clocks to report rate as well, rather than assuming the rate is always same as parent clock. This assumption doesn't hold on platforms like QCM2290, where xo_board is 38.4MHz while bi_tcxo is 19.2MHz. To get this work, XO buffered clocks need the following updates. - Assign a correct rate rather than the fake one which is being used to generate binary value for clk_smd_rpm_req interface. - Explicitly handle the clk_smd_rpm_req interface value for XO buffered clocks (.rpm_res_type being QCOM_SMD_RPM_CLK_BUF_A). Suggested-by:
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Shawn Guo authored
Add Global Clock Controller (GCC) driver for QCM2290. This is a porting of gcc-scuba driver from CAF msm-4.19, with GDSC support added on top. Because the alpha_pll on the platform has a different register layout (offsets), its own clk_alpha_pll_regs_offset[] is used in the driver. Signed-off-by:
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Shawn Guo authored
It adds device tree bindings for QCM2290 Global Clock Controller. Signed-off-by:
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- 08 Oct, 2021 2 commits
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Taniya Das authored
The CPUSS clocks are kept always ON and at a fixed frequency of 100MHZ from the bootloader and no longer required to be controlled from HLOS. Fixes: a3cc0921 ("clk: qcom: Add Global Clock controller (GCC) driver for SC7280") Signed-off-by:
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Kai Song authored
Remove .owner field if calls are used which set it automatically Generated by: scripts/coccinelle/api/platform_no_drv_owner.cocci Signed-off-by:
Kai Song <songkai01@inspur.com> Link: https://lore.kernel.org/r/20211006043627.5125-1-songkai01@inspur.comSigned-off-by:
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- 14 Sep, 2021 11 commits
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Marijn Suijten authored
A previous patch removes the "xo" clock from the global namespace making it impossible to acquire by that ".name". The device-tree for msm8998 currently does not include an mmcc node but the dt-bindings for this compatible already require all these clocks, and the patch introducing this node [1] also includes them. [1]: https://patchwork.kernel.org/project/linux-arm-msm/patch/20210901183123.1087392-1-angelogioacchino.delregno@somainline.org/Reviewed-by:
AngeloGioacchino Del Regno <angelogioacchino.delregno@somainline.org> Signed-off-by:
Marijn Suijten <marijn.suijten@somainline.org> Link: https://lore.kernel.org/r/20210911121340.261920-9-marijn.suijten@somainline.orgSigned-off-by:
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Marijn Suijten authored
A previous patch removes the "xo" clock from the global namespace making it impossible to acquire by that ".name". The device-tree for msm8998 already provides the "xo" and "gpll0" clock since the addition of the gpucc node making it unnecessary to have this fallback at all. Reviewed-by:
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Marijn Suijten authored
Some of these clocks are not referenced by the driver at all whereas aud_ref_clk and core_bi_pll_test_se are but were missing from the bindings. These clocks are optional (and not currently provided anywhere) while "xo" and "sleep_clk" are mandatory. Note that none of these clocks were used beforehand as the driver referenced them by their global name. Signed-off-by:
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Marijn Suijten authored
Where possible, use ARRAY_SIZE to determine the number of parents in clk_parent_data, instead of hardcoding it. Reviewed-by:
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Marijn Suijten authored
Where possible, use ARRAY_SIZE to determine the number of parents in clk_parent_data, instead of hardcoding it. Reviewed-by:
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Marijn Suijten authored
Now that all clock controllers and the DSI PLL clocks rely on "xo" being passed in DT as phandle instead of looking it up by the global "xo" name this transient clock can be removed, leaving only the fixed-factor "xo_board" clock in DT. Reviewed-by:
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Marijn Suijten authored
Use parent_data and parent_hws to specify internal relations using pointers instead of names, and use .fw_name to retrieve external clocks from clock-names in the DT rather than the global clock tree. Note that this change relies on the "xo" and "sleep_clk" clocks to be provided in DT, as per the relevant qcom,gcc-mnsm8998.yaml dt-bindings. These clocks have been added in a prior patch [1]. [1]: https://lore.kernel.org/linux-arm-msm/20210911120101.248476-1-marijn.suijten@somainline.org/Reviewed-by:
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Marijn Suijten authored
Prepare for a future patch where we use .hw pointers to these GPLL clocks in the parent mapping instead of name references. This requires the GPLL clocks to be decared before parent_data arrays. Reviewed-by:
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Cai Huoqing authored
Use the devm_platform_ioremap_resource() helper instead of calling platform_get_resource() and devm_ioremap_resource() separately Signed-off-by:
Cai Huoqing <caihuoqing@baidu.com> Link: https://lore.kernel.org/r/20210907084858.4101-1-caihuoqing@baidu.comSigned-off-by:
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Cai Huoqing authored
Use the devm_platform_ioremap_resource() helper instead of calling platform_get_resource() and devm_ioremap_resource() separately Signed-off-by:
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Cai Huoqing authored
Use the devm_platform_ioremap_resource() helper instead of calling platform_get_resource() and devm_ioremap_resource() separately Signed-off-by:
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