1. 09 Feb, 2022 40 commits
    • Brett Creeley's avatar
      ice: Advertise 802.1ad VLAN filtering and offloads for PF netdev · 1babaf77
      Brett Creeley authored
      In order for the driver to support 802.1ad VLAN filtering and offloads,
      it needs to advertise those VLAN features and also support modifying
      those VLAN features, so make the necessary changes to
      ice_set_netdev_features(). By default, enable CTAG insertion/stripping
      and CTAG filtering for both Single and Double VLAN Modes (SVM/DVM).
      Also, in DVM, enable STAG filtering by default. This is done by
      setting the feature bits in netdev->features. Also, in DVM, support
      toggling of STAG insertion/stripping, but don't enable them by
      default. This is done by setting the feature bits in
      netdev->hw_features.
      
      Since 802.1ad VLAN filtering and offloads are only supported in DVM, make
      sure they are not enabled by default and that they cannot be enabled
      during runtime, when the device is in SVM.
      
      Add an implementation for the ndo_fix_features() callback. This is
      needed since the hardware cannot support multiple VLAN ethertypes for
      VLAN insertion/stripping simultaneously and all supported VLAN filtering
      must either be enabled or disabled together.
      
      Disable inner VLAN stripping by default when DVM is enabled. If a VSI
      supports stripping the inner VLAN in DVM, then it will have to configure
      that during runtime. For example if a VF is configured in a port VLAN
      while DVM is enabled it will be allowed to offload inner VLANs.
      Signed-off-by: default avatarBrett Creeley <brett.creeley@intel.com>
      Tested-by: default avatarGurucharan G <gurucharanx.g@intel.com>
      Signed-off-by: default avatarTony Nguyen <anthony.l.nguyen@intel.com>
      1babaf77
    • Brett Creeley's avatar
      ice: Support configuring the device to Double VLAN Mode · a1ffafb0
      Brett Creeley authored
      In order to support configuring the device in Double VLAN Mode (DVM),
      the DDP and FW have to support DVM. If both support DVM, the PF that
      downloads the package needs to update the default recipes, set the
      VLAN mode, and update boost TCAM entries.
      
      To support updating the default recipes in DVM, add support for
      updating an existing switch recipe's lkup_idx and mask. This is done
      by first calling the get recipe AQ (0x0292) with the desired recipe
      ID. Then, if that is successful update one of the lookup indices
      (lkup_idx) and its associated mask if the mask is valid otherwise
      the already existing mask will be used.
      
      The VLAN mode of the device has to be configured while the global
      configuration lock is held while downloading the DDP, specifically after
      the DDP has been downloaded. If supported, the device will default to
      DVM.
      Co-developed-by: default avatarDan Nowlin <dan.nowlin@intel.com>
      Signed-off-by: default avatarDan Nowlin <dan.nowlin@intel.com>
      Signed-off-by: default avatarBrett Creeley <brett.creeley@intel.com>
      Tested-by: default avatarGurucharan G <gurucharanx.g@intel.com>
      Signed-off-by: default avatarTony Nguyen <anthony.l.nguyen@intel.com>
      a1ffafb0
    • Brett Creeley's avatar
      ice: Add support for VIRTCHNL_VF_OFFLOAD_VLAN_V2 · cc71de8f
      Brett Creeley authored
      Add support for the VF driver to be able to request
      VIRTCHNL_VF_OFFLOAD_VLAN_V2, negotiate its VLAN capabilities via
      VIRTCHNL_OP_GET_OFFLOAD_VLAN_V2_CAPS, add/delete VLAN filters, and
      enable/disable VLAN offloads.
      
      VFs supporting VIRTCHNL_OFFLOAD_VLAN_V2 will be able to use the
      following virtchnl opcodes:
      
      VIRTCHNL_OP_GET_OFFLOAD_VLAN_V2_CAPS
      VIRTCHNL_OP_ADD_VLAN_V2
      VIRTCHNL_OP_DEL_VLAN_V2
      VIRTCHNL_OP_ENABLE_VLAN_STRIPPING_V2
      VIRTCHNL_OP_DISABLE_VLAN_STRIPPING_V2
      VIRTCHNL_OP_ENABLE_VLAN_INSERTION_V2
      VIRTCHNL_OP_DISABLE_VLAN_INSERTION_V2
      
      Legacy VF drivers may expect the initial VLAN stripping settings to be
      configured by the PF, so the PF initializes VLAN stripping based on the
      VIRTCHNL_OP_GET_VF_RESOURCES opcode. However, with VLAN support via
      VIRTCHNL_VF_OFFLOAD_VLAN_V2, this function is only expected to be used
      for VFs that only support VIRTCHNL_VF_OFFLOAD_VLAN, which will only
      be supported when a port VLAN is configured. Update the function
      based on the new expectations. Also, change the message when the PF
      can't enable/disable VLAN stripping to a dev_dbg() as this isn't fatal.
      
      When a VF isn't in a port VLAN and it only supports
      VIRTCHNL_VF_OFFLOAD_VLAN when Double VLAN Mode (DVM) is enabled, then
      the PF needs to reject the VIRTCHNL_VF_OFFLOAD_VLAN capability and
      configure the VF in software only VLAN mode. To do this add the new
      function ice_vf_vsi_cfg_legacy_vlan_mode(), which updates the VF's
      inner and outer ice_vsi_vlan_ops functions and sets up software only
      VLAN mode.
      Signed-off-by: default avatarBrett Creeley <brett.creeley@intel.com>
      Tested-by: default avatarKonrad Jankowski <konrad0.jankowski@intel.com>
      Signed-off-by: default avatarTony Nguyen <anthony.l.nguyen@intel.com>
      cc71de8f
    • Brett Creeley's avatar
      ice: Add hot path support for 802.1Q and 802.1ad VLAN offloads · 0d54d8f7
      Brett Creeley authored
      Currently the driver only supports 802.1Q VLAN insertion and stripping.
      However, once Double VLAN Mode (DVM) is fully supported, then both 802.1Q
      and 802.1ad VLAN insertion and stripping will be supported. Unfortunately
      the VSI context parameters only allow for one VLAN ethertype at a time
      for VLAN offloads so only one or the other VLAN ethertype offload can be
      supported at once.
      
      To support this, multiple changes are needed.
      
      Rx path changes:
      
      [1] In DVM, the Rx queue context l2tagsel field needs to be cleared so
      the outermost tag shows up in the l2tag2_2nd field of the Rx flex
      descriptor. In Single VLAN Mode (SVM), the l2tagsel field should remain
      1 to support SVM configurations.
      
      [2] Modify the ice_test_staterr() function to take a __le16 instead of
      the ice_32b_rx_flex_desc union pointer so this function can be used for
      both rx_desc->wb.status_error0 and rx_desc->wb.status_error1.
      
      [3] Add the new inline function ice_get_vlan_tag_from_rx_desc() that
      checks if there is a VLAN tag in l2tag1 or l2tag2_2nd.
      
      [4] In ice_receive_skb(), add a check to see if NETIF_F_HW_VLAN_STAG_RX
      is enabled in netdev->features. If it is, then this is the VLAN
      ethertype that needs to be added to the stripping VLAN tag. Since
      ice_fix_features() prevents CTAG_RX and STAG_RX from being enabled
      simultaneously, the VLAN ethertype will only ever be 802.1Q or 802.1ad.
      
      Tx path changes:
      
      [1] In DVM, the VLAN tag needs to be placed in the l2tag2 field of the Tx
      context descriptor. The new define ICE_TX_FLAGS_HW_OUTER_SINGLE_VLAN was
      added to the list of tx_flags to handle this case.
      
      [2] When the stack requests the VLAN tag to be offloaded on Tx, the
      driver needs to set either ICE_TX_FLAGS_HW_OUTER_SINGLE_VLAN or
      ICE_TX_FLAGS_HW_VLAN, so the tag is inserted in l2tag2 or l2tag1
      respectively. To determine which location to use, set a bit in the Tx
      ring flags field during ring allocation that can be used to determine
      which field to use in the Tx descriptor. In DVM, always use l2tag2,
      and in SVM, always use l2tag1.
      Signed-off-by: default avatarBrett Creeley <brett.creeley@intel.com>
      Tested-by: default avatarGurucharan G <gurucharanx.g@intel.com>
      Signed-off-by: default avatarTony Nguyen <anthony.l.nguyen@intel.com>
      0d54d8f7
    • Brett Creeley's avatar
      ice: Add outer_vlan_ops and VSI specific VLAN ops implementations · c31af68a
      Brett Creeley authored
      Add a new outer_vlan_ops member to the ice_vsi structure as outer VLAN
      ops are only available when the device is in Double VLAN Mode (DVM).
      Depending on the VSI type, the requirements for what operations to
      use/allow differ.
      
      By default all VSI's have unsupported inner and outer VSI VLAN ops. This
      implementation was chosen to prevent unexpected crashes due to null
      pointer dereferences. Instead, if a VSI calls an unsupported op, it will
      just return -EOPNOTSUPP.
      
      Add implementations to support modifying outer VLAN fields for VSI
      context. This includes the ability to modify VLAN stripping, insertion,
      and the port VLAN based on the outer VLAN handling fields of the VSI
      context.
      
      These functions should only ever be used if DVM is enabled because that
      means the firmware supports the outer VLAN fields in the VSI context. If
      the device is in DVM, then always use the outer_vlan_ops, else use the
      vlan_ops since the device is in Single VLAN Mode (SVM).
      
      Also, move adding the untagged VLAN 0 filter from ice_vsi_setup() to
      ice_vsi_vlan_setup() as the latter function is specific to the PF and
      all other VSI types that need an untagged VLAN 0 filter already do this
      in their specific flows. Without this change, Flow Director is failing
      to initialize because it does not implement any VSI VLAN ops.
      Signed-off-by: default avatarBrett Creeley <brett.creeley@intel.com>
      Tested-by: default avatarGurucharan G <gurucharanx.g@intel.com>
      Signed-off-by: default avatarTony Nguyen <anthony.l.nguyen@intel.com>
      c31af68a
    • Brett Creeley's avatar
      ice: Adjust naming for inner VLAN operations · 7bd527aa
      Brett Creeley authored
      Current operations act on inner VLAN fields. To support double VLAN, outer
      VLAN operations and functions will be implemented. Add the "inner" naming
      to existing VLAN operations to distinguish them from the upcoming outer
      values and functions. Some spacing adjustments are made to align
      values.
      
      Note that the inner is not talking about a tunneled VLAN, but the second
      VLAN in the packet. For SVM the driver uses inner or single VLAN
      filtering and offloads and in Double VLAN Mode the driver uses the
      inner filtering and offloads for SR-IOV VFs in port VLANs in order to
      support offloading the guest VLAN while a port VLAN is configured.
      Signed-off-by: default avatarBrett Creeley <brett.creeley@intel.com>
      Tested-by: default avatarGurucharan G <gurucharanx.g@intel.com>
      Signed-off-by: default avatarTony Nguyen <anthony.l.nguyen@intel.com>
      7bd527aa
    • Brett Creeley's avatar
      ice: Use the proto argument for VLAN ops · 2bfefa2d
      Brett Creeley authored
      Currently the proto argument is unused. This is because the driver only
      supports 802.1Q VLAN filtering. This policy is enforced via netdev
      features that the driver sets up when configuring the netdev, so the
      proto argument won't ever be anything other than 802.1Q. However, this
      will allow for future iterations of the driver to seemlessly support
      802.1ad filtering. Begin using the proto argument and extend the related
      structures to support its use.
      Signed-off-by: default avatarBrett Creeley <brett.creeley@intel.com>
      Tested-by: default avatarGurucharan G <gurucharanx.g@intel.com>
      Signed-off-by: default avatarTony Nguyen <anthony.l.nguyen@intel.com>
      2bfefa2d
    • Brett Creeley's avatar
      ice: Refactor vf->port_vlan_info to use ice_vlan · a19d7f7f
      Brett Creeley authored
      The current vf->port_vlan_info variable is a packed u16 that contains
      the port VLAN ID and QoS/prio value. This is fine, but changes are
      incoming that allow for an 802.1ad port VLAN. Add flexibility by
      changing the vf->port_vlan_info member to be an ice_vlan structure.
      Signed-off-by: default avatarBrett Creeley <brett.creeley@intel.com>
      Tested-by: default avatarGurucharan G <gurucharanx.g@intel.com>
      Signed-off-by: default avatarTony Nguyen <anthony.l.nguyen@intel.com>
      a19d7f7f
    • Brett Creeley's avatar
      ice: Introduce ice_vlan struct · fb05ba12
      Brett Creeley authored
      Add a new struct for VLAN related information. Currently this holds
      VLAN ID and priority values, but will be expanded to hold TPID value.
      This reduces the changes necessary if any other values are added in
      future. Remove the action argument from these calls as it's always
      ICE_FWD_VSI.
      Signed-off-by: default avatarBrett Creeley <brett.creeley@intel.com>
      Tested-by: default avatarGurucharan G <gurucharanx.g@intel.com>
      Signed-off-by: default avatarTony Nguyen <anthony.l.nguyen@intel.com>
      fb05ba12
    • Brett Creeley's avatar
      ice: Add new VSI VLAN ops · bc42afa9
      Brett Creeley authored
      Incoming changes to support 802.1Q and/or 802.1ad VLAN filtering and
      offloads require more flexibility when configuring VLANs. The VSI VLAN
      interface will allow flexibility for configuring VLANs for all VSI
      types. Add new files to separate the VSI VLAN ops and move functions to
      make the code more organized.
      Signed-off-by: default avatarBrett Creeley <brett.creeley@intel.com>
      Tested-by: default avatarGurucharan G <gurucharanx.g@intel.com>
      Signed-off-by: default avatarTony Nguyen <anthony.l.nguyen@intel.com>
      bc42afa9
    • Brett Creeley's avatar
      ice: Add helper function for adding VLAN 0 · 3e0b5971
      Brett Creeley authored
      There are multiple places where VLAN 0 is being added. Create a function
      to be called in order to minimize changes as the implementation is expanded
      to support double VLAN and avoid duplicated code.
      Signed-off-by: default avatarBrett Creeley <brett.creeley@intel.com>
      Tested-by: default avatarGurucharan G <gurucharanx.g@intel.com>
      Signed-off-by: default avatarTony Nguyen <anthony.l.nguyen@intel.com>
      3e0b5971
    • Brett Creeley's avatar
      ice: Refactor spoofcheck configuration functions · daf4dd16
      Brett Creeley authored
      Add functions to configure Tx VLAN antispoof based on iproute
      configuration and/or VLAN mode and VF driver support. This is needed
      later so the driver can control when it can be configured. Also, add
      functions that can be used to enable and disable MAC and VLAN
      spoofcheck. Move spoofchk configuration during VSI setup into the
      SR-IOV initialization path and into the post VSI rebuild flow for VF
      VSIs.
      Signed-off-by: default avatarBrett Creeley <brett.creeley@intel.com>
      Tested-by: default avatarGurucharan G <gurucharanx.g@intel.com>
      Signed-off-by: default avatarTony Nguyen <anthony.l.nguyen@intel.com>
      daf4dd16
    • Oleksij Rempel's avatar
      net: usb: smsc95xx: add generic selftest support · 1710b52d
      Oleksij Rempel authored
      Provide generic selftest support. Tested with LAN9500 and LAN9512.
      Signed-off-by: default avatarOleksij Rempel <o.rempel@pengutronix.de>
      Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
      1710b52d
    • Wang Qing's avatar
      net: ethernet: cavium: use div64_u64() instead of do_div() · 038fcdaf
      Wang Qing authored
      do_div() does a 64-by-32 division.
      When the divisor is u64, do_div() truncates it to 32 bits, this means it
      can test non-zero and be truncated to zero for division.
      
      fix do_div.cocci warning:
      do_div() does a 64-by-32 division, please consider using div64_u64 instead.
      Signed-off-by: default avatarWang Qing <wangqing@vivo.com>
      Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
      038fcdaf
    • Po Liu's avatar
      net:enetc: enetc qos using the CBDR dma alloc function · 237d20c2
      Po Liu authored
      Now we can use the enetc_cbd_alloc_data_mem() to replace complicated DMA
      data alloc method and CBDR memory basic seting.
      Signed-off-by: default avatarPo Liu <po.liu@nxp.com>
      Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
      237d20c2
    • Po Liu's avatar
      net:enetc: command BD ring data memory alloc as one function alone · 0cc11cdb
      Po Liu authored
      Separate the CBDR data memory alloc standalone. It is convenient for
      other part loading, for example the ENETC QOS part.
      Reported-and-suggested-by: default avatarVladimir Oltean <vladimir.oltean@nxp.com>
      Signed-off-by: default avatarPo Liu <po.liu@nxp.com>
      Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
      0cc11cdb
    • Po Liu's avatar
      net:enetc: allocate CBD ring data memory using DMA coherent methods · b3a723db
      Po Liu authored
      To replace the dma_map_single() stream DMA mapping with DMA coherent
      method dma_alloc_coherent() which is more simple.
      
      dma_map_single() found by Tim Gardner not proper. Suggested by Claudiu
      Manoil and Jakub Kicinski to use dma_alloc_coherent(). Discussion at:
      
      https://lore.kernel.org/netdev/AM9PR04MB8397F300DECD3C44D2EBD07796BD9@AM9PR04MB8397.eurprd04.prod.outlook.com/t/
      
      Fixes: 888ae5a3 ("net: enetc: add tc flower psfp offload driver")
      cc: Claudiu Manoil <claudiu.manoil@nxp.com>
      Reported-by: default avatarTim Gardner <tim.gardner@canonical.com>
      Signed-off-by: default avatarPo Liu <po.liu@nxp.com>
      Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
      b3a723db
    • David S. Miller's avatar
      Merge branch 'dpaa2-eth-sw-TSO' · 62b5b162
      David S. Miller authored
      Ioana Ciornei says:
      
      ====================
      dpaa2-eth: add support for software TSO
      
      This series adds support for driver level TSO in the dpaa2-eth driver.
      
      The first 5 patches lay the ground work for the actual feature:
      rearrange some variable declaration, cleaning up the interraction with
      the S/G Table buffer cache etc.
      
      The 6th patch adds the actual driver level software TSO support by using
      the usual tso_build_hdr()/tso_build_data() APIs and creates the S/G FDs.
      
      With this patch set we can see the following improvement in a TCP flow
      running on a single A72@2.2GHz of the LX2160A SoC:
      
      before: 6.38Gbit/s
      after:  8.48Gbit/s
      ====================
      Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
      62b5b162
    • Ioana Ciornei's avatar
      soc: fsl: dpio: read the consumer index from the cache inhibited area · 86ec882f
      Ioana Ciornei authored
      Once we added support in the dpaa2-eth for driver level software TSO we
      observed the following situation: if the EQCR CI (consumer index) is
      read from the cache-enabled area we sometimes end up with a computed
      value of available enqueue entries bigger than the size of the ring.
      
      This eventually will lead to the multiple enqueue of the same FD which
      will determine the same FD to end up on the Tx confirmation path and the
      same skb being freed twice.
      
      Just read the consumer index from the cache inhibited area so that we
      avoid this situation.
      Signed-off-by: default avatarIoana Ciornei <ioana.ciornei@nxp.com>
      Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
      86ec882f
    • Ioana Ciornei's avatar
      dpaa2-eth: add support for software TSO · 3dc709e0
      Ioana Ciornei authored
      This patch adds support for driver level TSO in the enetc driver using
      the TSO API.
      
      There is not much to say about this specific implementation. We are
      using the usual tso_build_hdr(), tso_build_data() to create each data
      segment, we create an array of S/G FDs where the first S/G entry is
      referencing the header data and the remaining ones the data portion.
      
      For the S/G Table buffer we use the same cache of buffers used on the
      other non-GSO cases - dpaa2_eth_sgt_get() and dpaa2_eth_sgt_recycle().
      
      We cannot keep a DMA coherent buffer for all the TSO headers because the
      DPAA2 architecture does not work in a ring based fashion so we just
      allocate a buffer each time.
      
      Even with these limitations we get the following improvement in TCP
      termination on the LX2160A SoC, on a single A72 core running at 2.2GHz.
      
      before: 6.38Gbit/s
      after:  8.48Gbit/s
      Signed-off-by: default avatarIoana Ciornei <ioana.ciornei@nxp.com>
      Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
      3dc709e0
    • Ioana Ciornei's avatar
      dpaa2-eth: work with an array of FDs · a4ca448e
      Ioana Ciornei authored
      Up until now, the __dpaa2_eth_tx function used a single FD on the stack
      to construct the structure to be enqueued. Since we are now preparing
      the ground work to add support for TSO done in software at the driver
      level, the same function needs to work with an array of FDs and enqueue
      as many as the build_*_fd functions create.
      
      Make the necessary adjustments in order to do this. These include:
      keeping an array of FDs in a percpu structure, cleaning up the necessary
      FDs before populating it and then, retrying the enqueue process up till
      all the generated FDs were enqueued or until we reach the maximum number
      retries.
      
      This patch does not change the fact that only a single FD will result
      from a __dpaa2_eth_tx call but rather just creates the necessary changes
      for the next patch.
      Signed-off-by: default avatarIoana Ciornei <ioana.ciornei@nxp.com>
      Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
      a4ca448e
    • Ioana Ciornei's avatar
      dpaa2-eth: use the S/G table cache also for the normal S/G path · a4218aef
      Ioana Ciornei authored
      Instead of allocating memory for an S/G table each time a nonlinear skb
      is processed, and then freeing it on the Tx confirmation path, use the
      S/G table cache in order to reuse the memory.
      
      For this to work we have to change the size of the cached buffers so
      that it can hold the maximum number of scatterlist entries.
      
      Other than that, each allocate/free call is replaced by a call to the
      dpaa2_eth_sgt_get/dpaa2_eth_sgt_recycle functions, introduced in the
      previous patch.
      Signed-off-by: default avatarIoana Ciornei <ioana.ciornei@nxp.com>
      Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
      a4218aef
    • Ioana Ciornei's avatar
      dpaa2-eth: extract the S/G table buffer cache interaction into functions · ae3b0817
      Ioana Ciornei authored
      The dpaa2-eth driver uses in certain circumstances a buffer cache for
      the S/G tables needed in case of a S/G FD. At the moment, the
      interraction with the cache is open-coded and couldn't be reused easily.
      
      Add two new functions - dpaa2_eth_sgt_get and dpaa2_eth_sgt_recycle -
      which help with code reusability.
      Signed-off-by: default avatarIoana Ciornei <ioana.ciornei@nxp.com>
      Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
      ae3b0817
    • Ioana Ciornei's avatar
      dpaa2-eth: allocate a fragment already aligned · 8378a791
      Ioana Ciornei authored
      Instead of allocating memory and then manually aligning it to the
      desired value use napi_alloc_frag_align() directly to streamline the
      process.
      Signed-off-by: default avatarIoana Ciornei <ioana.ciornei@nxp.com>
      Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
      8378a791
    • Ioana Ciornei's avatar
      dpaa2-eth: rearrange variable declaration in __dpaa2_eth_tx · 035dd64d
      Ioana Ciornei authored
      In the next patches we'll be moving things arroung in the mentioned
      function and also add some new variable declarations. Before all this,
      cleanup the variable declaration order.
      Signed-off-by: default avatarIoana Ciornei <ioana.ciornei@nxp.com>
      Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
      035dd64d
    • David S. Miller's avatar
      Merge branch 'octeontx2-af-priority-flow-control' · dc178d31
      David S. Miller authored
      Hariprasad Kelam says:
      
      ====================
      Priority flow control support for RVU netdev
      
      In network congestion, instead of pausing all traffic on link
      PFC allows user to selectively pause traffic according to its
      class. This series of patches add support of PFC for RVU netdev
      drivers.
      
      Patch1 adds support to disable pause frames by default as
      with PFC user can enable either PFC or 802.3 pause frames.
      Patch2&3 adds resource management support for flow control
      and configures necessary registers for PFC.
      Patch4 adds dcb ops registration for netdev drivers.
      
      V2 changes:
      Fix compilation error by exporting required symbols 'otx2_config_pause_frm'
      ====================
      Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
      dc178d31
    • Hariprasad Kelam's avatar
      octeontx2-pf: PFC config support with DCBx · 8e675581
      Hariprasad Kelam authored
      Data centric bridging designed to eliminate packet loss due to
      queue overflow by adding enhancements to ethernet network such as
      proprity flow control etc. This patch adds support for management
      of Priority flow control(PFC) on Octeontx2 and CN10K interfaces.
      
      To enable PFC for all priorities
      	dcb pfc set dev eth0 prio-pfc all:on/off
      
      To enable PFC on selected priorites
      	dcb pfc set dev eth0 prio-pfc 0:on/off 1:on/off ..7:on/off
      
      With the ntuple commands user can map Priority to receive queues.
      On queue overflow NIX will assert backpressure such that PFC pause frames
      are genarated with mapped priority.
      
      To map priority 7 to Queue 1
      ethtool -U eth0 flow-type ether dst xx:xx:xx:xx:xx:xx vlan 0xe00a
      m 0x1fff  queue 1
      Signed-off-by: default avatarHariprasad Kelam <hkelam@marvell.com>
      Signed-off-by: default avatarSunil Kovvuri Goutham <sgoutham@marvell.com>
      Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
      8e675581
    • Hariprasad Kelam's avatar
      octeontx2-af: Flow control resource management · e7400038
      Hariprasad Kelam authored
      CN10K MAC block (RPM) and Octeontx2 MAC block (CGX) both supports
      PFC flow control and 802.3X flow control pause frames.
      
      Each MAC block supports max 4 LMACS and AF driver assigns same
      (MAC,LMAC) to PF and its VFs. As PF and its share same (MAC,LMAC)
      pair we need resource management to address below scenarios
      
      1. Maintain PFC and 8023X pause frames mutually exclusive.
      2. Reject disable flow control request if other PF or Vfs
         enabled it.
      Signed-off-by: default avatarHariprasad Kelam <hkelam@marvell.com>
      Signed-off-by: default avatarSunil Kovvuri Goutham <sgoutham@marvell.com>
      Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
      e7400038
    • Sunil Kumar Kori's avatar
      octeontx2-af: Priority flow control configuration support · 1121f6b0
      Sunil Kumar Kori authored
      Prirority based flow control (802.1Qbb)  mechanism is similar to
      ethernet pause frames (802.3x) instead pausing all traffic on a link,
      PFC allows user to selectively pause traffic according to its class.
      
      Oceteontx2 MAC block (CGX) and CN10K Mac block (RPM) both supports
      PFC. As upper layer mbox handler is same for both the MACs, this
      patch configures PFC by calling apporopritate callbacks.
      Signed-off-by: default avatarSunil Kumar Kori <skori@marvell.com>
      Signed-off-by: default avatarHariprasad Kelam <hkelam@marvell.com>
      Signed-off-by: default avatarSunil Kovvuri Goutham <sgoutham@marvell.com>
      Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
      1121f6b0
    • Hariprasad Kelam's avatar
      octeontx2-af: Don't enable Pause frames by default · d957b51f
      Hariprasad Kelam authored
      Current implementation is such that 802.3x pause frames are
      enabled by default.  As CGX and RPM blocks support PFC
      (priority flow control) also, instead of driver enabling one
      between them enable them upon request from PF or its VFs.
      Also add support to disable pause frames in driver unbind.
      Signed-off-by: default avatarHariprasad Kelam <hkelam@marvell.com>
      Signed-off-by: default avatarSunil Kovvuri Goutham <sgoutham@marvell.com>
      Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
      d957b51f
    • David S. Miller's avatar
      Merge branch 'MCTP-tag-control-interface' · b4f029f4
      David S. Miller authored
      Jeremy Kerr says:
      
      ====================
      MCTP tag control interface
      
      This series implements a small interface for userspace-controlled
      message tag allocation for the MCTP protocol. Rather than leaving the
      kernel to allocate per-message tag values, userspace can explicitly
      allocate (and release) message tags through two new ioctls:
      SIOCMCTPALLOCTAG and SIOCMCTPDROPTAG.
      
      In order to do this, we first introduce some minor changes to the tag
      handling, including a couple of new tests for the route input paths.
      
      As always, any comments/queries/etc are most welcome.
      
      v2:
       - make mctp_lookup_prealloc_tag static
       - minor checkpatch formatting fixes
      ====================
      Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
      b4f029f4
    • Matt Johnston's avatar
      mctp: Add SIOCMCTP{ALLOC,DROP}TAG ioctls for tag control · 63ed1aab
      Matt Johnston authored
      This change adds a couple of new ioctls for mctp sockets:
      SIOCMCTPALLOCTAG and SIOCMCTPDROPTAG.  These ioctls provide facilities
      for explicit allocation / release of tags, overriding the automatic
      allocate-on-send/release-on-reply and timeout behaviours. This allows
      userspace more control over messages that may not fit a simple
      request/response model.
      
      In order to indicate a pre-allocated tag to the sendmsg() syscall, we
      introduce a new flag to the struct sockaddr_mctp.smctp_tag value:
      MCTP_TAG_PREALLOC.
      
      Additional changes from Jeremy Kerr <jk@codeconstruct.com.au>.
      
      Contains a fix that was:
      Reported-by: default avatarkernel test robot <lkp@intel.com>
      Signed-off-by: default avatarMatt Johnston <matt@codeconstruct.com.au>
      Signed-off-by: default avatarJeremy Kerr <jk@codeconstruct.com.au>
      Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
      63ed1aab
    • Jeremy Kerr's avatar
      mctp: Allow keys matching any local address · 0de55a7d
      Jeremy Kerr authored
      Currently, we require an exact match on an incoming packet's dest
      address, and the key's local_addr field.
      
      In a future change, we may want to set up a key before packets are
      routed, meaning we have no local address to match on.
      
      This change allows key lookups to match on local_addr = MCTP_ADDR_ANY.
      Signed-off-by: default avatarJeremy Kerr <jk@codeconstruct.com.au>
      Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
      0de55a7d
    • Jeremy Kerr's avatar
      mctp: Add helper for address match checking · 8069b22d
      Jeremy Kerr authored
      Currently, we have a couple of paths that check that an EID matches, or
      the match value is MCTP_ADDR_ANY.
      
      Rather than open coding this, add a little helper.
      Signed-off-by: default avatarJeremy Kerr <jk@codeconstruct.com.au>
      Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
      8069b22d
    • Jeremy Kerr's avatar
      mctp: tests: Add key state tests · c5755214
      Jeremy Kerr authored
      This change adds a few more tests to check the key/tag lookups on route
      input. We add a specific entry to the keys lists, route a packet with
      specific header values, and check for key match/mismatch.
      Signed-off-by: default avatarJeremy Kerr <jk@codeconstruct.com.au>
      Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
      c5755214
    • Jeremy Kerr's avatar
      mctp: tests: Rename FL_T macro to FL_TO · 62a2b005
      Jeremy Kerr authored
      This is a definition for the tag-owner flag, which has TO as a standard
      abbreviation. We'll want to add a helper for the actual tag value in a
      future change.
      Signed-off-by: default avatarJeremy Kerr <jk@codeconstruct.com.au>
      Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
      62a2b005
    • David S. Miller's avatar
      Merge branch '40GbE' of git://git.kernel.org/pub/scm/linux/kernel/git/tnguy/next · aa4725c2
      David S. Miller authored
      -queue
      
      Tony Nguyen says:
      
      ====================
      40GbE Intel Wired LAN Driver Updates 2022-02-08
      
      Joe Damato says:
      
      This patch set makes several updates to the i40e driver stats collection
      and reporting code to help users of i40e get a better sense of how the
      driver is performing and interacting with the rest of the kernel.
      
      These patches include some new stats (like waived and busy) which were
      inspired by other drivers that track stats using the same nomenclature.
      
      The new stats and an existing stat, rx_reuse, are now accessible with
      ethtool to make harvesting this data more convenient for users.
      ====================
      Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
      aa4725c2
    • Eric Dumazet's avatar
      ip6_tunnel: fix possible NULL deref in ip6_tnl_xmit · 3a5f238f
      Eric Dumazet authored
      Make sure to test that skb has a dst attached to it.
      
      general protection fault, probably for non-canonical address 0xdffffc0000000011: 0000 [#1] PREEMPT SMP KASAN
      KASAN: null-ptr-deref in range [0x0000000000000088-0x000000000000008f]
      CPU: 0 PID: 32650 Comm: syz-executor.4 Not tainted 5.17.0-rc2-next-20220204-syzkaller #0
      Hardware name: Google Google Compute Engine/Google Compute Engine, BIOS Google 01/01/2011
      RIP: 0010:ip6_tnl_xmit+0x2140/0x35f0 net/ipv6/ip6_tunnel.c:1127
      Code: 4d 85 f6 0f 85 c5 04 00 00 e8 9c b0 66 f9 48 83 e3 fe 48 b8 00 00 00 00 00 fc ff df 48 8d bb 88 00 00 00 48 89 fa 48 c1 ea 03 <0f> b6 04 02 84 c0 74 07 7f 05 e8 11 25 b2 f9 44 0f b6 b3 88 00 00
      RSP: 0018:ffffc900141b7310 EFLAGS: 00010206
      RAX: dffffc0000000000 RBX: 0000000000000000 RCX: ffffc9000c77a000
      RDX: 0000000000000011 RSI: ffffffff8811f854 RDI: 0000000000000088
      RBP: ffffc900141b7480 R08: 0000000000000000 R09: 0000000000000008
      R10: ffffffff8811f846 R11: 0000000000000008 R12: ffffc900141b7548
      R13: ffff8880297c6000 R14: 0000000000000000 R15: ffff8880351c8dc0
      FS:  00007f9827ba2700(0000) GS:ffff8880b9c00000(0000) knlGS:0000000000000000
      CS:  0010 DS: 0000 ES: 0000 CR0: 0000000080050033
      CR2: 0000001b31322000 CR3: 0000000033a70000 CR4: 00000000003506f0
      DR0: 0000000000000000 DR1: 0000000000000000 DR2: 0000000000000000
      DR3: 0000000000000000 DR6: 00000000fffe0ff0 DR7: 0000000000000400
      Call Trace:
       <TASK>
       ipxip6_tnl_xmit net/ipv6/ip6_tunnel.c:1386 [inline]
       ip6_tnl_start_xmit+0x71e/0x1830 net/ipv6/ip6_tunnel.c:1435
       __netdev_start_xmit include/linux/netdevice.h:4683 [inline]
       netdev_start_xmit include/linux/netdevice.h:4697 [inline]
       xmit_one net/core/dev.c:3473 [inline]
       dev_hard_start_xmit+0x1eb/0x920 net/core/dev.c:3489
       __dev_queue_xmit+0x2a24/0x3760 net/core/dev.c:4116
       packet_snd net/packet/af_packet.c:3057 [inline]
       packet_sendmsg+0x2265/0x5460 net/packet/af_packet.c:3084
       sock_sendmsg_nosec net/socket.c:705 [inline]
       sock_sendmsg+0xcf/0x120 net/socket.c:725
       sock_write_iter+0x289/0x3c0 net/socket.c:1061
       call_write_iter include/linux/fs.h:2075 [inline]
       do_iter_readv_writev+0x47a/0x750 fs/read_write.c:726
       do_iter_write+0x188/0x710 fs/read_write.c:852
       vfs_writev+0x1aa/0x630 fs/read_write.c:925
       do_writev+0x27f/0x300 fs/read_write.c:968
       do_syscall_x64 arch/x86/entry/common.c:50 [inline]
       do_syscall_64+0x35/0xb0 arch/x86/entry/common.c:80
       entry_SYSCALL_64_after_hwframe+0x44/0xae
      RIP: 0033:0x7f9828c2d059
      
      Fixes: c1f55c5e ("ip6_tunnel: allow routing IPv4 traffic in NBMA mode")
      Signed-off-by: default avatarEric Dumazet <edumazet@google.com>
      Cc: Qing Deng <i@moy.cat>
      Reported-by: default avatarsyzbot <syzkaller@googlegroups.com>
      Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
      3a5f238f
    • Tianyu Lan's avatar
      Netvsc: Call hv_unmap_memory() in the netvsc_device_remove() · b539324f
      Tianyu Lan authored
      netvsc_device_remove() calls vunmap() inside which should not be
      called in the interrupt context. Current code calls hv_unmap_memory()
      in the free_netvsc_device() which is rcu callback and maybe called
      in the interrupt context. This will trigger BUG_ON(in_interrupt())
      in the vunmap(). Fix it via moving hv_unmap_memory() to netvsc_device_
      remove().
      
      Fixes: 846da38d ("net: netvsc: Add Isolation VM support for netvsc driver")
      Signed-off-by: default avatarTianyu Lan <Tianyu.Lan@microsoft.com>
      Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
      b539324f
    • David S. Miller's avatar
      Merge branch '1GbE' of git://git.kernel.org/pub/scm/linux/kernel/git/tnguy/next-queue · 4d8cb5ff
      David S. Miller authored
      Tony Nguyen says:
      
      ====================
      1GbE Intel Wired LAN Driver Updates 2022-02-07
      
      Corinna Vinschen says:
      
      Fix the kernel warning "Missing unregister, handled but fix driver"
      when running, e.g.,
      
        $ ethtool -G eth0 rx 1024
      
      on igc.  Remove memset hack from igb and align igb code to igc.
      ====================
      Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
      4d8cb5ff