- 28 Dec, 2022 1 commit
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Yang Li authored
Make the description of @init to @p in dpu_encoder_phys_wb_init() and remove @wb_roi in dpu_encoder_phys_wb_setup_fb() to clear the below warnings: drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_wb.c:139: warning: Excess function parameter 'wb_roi' description in 'dpu_encoder_phys_wb_setup_fb' drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_wb.c:699: warning: Function parameter or member 'p' not described in 'dpu_encoder_phys_wb_init' drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_wb.c:699: warning: Excess function parameter 'init' description in 'dpu_encoder_phys_wb_init' Link: https://bugzilla.openanolis.cn/show_bug.cgi?id=3067Reported-by:
Abaci Robot <abaci@linux.alibaba.com> Signed-off-by:
Yang Li <yang.lee@linux.alibaba.com> Fixes: d7d0e73f ("drm/msm/dpu: introduce the dpu_encoder_phys_* for writeback") Reviewed-by:
Abhinav Kumar <quic_abhinavk@quicinc.com> Patchwork: https://patchwork.freedesktop.org/patch/511605/ Link: https://lore.kernel.org/r/20221115014902.45240-1-yang.lee@linux.alibaba.comSigned-off-by:
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- 26 Nov, 2022 4 commits
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Dmitry Baryshkov authored
Merge branches 'msm-next-lumag-core', 'msm-next-lumag-dpu', 'msm-next-lumag-dp', 'msm-next-lumag-dsi', 'msm-next-lumag-hdmi' and 'msm-next-lumag-mdp5' into msm-next-lumag Core: - MSM_INFO_GET_FLAGS support - Cleaned up MSM IOMMU wrapper code DPU: - Added support for XR30 and P010 image formats - Reworked MDSS/DPU schema, added SM8250 MDSS bindings - Added Qualcomm SM6115 support DP: - Dropped unsane sanity checks DSI: - Fix calculation of DSC pps payload DSI PHY: - DSI PHY support for QCM2290 HDMI: - Reworked dev init path And, as usual, small misc fixes. Signed-off-by:Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
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Adam Skladowski authored
Add required display hw catalog changes for SM6115. Reviewed-by:
Adam Skladowski <a39.skl@gmail.com> Reviewed-by:
Konrad Dybcio <konrad.dybcio@linaro.org> Patchwork: https://patchwork.freedesktop.org/patch/512875/ Link: https://lore.kernel.org/r/20221124001708.25720-3-a39.skl@gmail.comSigned-off-by:
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Adam Skladowski authored
Add DPU and MDSS schemas to describe MDSS and DPU blocks on the Qualcomm SM6115 platform. Configuration for DSI/PHY is shared with QCM2290 so compatibles are reused. Lack of dsi phy supply in example is intended due to fact on qcm2290, sm6115 and sm6125 this phy is supplied via power domain, not regulator. Signed-off-by:
Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Patchwork: https://patchwork.freedesktop.org/patch/512872/ Link: https://lore.kernel.org/r/20221124001708.25720-2-a39.skl@gmail.comSigned-off-by:
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Dmitry Baryshkov authored
Since the commit commit c6122688 ("drm/msm/mdp5: stop overriding drvdata") reading the MDP5 hw revision on db410c will crash the board as the MDSS_GDSC is not enabled. Revert a part of the offending commit (moving rpm enablement) and set priv->kms earlier. This make it possible to use pm_runtime_get_sync() during read_mdp_hw_revision(), which will power up both the MDP5 and MDSS devices. Fixes: c6122688 ("drm/msm/mdp5: stop overriding drvdata") Signed-off-by:
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- 22 Nov, 2022 2 commits
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Dan Carpenter authored
This code was recently refactored in commit and now the "hdmi" pointer can't be NULL. Checking for NULL leads to a Smatch warning: drivers/gpu/drm/msm/hdmi/hdmi.c:141 msm_hdmi_init() warn: variable dereferenced before check 'hdmi' (see line 119) Fixes: 69a88d86 ("drm/msm/hdmi: move resource allocation to probe function") Signed-off-by:Dan Carpenter <error27@gmail.com> Reviewed-by:
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Bryan O'Donoghue authored
Adding in msm8939 which is based msm8916 dtsi I stumbled across a binding check complaining about the phy name for msm8916 which we were reusing for msm8939. The currently inconsistent upstream dtsi naming of "dsi" and "dsi-phy" is not captured in the yaml for this driver. The driver however doesn't care about the name of DSI phy, hence the yaml check is redundant. Both Krzysztof and Rob suggested we could drop the phy-names entirely if it really isn't a dependency. So, drop the inconsistent and unnecessary phy-names field from the yaml. Signed-off-by:
Bryan O'Donoghue <bryan.odonoghue@linaro.org> Signed-off-by:
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- 04 Nov, 2022 19 commits
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Dmitry Baryshkov authored
Allow defining DSI OPP table inside the DSI controller node. Reviewed-by:
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Marijn Suijten authored
The bpg_offset array contains negative BPG offsets which fill the full 8 bits of a char thanks to two's complement: this however results in those bits bleeding into the next field when the value is packed into DSC PPS by the drm_dsc_helper function, which only expects range_bpg_offset to contain 6-bit wide values. As a consequence random slices appear corrupted on-screen (tested on a Sony Tama Akatsuki device with sdm845). Use AND operators to limit these two's complement values to 6 bits, similar to the AMD and i915 drivers. Fixes: b9080324 ("drm/msm/dsi: add support for dsc data") Reviewed-by:
Marijn Suijten <marijn.suijten@somainline.org> Patchwork: https://patchwork.freedesktop.org/patch/508941/ Link: https://lore.kernel.org/r/20221026182824.876933-11-marijn.suijten@somainline.orgSigned-off-by:
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Marijn Suijten authored
According to the comment this DPU register contains the bits per pixel as a 6.4 fractional value, conveniently matching the contents of bits_per_pixel in struct drm_dsc_config which also uses 4 fractional bits. However, the downstream source this implementation was copy-pasted from has its bpp field stored _without_ fractional part. This makes the entire convoluted math obsolete as it is impossible to pull those 4 fractional bits out of thin air, by somehow trying to reuse the lowest 2 bits of a non-fractional bpp (lsb = bpp % 4??). The rest of the code merely attempts to keep the integer part a multiple of 4, which is rendered useless thanks to data |= dsc->bits_per_pixel << 12; already filling up those bits anyway (but not on downstream). Fixes: c110cfd1 ("drm/msm/disp/dpu1: Add support for DSC") Signed-off-by:
Vinod Koul <vkoul@kernel.org> Patchwork: https://patchwork.freedesktop.org/patch/508946/ Link: https://lore.kernel.org/r/20221026182824.876933-10-marijn.suijten@somainline.orgSigned-off-by:
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Marijn Suijten authored
According to the `/* bpc 8 */` comment below only values for a bits_per_component of 8 are currently hardcoded in place. This is further confirmed by downstream sources [1] containing different constants for other BPC values (and different initial_offset too, with an extra dependency on bits_per_pixel). Prevent future mishaps by explicitly disallowing any other bits_per_component value until the right parameters are put in place and tested. [1]: https://git.codelinaro.org/clo/la/platform/vendor/opensource/display-drivers/-/blob/DISPLAY.LA.2.0.r1-08000-WAIPIO.0/msm/sde_dsc_helper.c#L110-139 Fixes: b9080324 ("drm/msm/dsi: add support for dsc data") Reviewed-by:
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Marijn Suijten authored
drm_dsc_config's bits_per_pixel field holds a fractional value with 4 bits, which all panel drivers should adhere to for drm_dsc_pps_payload_pack() to generate a valid payload. All code in the DSI driver here seems to assume that this field doesn't contain any fractional bits, hence resulting in the wrong values being computed. Since none of the calculations leave any room for fractional bits or seem to indicate any possible area of support, disallow such values altogether. calculate_rc_params() in intel_vdsc.c performs an identical bitshift to get at this integer value. Fixes: b9080324 ("drm/msm/dsi: add support for dsc data") Reviewed-by:
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Marijn Suijten authored
As per the FIXME this code is entirely duplicate with what is already provided inside drm_dsc_compute_rc_parameters(), supposedly because that function was yielding "incorrect" results while in reality the panel driver(s?) used for testing were providing incorrect parameters. For example, this code from downstream assumed dsc->bits_per_pixel to contain an integer value, whereas the upstream drm_dsc_config struct stores it with 4 fractional bits. drm_dsc_compute_rc_parameters() already accounts for this feat while the panel driver used for testing [1] wasn't, hence making drm_dsc_compute_rc_parameters() seem like it was returning an incorrect result. Other users of dsc->bits_per_pixel inside dsi_populate_dsc_params() also treat it in the same erroneous way, and will be addressed in a separate patch. In the end, using drm_dsc_compute_rc_parameters() spares both a lot of duplicate code and erratic behaviour. [1]: https://git.linaro.org/people/vinod.koul/kernel.git/commit/?h=topic/pixel3_5.18-rc1&id=1d7d98ad564f1ec69e7525e07418918d90f247a1 Fixes: b9080324 ("drm/msm/dsi: add support for dsc data") Reviewed-by:
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Marijn Suijten authored
This field is currently unread but will come into effect when duplicated code below is migrated to call drm_dsc_compute_rc_parameters(), which uses the bpc-dependent value of the local variable mux_words_size in much the same way. The hardcoded constant seems to be a remnant from the `/* bpc 8 */` comment right above, indicating that this group of field assignments is applicable to bpc = 8 exclusively and should probably bail out on different bpc values, until constants for other bpc values are added (or the current ones are confirmed to be correct across multiple bpc's). Fixes: b9080324 ("drm/msm/dsi: add support for dsc data") Reviewed-by:
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Marijn Suijten authored
dsi_populate_dsc_params() is called prior to dsi_update_dsc_timing() and already computes a value for slice_chunk_size, whose value doesn't need to be recomputed and re-set here. Fixes: 08802f51 ("drm/msm/dsi: Add support for DSC configuration") Reviewed-by:
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Marijn Suijten authored
This exact same math is used to compute bytes_in_slice above in dsi_update_dsc_timing(), also used to fill slice_chunk_size. Fixes: b9080324 ("drm/msm/dsi: add support for dsc data") Reviewed-by:
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Marijn Suijten authored
slice_per_intf is already computed for intf_width, which holds the same value as hdisplay. Fixes: 08802f51 ("drm/msm/dsi: Add support for DSC configuration") Reviewed-by:
Bjorn Andersson <andersson@kernel.org> Reviewed-by:
Konrad Dybcio <konrad.dybcio@somainline.org> Reviewed-by:
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Marijn Suijten authored
Multiplying a value by 2 and adding 1 to it always results in a value that is uneven, and that 1 gets truncated immediately when performing integer division by 2 again. There is no "rounding" possible here. After that target_bpp_x16 is used to store a multiplication of bits_per_pixel by 16 which is only ever read to immediately be divided by 16 again, and is elided in much the same way. Fixes: b9080324 ("drm/msm/dsi: add support for dsc data") Reviewed-by:
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Loic Poulain authored
The QCM2290 SoC a the 14nm (V2.0) single DSI phy. The platform is not fully compatible with the standard 14nm PHY, so it requires a separate compatible and config entry. Signed-off-by:
Loic Poulain <loic.poulain@linaro.org> [DB: rebased and updated commit msg] Signed-off-by:
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Loic Poulain authored
QCM2290 platform uses the 14nm DSI PHY driver. Signed-off-by:
Rob Herring <robh@kernel.org> Patchwork: https://patchwork.freedesktop.org/patch/504579/ Link: https://lore.kernel.org/r/20220924121900.222711-2-dmitry.baryshkov@linaro.orgSigned-off-by:
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Johan Hovold authored
Drop the overly defensive modeset sanity checks of function parameters which have already been checked or used by the callers. Reviewed-by:
Johan Hovold <johan+linaro@kernel.org> Tested-by:
Kuogee Hsieh <quic_khsieh@quicinc.com> Reviewed-by:
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Marijn Suijten authored
According to the comment this DPU register contains the bits per pixel as a 6.4 fractional value, conveniently matching the contents of bits_per_pixel in struct drm_dsc_config which also uses 4 fractional bits. However, the downstream source this implementation was copy-pasted from has its bpp field stored _without_ fractional part. This makes the entire convoluted math obsolete as it is impossible to pull those 4 fractional bits out of thin air, by somehow trying to reuse the lowest 2 bits of a non-fractional bpp (lsb = bpp % 4??). The rest of the code merely attempts to keep the integer part a multiple of 4, which is rendered useless thanks to data |= dsc->bits_per_pixel << 12; already filling up those bits anyway (but not on downstream). Fixes: c110cfd1 ("drm/msm/disp/dpu1: Add support for DSC") Signed-off-by:
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Johan Hovold authored
Drop the overly defensive modeset sanity checks of function parameters which have already been checked or used by the callers. Reviewed-by:
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Dmitry Baryshkov authored
To continue the idea of failing the probe() rather than failing the bind(), move the call to msm_hdmi_get_phy() function to msm_hdmi_dev_probe(), so that the driver fails the probe if PHY is not yet available rather than succeeding the probe and then failing the bind() with -EPROBE_DEFER. Signed-off-by:
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Dmitry Baryshkov authored
The of_find_device_by_node() already increments the device's usage count, so there is no need to increment it again using get_device(). Drop this extra get_device(). Signed-off-by:
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Dmitry Baryshkov authored
Rather than having all resource allocation happen in the _bind function (resulting in possible EPROBE_DEFER returns and component bind/unbind cycles) allocate and check all resources in _probe function. While we are at it, use platform_get_irq() to get the IRQ rather than going through the irq_of_parse_and_map(). Signed-off-by:
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- 02 Nov, 2022 14 commits
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Dmitry Baryshkov authored
The function a6xx_create_address_space() is mostly a copy of adreno_iommu_create_address_space() with added quirk setting. Rework these two functions to be a thin wrappers around a common helper. Signed-off-by:
Rob Clark <robdclark@gmail.com> Patchwork: https://patchwork.freedesktop.org/patch/509614/ Link: https://lore.kernel.org/r/20221102175449.452283-3-dmitry.baryshkov@linaro.orgSigned-off-by:
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Dmitry Baryshkov authored
After the msm_iommu instance is created, the IOMMU domain is completely handled inside the msm_iommu code. Move the iommu_domain_alloc() call into the msm_iommu_new() to simplify callers code. Reported-by:
kernel test robot <lkp@intel.com> Signed-off-by:
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Dmitry Baryshkov authored
All MSM HDMI devices use "core_physical" and "qfprom_physical" names for register areas. Drop them from the platform config. Signed-off-by:
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Dmitry Baryshkov authored
Use devm_pm_runtime_enable() to enable runtime PM. This way its effect will be reverted on device unbind/destruction. Fixes: 6ed9ed48 ("drm/msm/hdmi: Set up runtime PM for HDMI") Signed-off-by:
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Robert Foss authored
The sc7280_pp declaration is not located by the other _pp declarations, but rather hidden around the _merge_3d declarations. Let's fix this to avoid confusion. Signed-off-by:
Robert Foss <robert.foss@linaro.org> Reviewed-by:
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Dmitry Baryshkov authored
Add DPU and MDSS schemas to describe MDSS and DPU blocks on the Qualcomm SM8250 platform. Reviewed-by:
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Dmitry Baryshkov authored
Add missing device nodes (DSI, PHYs, DP/eDP) to the existing MDSS schemas. Reviewed-by:
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Dmitry Baryshkov authored
In order to make the schema more readable, split dpu-qcm2290 into the DPU and MDSS parts, each one describing just a single device binding. Reviewed-by:
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Dmitry Baryshkov authored
In order to make the schema more readable, split dpu-msm8998 into the DPU and MDSS parts, each one describing just a single device binding. Reviewed-by:
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Dmitry Baryshkov authored
In order to make the schema more readable, split dpu-sdm845 into the DPU and MDSS parts, each one describing just a single device binding. Reviewed-by:
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Dmitry Baryshkov authored
In order to make the schema more readable, split dpu-sc7280 into the DPU and MDSS parts, each one describing just a single device binding. Reviewed-by:
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Dmitry Baryshkov authored
In order to make the schema more readable, split dpu-sc7180 into the DPU and MDSS parts, each one describing just a single device binding. Reviewed-by:
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Dmitry Baryshkov authored
Move properties common to all MDSS DT nodes to the mdss-common.yaml. This extends qcom,msm8998-mdss schema to allow interconnect nodes, which will be added later, once msm8998 gains interconnect support. Reviewed-by:
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Dmitry Baryshkov authored
Move properties common to all DPU DT nodes to the dpu-common.yaml. Note, this removes description of individual DPU port@ nodes. However such definitions add no additional value. The reg values do not correspond to hardware INTF indices. The driver discovers and binds these ports not paying any care for the order of these items. Thus just leave the reference to graph.yaml#/properties/ports and the description. Reviewed-by:
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