Merge "ARM: mediatek: dts updates for v4.6" from Matthias Brugger:

Add support for mt7623 SoC.
Enable SMP support for mt7623.
Enable SMP support for mt2701
Add pinctrl for mt2701

* tag 'v4.5-next-dts' of https://github.com/mbgg/linux-mediatek:
  arm: dts: Add pinctrl/GPIO/EINT node for mt2701
  ARM: dts: mt2701: enable basic SMP bringup for mt2701
  ARM: dts: mt7623: enable SMP bringup
  ARM: dts: mediatek: add MT7623 basic support
  Document: DT: Add bindings for mediatek MT7623 SoC Platform

Merge tag 'at91-ab-4.6-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/abelloni/linux into next/dt

DT changes for 4.6:
 - Addition of the ADC for sama5d2 and sama5d2_xplained

* tag 'at91-ab-4.6-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/abelloni/linux:
  ARM: dts: at91: sama5d2 Xplained: enable the adc device
  ARM: dts: at91: sama5d2: add adc device
Signed-off-by: Olof Johansson <olof@lixom.net>

The patch adds LS2085a to PCIe compatible to fix the compatibility
issue when using firmware with LS2085a compatible property.
Signed-off-by: Minghuan Lian <minghuan.lian@nxp.com>
Signed-off-by: Mingkai Hu <mingkai.hu@nxp.com>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Olof Johansson <olof@lixom.net>

Merge tag 'versatile-dt-cleanup-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-integrator into next/dt

Versatile DT cleanups from Linus Walleij:

"this is a first pull request for my cleanups for the Versatile, as
the finished stuff should not be sitting in my tree but in ARM SoC.
This completes the ARM RealView PB1176 and PB11MPCore device trees,
and moves the Versatile to use power/reset.

The idea is to keep working on this cleanup branch and send additional
patches on top of this one as the prerequisites are merged into the MTD
and FBDEV subsystems. So please create a special versatile cleanup branch
(or suggest another approach).

As it happens, board files and device trees need to change at the same
time to make logical sense, especially for Versatile where auxdata is
replaced with DT entries, such as when reset is moved in the last patch
in this set. The MTD and CLCD changes will share this characteristic."

Versatile family cleanups step 1:
- Finalize RealView the PB1176 and PB11MPCore device trees
- Move Versatile to use the power/reset driver instead of a
  custom restart hook

* tag 'versatile-dt-cleanup-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-integrator:
  ARM: versatile: move restart to the device tree
  ARM: realview: add the DS1338 RTC to PB1176 DT
  ARM: pb1176: add ethernet to devicetree
  ARM: pb1176: add ISP1761 USB OTG host controller
  ARM: pb1176: add AACI to the device tree
  ARM: pb1176: add ICST307 clocks to the device tree
  ARM: realview: fix up PB11MP flash compat strings
  ARM: realview: add flash devices to the PB1176 DTS
Signed-off-by: Olof Johansson <olof@lixom.net>

Samsung DeviceTree updates and improvements for v4.6:
1. Add SROM controller device nodes.
2. Add Ethernet chip as child of SROM controller on SMDK5410.
3. Allow simultaneous usage exynos-rng and s5p-sss drivers on Exynos5.
4. Cleanup CPU configuration on Exynos542x/5800.
5. Add necessary nodes for cpufreq-dt driver on Exynos542x/5800 (OPPs,
   regulator supplies) which allows frequency and voltage scalling
   of this SoC.
6. Minor cleanups.

* tag 'samsung-dt-4.6' of git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux:
  ARM: dts: Replace legacy *,wakeup property with wakeup-source for exynos boards
  ARM: dts: Add GSCL block parent clock management to pm domain on exynos542x
  ARM: dts: Extend existing CPU OPP for exynos5800
  ARM: dts: Add CPU OPP properties for exynos542x/5800
  ARM: dts: Add cluster regulator supply properties for exynos542x/5800
  ARM: dts: Make CPU configuration more readable on exynos542x/5800
  ARM: dts: Replace legacy *,wakeup property with wakeup-source on s5pv210
  ARM: dts: Allow simultaneous usage exynos-rng and s5p-sss drivers on exynos5
  ARM: dts: Add Ethernet chip to exynos5410-smdk5410
  ARM: dts: Add SROM to exynos5410
  ARM: dts: Add SROM device node for exynos5
  ARM: dts: Add SROM device node for exynos4
  ARM: dts: Add pinctrl support to exynos5410
Signed-off-by: Olof Johansson <olof@lixom.net>

Merge tag 'renesas-dt-for-v4.6' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/dt

Renesas ARM Based SoC DT Updates for v4.6

* Use SCIF and USBHS fallback compatibility strings
* Add Baud Rate Generator (BRG) support for (H)SCIF
* Enable SCIF_CLK frequency and pins
* Use GIC_* defines
* Enable audio on r8a7793/gose
* Enable HDMI vidio out on r8a7793
* Enable i2c on r8a7793/gose
* Enable QSPI on alt
* Enable GPIO keys and leds on gise
* Enable audio on porter
* Enable DU on porter

* tag 'renesas-dt-for-v4.6' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas: (68 commits)
  ARM: dts: silk: Enable SCIF_CLK frequency and pins
  ARM: dts: porter: Enable SCIF_CLK frequency and pins
  ARM: dts: marzen: Enable SCIF_CLK frequency and pins
  ARM: dts: lager: Enable SCIF_CLK frequency and pins
  ARM: dts: koelsch: Enable SCIF_CLK frequency and pins
  ARM: dts: gose: Enable SCIF_CLK frequency and pins
  ARM: dts: bockw: Enable SCIF_CLK frequency and pins
  ARM: dts: alt: Enable SCIF_CLK frequency and pins
  ARM: dts: r8a7794: Add BRG support for (H)SCIF
  ARM: dts: r8a7793: Add BRG support for SCIF
  ARM: dts: r8a7791: Add BRG support for (H)SCIF
  ARM: dts: r8a7790: Add BRG support for (H)SCIF
  ARM: dts: r8a7779: Add BRG support for SCIF
  ARM: dts: r8a7778: Add BRG support for SCIF
  ARM: dts: r8a7794: Rename the serial port clock to fck
  ARM: dts: r8a7793: Rename the serial port clock to fck
  ARM: dts: r8a7791: Rename the serial port clock to fck
  ARM: dts: r8a7790: Rename the serial port clock to fck
  ARM: dts: r8a7779: Rename the serial port clock to fck
  ARM: dts: r8a7778: Rename the serial port clock to fck
  ...
Signed-off-by: Olof Johansson <olof@lixom.net>

Signed-off-by: Lars Persson <larper@axis.com>
Reviewed-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Olof Johansson <olof@lixom.net>

Initial device tree for the Artpec-6 SoC.
Signed-off-by: Lars Persson <larper@axis.com>
Reviewed-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Olof Johansson <olof@lixom.net>

This adds device tree bindings for the Artpec-6 SoC.
Signed-off-by: Lars Persson <larper@axis.com>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Olof Johansson <olof@lixom.net>

Merge tag 'v4.6-rockchip-dts32-1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into next/dt

Assorted bunch of 32bit Rockchip devicetree changes. More clocks,
nodes and fixes like the increased drive-strength on the firefly.
Most interesting is maybe the enablement of the pl330 option
for handling the broken flushp operation that is present on the
current Rockchip SoCs. Together with the driver-side enablement
this should give us working dma finally.

* tag 'v4.6-rockchip-dts32-1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip: (30 commits)
  ARM: dts: cros-ec-keyboard: Add LOCK key to keyboard matrix
  ARM: dts: rockchip: replace gpio-key,wakeup with wakeup-source property
  ARM: dts: rockchip: add arm,pl330-broken-no-flushp quirk for rk3036 SoCs
  ARM: dts: rockchip: Add arm, pl330-broken-no-flushp quirk for rk3xxx platform
  ARM: dts: rockchip: Add arm, pl330-broken-no-flushp quirk for rk3288 platform
  dt-bindings: rockchip-dw-mshc: add RK3036 dw-mshc description
  ARM: dts: rockchip: increase the mclk_fs to 512 for kylin board
  ARM: dts: rockchip: support the spi for rk3036
  ARM: dts: rockchip: add mclk for rt5616 on rk3036 kylin board
  ARM: dts: rockchip: add the leds control for rk3036-kylin board
  ARM: dts: rockchip: add tsadc node
  clk: rockchip: Add new id for rk3066 tsadc clock
  ARM: dts: rockchip: add clock-cells for usb phy nodes
  ARM: dts: rockchip: Assign RK3288 EDP_24M input centrally
  ARM: dts: rockchip: add soc-specific compatibles for rk3036 SoCs
  ARM: dts: rockchip: Bump sd card pin drive strength up on firefly boards
  dt-bindings: rockchip-dw-mshc: add RK3368 dw-mshc description
  ARM: dts: rockchip: Add the SDIO wifi on Radxa Rock2 square
  ARM: dts: rockchip: Add the iodomains for the Rock2 SOM
  ARM: dts: rockchip: add rk3288 mipi_dsi nodes
  ...
Signed-off-by: Olof Johansson <olof@lixom.net>

Merge tag 'stm32-dt-for-v4.6-1' of git://git.kernel.org/pub/scm/linux/kernel/git/mcoquelin/stm32 into next/dt

Highlights:
-----------
 - Add DMA controller node to stm32f429 MCU
 - Add pinctrl & gpio nodes to stm32f429 MCU
 - Remap stm32429-eval board SD-Ram to 0x0 for performance boost

* tag 'stm32-dt-for-v4.6-1' of git://git.kernel.org/pub/scm/linux/kernel/git/mcoquelin/stm32:
  ARM: dts: stm32f429: Boost perfs by remapping SDRAM Bank 1 to 0x0
  ARM: dts: Add leds support to STM32F429 boards
  ARM: dts: Add USART1 pin config to STM32F429 boards
  ARM: dts: Add pinctrl node to STM32F429
  includes: dt-bindings: Add STM32F429 pinctrl DT bindings
  ARM: dts: Add STM32 DMA support for STM32F429 MCU
Signed-off-by: Olof Johansson <olof@lixom.net>

Merge tag 'vexpress-for-v4.6/dt-updates' of git://git.kernel.org/pub/scm/linux/kernel/git/sudeep.holla/linux into next/dt

Few updates for ARM VExpress/Juno platforms

1. GICv3 support on Foundation models

2. Support for Juno R2 board

3. Support for ARM HDLCD on all Juno platforms

* tag 'vexpress-for-v4.6/dt-updates' of git://git.kernel.org/pub/scm/linux/kernel/git/sudeep.holla/linux:
  arm64: dts: Add HDLCD support on Juno platforms
  Documentation: drm: Add DT bindings for ARM HDLCD
  arm64: dts: Add support for Juno r2 board
  arm64: dts: move juno pcie-controller to base file
  arm64: dts: add .dts for GICv3 Foundation model
  arm64: dts: split Foundation model dts to put the GIC separately
  arm64: dts: Foundation model: increase GICC region to allow EOImode=1
  arm64: dts: prepare foundation-v8.dts to cope with GICv3
Signed-off-by: Olof Johansson <olof@lixom.net>

Merge DT changes for lpc32xx from Vladimir Zapolskiy:

"The changes add description of clock providers and clock consumers,
define default irq types of SoC controllers and add PHY3250 board
regulators.

I'm adding an official LPC32xx maintainer Roland to Cc, however he seems
to be unresponsive for a quite long time (since 2014)."

* 'lpc32xx/dt' of https://github.com/vzapolskiy/linux:
  arm: dts: phy3250: add SD fixed regulator
  arm: dts: phy3250: add lcd and backlight fixed regulators
  arm: dts: lpc32xx: assign interrupt types
  arm: dts: lpc32xx: remove clock frequency property from UART device nodes
  arm: dts: lpc32xx: add USB clock controller
  arm: dts: lpc32xx: add clock properties to device nodes
  arm: dts: lpc32xx: add clock controller device node
  arm: dts: lpc32xx: add device nodes for external oscillators
  dt-bindings: create arm/nxp folder and move LPC32xx SoC description to it
Signed-off-by: Olof Johansson <olof@lixom.net>

Keyboard driver for GPIO buttons(gpio-keys) checks for the legacy
"gpio-key,wakeup" boolean property to enable gpio buttons as wakeup
source.

Few dts files assign value "1" to gpio-key,wakeup which is incorrect.
Since the presence of the boolean property indicates it is enabled,
value of "0" or "1" have no significance.

This patch replaces the legacy "gpio-key,wakeup" with the unified
"wakeup-source" property which inturn fixes the above mentioned issue.
Reviewed-by: Viresh Kumar <viresh.kumar@linaro.org>
Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
Signed-off-by: Olof Johansson <olof@lixom.net>

mvebu dt for 4.6 (part 1)

- Improve Armada 38x device tree (SATA and XHCI)
- Fix SD Card and audio support for OpenRD board
- Provide template for RS-232/485 configuration for the same board
- Use a common dtsi file for linkstation boards
- Add support for Buffalo Linkstation LS-QVL

* tag 'mvebu-dt-4.6-1' of git://git.infradead.org/linux-mvebu:
  ARM: dts: kirkwood: add device tree for buffalo linkstation ls-qvl
  ARM: dts: kirkwood: fix audio for OpenRD clients
  ARM: dts: kirkwood: provide template for RS-232/485 configuration for OpenRD
  ARM: dts: kirkwood: split lswvl dts to linkstation lsvl and lswvl
  ARM: dts: kirkwood: split lswxl dts to linkstation lswsxl and lswxl
  ARM: dts: kirkwood: relicense dts of ls-wvl/vl and ls-wxl/wsxl under GPLv2/X11
  ARM: dts: kirkwood: fix SD slot default configuration for OpenRD
  ARM: dts: kirkwood: fix pin names for UART/SD selection for OpenRD
  ARM: dts: armada-370: Update the mpp63 function in the device tree on Armada 370
  ARM: dts: armada-38x: use usb-nop-xceiv PHY for the xhci nodes on Armada 388 GP
  ARM: dts: armada-38x: use regulator-boot-on for SATA regulators on Armada 388 GP
  ARM: dts: armada-38x: adjust board name and compatible for Armada 388 GP
Signed-off-by: Olof Johansson <olof@lixom.net>

Enable the adc on the sama5d2 Xplained board.
Signed-off-by: Ludovic Desroches <ludovic.desroches@atmel.com>
Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>

Add the ADC device, and remove the adc_op_clk which is useless since the
adc sampling frequency is configured with sysfs.
Signed-off-by: Ludovic Desroches <ludovic.desroches@atmel.com>
Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>

We have a power/reset driver for the Versatile family
in drivers/power/reset so let's just activate that driver
and use it and get rid of some non-DT remnants.

Cc: Rob Herring <robh@kernel.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>

This adds the Versatile I2C adapter and the Dallas DS1338
RTC on it to the PB1176 device tree.
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>

The PB1176 device tree was missing the SMSC9118 ethernet adapter,
so add it. Since this peripheral is not in either development
chip but on the board itself, it gets defined in the root node
of the device tree.
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>

The USB host controller was missing from the device tree so add
it. This device is not inside either the development chip or the
FPGA but mounted on the board, so it ends up in the root node of
the device tree.
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>

The device tree was missing the definition of the AACI
Advanced Audio Codec Interface, so add it. Tested on the hardware
and it works.
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>

This adds the five ICST307 clocks to the device tree, so we
can use these with e.g. CLCD.
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>

The two flash memories in the PB11MPCore have their VPP/WP
lines controlled from the system controller add-on in the MTD
subsystem. "arm,versatile-flash" is the first compatible string
to use to get the right support.

Cc: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>

This adds the flash memories and ROM to the PB1175 DTS file.
The secure flash is marked as "disabled" by default so as to
protect the user from overwriting the boot monitor.

Cc: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>

STM32F429 allows to remap FMC SDRAM Bank 1 from 0xc0000000 to 0x0,
by writing 0x4 to SYSCFG_MEMRMP register.

As mentionned in the reference manual (see chapter 9.3.1), the performance
gain is really interresting:
"In remap mode at address 0x0000 0000, the CPU can access the external
memory via ICode bus instead of System bus which boosts up the
performance."

These are the dhrystone results with and without the remap enabled:
Default (SDRAM in 0xc0000000):
---------------------------------
Microseconds for one run through Dhrystone:   31.8
Dhrystones per Second:                      31416.9

Remap (SDRAM in 0x0000000):
-----------------------------
Microseconds for one run through Dhrystone:   20.6
Dhrystones per Second:                      48520.1

This patch first change the SDRAM start address to 0x0 for STM32429i-EVAL
board, and also set the dma-range property as the other masters than the M4
CPU still see SDRAM in 0xc0000000.

Note that the Discovery board cannot benefit from this feature, since the
SDRAM is connected to Bank 2.
Signed-off-by: Maxime Coquelin <mcoquelin.stm32@gmail.com>

Acked-by: Patrice Chotard <patrice.chotard@st.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Maxime Coquelin <mcoquelin.stm32@gmail.com>

This patch selects USART1 pin configuration on PA9/PA10 pins
for both Eval and Disco boards.
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Acked-by: Patrice Chotard <patrice.chotard@st.com>
Signed-off-by: Maxime Coquelin <mcoquelin.stm32@gmail.com>

The STM32F429 MCU has 11 GPIO banks, with 16 pins per bank.
Acked-by: Patrice Chotard <patrice.chotard@st.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Maxime Coquelin <mcoquelin.stm32@gmail.com>

Acked-by: Patrice Chotard <patrice.chotard@st.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Maxime Coquelin <mcoquelin.stm32@gmail.com>

Add pinctrl and GPIO node to mt2701.dtsi
Signed-off-by: Biao Huang <biao.huang@mediatek.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>

Add enable method to support SMP.
Signed-off-by: Louis Yu <louis.yu@mediatek.com>
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>

Add support for booting secondary CPUs on MT7623.
Signed-off-by: John Crispin <blogic@openwrt.org>
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>

This adds basic chip support for Mediatek MT7623.
Signed-off-by: John Crispin <blogic@openwrt.org>
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>

This adds a DT binding documentation for the MT7623 SoC from Mediatek.
Signed-off-by: John Crispin <blogic@openwrt.org>
Cc: devicetree@vger.kernel.org
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>

The change adds fixed voltage regulator for SD controller, ARM MMCI
controller driver uses it to control card power management.
Signed-off-by: Vladimir Zapolskiy <vz@mleia.com>

Phytec PHY3250 board has GPIO controlled regulators for LCD and
backlight, add their descriptions to board DTS file.
Signed-off-by: Vladimir Zapolskiy <vz@mleia.com>

LPC32xx interrupt controller has two cells, instead of zero
specify proper irq types for all consumers.
Signed-off-by: Vladimir Zapolskiy <vz@mleia.com>

If clock-frequency property is given, then it substitutes calculation
of supplying clock frequency from parent clock, this may break UART,
if parent clock is given and managed by common clock framework.
Signed-off-by: Vladimir Zapolskiy <vz@mleia.com>

The change adds device node of LPC32xx USB clock controller and adds
clock properties to USB OHCI, USB device and I2C controller to USB phy
device nodes.
Signed-off-by: Vladimir Zapolskiy <vz@mleia.com>