- 13 Mar, 2017 40 commits
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Andreas Schultz authored
Having both GTPv0-U and GTPv1-U is not always desirable. Fallback from GTPv1-U to GTPv0-U was depreciated from 3GPP Rel-8 onwards. Post Rel-8 implementation are discuraged from listening on the v0 port (see 3GPP TS 29.281, Sect. 1). A future change will completely decouple the sockets from the network device. Till then, at least one of the sockets needs to be specified (either v0 or v1), the other is optional. Signed-off-by:
Andreas Schultz <aschultz@tpip.net> Signed-off-by:
David S. Miller <davem@davemloft.net>
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Andreas Schultz authored
After enabling the UDP encapsulation, only the sk member is used. Holding the socket would prevent user space from closing the socket, but holding a reference to the sk member does not have the same effect. This change will make it simpler to later detach the sockets from the netdevice. Signed-off-by:
Andreas Schultz <aschultz@tpip.net> Signed-off-by:
David S. Miller <davem@davemloft.net>
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Joao Pinto authored
This patch adds the rx queue default size when dma interrupts are treated, since dma op mode can be also set there. Signed-off-by:
Joao Pinto <jpinto@synopsys.com> Signed-off-by:
David S. Miller <davem@davemloft.net>
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Joao Pinto authored
This patch configures default number of RX and TX queues when using the pci glue driver. Signed-off-by:
Joao Pinto <jpinto@synopsys.com> Signed-off-by:
David S. Miller <davem@davemloft.net>
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David S. Miller authored
Fixes: 49b49971 ("net: sched: make default fifo qdiscs appear in the dump") Reported-by:
kbuild test robot <fengguang.wu@intel.com> Signed-off-by:
David S. Miller <davem@davemloft.net>
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Zhu Yanjun authored
Replace init_timer with setup_timer to simplify the source code. Signed-off-by:
Zhu Yanjun <yanjun.zhu@oracle.com> Signed-off-by:
David S. Miller <davem@davemloft.net>
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David S. Miller authored
Vivien Didelot says: ==================== net: dsa: mv88e6xxx: rework ATU support The purpose of this patch series is to rework the code related to the Address Translation Unit (ATU), and bring support for it to the 88E6390 family of switch chips. All Global (1) ATU related code have been reworked and moved to its own file. Some port related bits used for ATU configuration (such as the Learn2All and MessagePort feature) have also been taken care of. The ports' mode and egress flooding mode have been refactored to fix the egress of frames with unknown unicast or multicast destination address, and write all these bits regardless the port mode (Normal, DSA, etc.) Finally remove the eth_addr_greater which was only used by mv88e6xxx. Changes in v2: - add Reviewed-by tags - split mv88e6xxx_g1_atu_set_age_time and mv88e6xxx_atu_setup addition - remove DSA_TAG_PROTO_TRAILER check - split Message Port and Learn2All addition - remove unused MV88E6XXX_FLAG_G1_ATU_FID flag - add dsa_is_normal_port helper ==================== Signed-off-by:
David S. Miller <davem@davemloft.net>
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Vivien Didelot authored
eth_addr_greater() was introduced for the mv88e6xxx driver, but is not used anymore. There is no other user, thus remove this function. Signed-off-by:
Vivien Didelot <vivien.didelot@savoirfairelinux.com> Reviewed-by:
Andrew Lunn <andrew@lunn.ch> Signed-off-by:
David S. Miller <davem@davemloft.net>
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Vivien Didelot authored
Add a new operation to disable the DA, SA and VTU priority override. Setting such limit is not likely to be used soon, so provide a port_disable_pri_override operation directly. This can be changed later for port_set_pri_override when we'll need it. Also remove the now obsolete mv88e6xxx_6320_family helper. Signed-off-by:
Vivien Didelot <vivien.didelot@savoirfairelinux.com> Reviewed-by:
Andrew Lunn <andrew@lunn.ch> Signed-off-by:
David S. Miller <davem@davemloft.net>
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Vivien Didelot authored
Add a new operation to disable the limiting of learnt MAC addresses. Setting such limit is not likely to be used soon, so provide a port_disable_learn_limit operation directly. This can be changed later for port_set_learn_limit when we'll need it. Signed-off-by:
Vivien Didelot <vivien.didelot@savoirfairelinux.com> Reviewed-by:
Andrew Lunn <andrew@lunn.ch> Signed-off-by:
David S. Miller <davem@davemloft.net>
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Vivien Didelot authored
The Marvell switch ports can be configured to allow or prevent egress of frames with an unknown unicast or multicast destination address. Some switch chips such as 88E6095 and 88E6185 have two disjoint bits in Port Control Register (0x04) bit 2 "Forward Unknown" (for unicast) and Port Control 2 Register (0x08) bit 6 "Default Forward" (for multicast). Other chips such as 88E6085, 88E6123, 88E6352, and 88E6390 have a 2-bit value in Port Control Register (0x04) bits 3:2 "EgressFloods". The current code does not fully implement the disjoint bits variant and assigns incorrect ones to some chip models. Fix that with two implementation references (6185 and 6352 that I currently have) of a port_set_egress_floods operation (as named in datasheets). Old chips such as 88E6060 don't have egress flooding mode, so don't error out if the operation is not provided. Signed-off-by:
Vivien Didelot <vivien.didelot@savoirfairelinux.com> Signed-off-by:
David S. Miller <davem@davemloft.net>
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Vivien Didelot authored
A switch port mode is defined by the association of its egress mode, its frame mode and if supported or required, the ether type value. Pack all this in a mv88e6xxx_set_port_mode function and provide helpers for the Normal Network mode, the DSA mode, and the Ether Type DSA mode, as well as an helper to setup a port's mode depending on its nature. Define PORT_ETH_TYPE_DEFAULT for the 0x9100 reset value of port E Type. Signed-off-by:
Vivien Didelot <vivien.didelot@savoirfairelinux.com> Signed-off-by:
David S. Miller <davem@davemloft.net>
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Vivien Didelot authored
Introduce a dsa_is_normal_port helper to check if a given port is a normal user port as opposed to a CPU port or DSA link. Signed-off-by:
Vivien Didelot <vivien.didelot@savoirfairelinux.com> Reviewed-by:
Andrew Lunn <andrew@lunn.ch> Signed-off-by:
David S. Miller <davem@davemloft.net>
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Vivien Didelot authored
Not all Marvell switch chips support port trunking, which is embedded in the port vector data for ATU operations. Rename the portv_trunkid member of the mv88e6xxx_atu_entry structure to portvec to be more concise and consistent with the different chips. Signed-off-by:
Vivien Didelot <vivien.didelot@savoirfairelinux.com> Reviewed-by:
Andrew Lunn <andrew@lunn.ch> Signed-off-by:
David S. Miller <davem@davemloft.net>
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Vivien Didelot authored
Rename the _mv88e6xxx_fid_new helper to mv88e6xxx_atu_new to get rid of the old underscore prefix naming convention and be consistent with the rest of the chip-wide ATU API. Signed-off-by:
Vivien Didelot <vivien.didelot@savoirfairelinux.com> Reviewed-by:
Andrew Lunn <andrew@lunn.ch> Signed-off-by:
David S. Miller <davem@davemloft.net>
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Vivien Didelot authored
Add a fresh documented implementation of the ATU Move operation, and use it to replace the current ATU Remove operation. Note that not all Marvell switch chip support the ATU Move operation. For those supporting it, the number of bits used to mask the destination port may vary. 6352 and such use 4-bit, while 6390 use 5-bit. Thus add a new atu_move_port_mask member in the info structure to describe the presence and variant of ATU Move operation. Note that the ATU Move operation is not documented in the 6185 datasheet but the chip does support the operation. All remaining _mv88e6xxx_atu_* functions are now unused as well as the MV88E6XXX_FLAG_G1_ATU_FID flag, thus remove them. Signed-off-by:
Vivien Didelot <vivien.didelot@savoirfairelinux.com> Signed-off-by:
David S. Miller <davem@davemloft.net>
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Vivien Didelot authored
Add a fresh documented implementation of the ATU Flush/Move operation. Use it to replace the current ATU Flush operation. _mv88e6xxx_atu_flush_move is still used by the Move operation so keep it until the Move operation is refactored in a next commit. Signed-off-by:
Vivien Didelot <vivien.didelot@savoirfairelinux.com> Signed-off-by:
David S. Miller <davem@davemloft.net>
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Vivien Didelot authored
Add and use a fresh documented implementation of the ATU GetNext. Since it is not necessary to write the MAC address to iterate from, only do it once directly in the ATU GetNext operation, if the provided ATU entry structure is not valid. This makes the user code simpler. Also, there is no need to loop when getting a single ATU entry. So remove the mv88e6xxx_atu_get helper and add a simpler snippet in mv88e6xxx_port_db_load_purge to lookup a given MAC address. The _mv88e6xxx_atu_mac_{read,write} are not used anymore thus remove them. _mv88e6xxx_atu_data_{read,write} are still used so keep them. Signed-off-by:
Vivien Didelot <vivien.didelot@savoirfairelinux.com> Signed-off-by:
David S. Miller <davem@davemloft.net>
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Vivien Didelot authored
All Marvell switch chips have an ATU accessed using the same Global (1) register layout. Only the handling of the FID differs as more bits were necessary to support more and more databases. Add and use a fresh documented implementation of the ATU Load/Purge. The static mv88e6xxx_g1_atu_{fid_write,op_wait,op,data_write,mac_write} functions won't need to be exposed in the end so for the moment keep their counterparts _mv88e6xxx_atu_{wait,cmd,data_write,mac_write} as is, since they are still used by other ATU operations. Signed-off-by:
Vivien Didelot <vivien.didelot@savoirfairelinux.com> Signed-off-by:
David S. Miller <davem@davemloft.net>
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Vivien Didelot authored
The ATU Learn2All feature allows newly learnt addresses to be spanned on ports marked as "Message Port", currently all DSA ports. This commit enables this feature which is necessary and quite convenient for multi-chip switch fabrics. Signed-off-by:
Vivien Didelot <vivien.didelot@savoirfairelinux.com> Signed-off-by:
David S. Miller <davem@davemloft.net>
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Vivien Didelot authored
All interconnectable Marvell switch chips have an ATU Learn2All feature which allows newly learnt addresses to be spanned on ports marked as "Message Port". This commit configures the DSA ports as Message Port. Note that this has no effect until the Learn2All feature is enabled. Signed-off-by:
Vivien Didelot <vivien.didelot@savoirfairelinux.com> Signed-off-by:
David S. Miller <davem@davemloft.net>
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Vivien Didelot authored
Move the configuration of the default ageing time in a new mv88e6xxx_atu_setup function. That function will be extended later to contain all ATU related configuration bits. Signed-off-by:
Vivien Didelot <vivien.didelot@savoirfairelinux.com> Reviewed-by:
Andrew Lunn <andrew@lunn.ch> Signed-off-by:
David S. Miller <davem@davemloft.net>
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Vivien Didelot authored
Move the ATU ageing time setter code in a new global1_atu.c file, which will be extended in future patches to contains all consequent Global (1) ATU support code. Signed-off-by:
Vivien Didelot <vivien.didelot@savoirfairelinux.com> Signed-off-by:
David S. Miller <davem@davemloft.net>
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Vivien Didelot authored
Add a mv88e6xxx_port_mask() helper to get the bitmask of ports in a switch chip, that will be used in several features. Signed-off-by:
Vivien Didelot <vivien.didelot@savoirfairelinux.com> Reviewed-by:
Andrew Lunn <andrew@lunn.ch> Signed-off-by:
David S. Miller <davem@davemloft.net>
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David S. Miller authored
Jiri Pirko says: ==================== mlxsw: Add support for TC flower offload statistics Arkadi says: This patchset adds support for retrieving TC flower statistics for offloaded rules, which includes packets count, bytes count and last used time stamp. Currently The statistics are gathered on a per-rule basis. This patchset also includes generic allocator for counters. ==================== Signed-off-by:
David S. Miller <davem@davemloft.net>
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Arkadi Sharshevsky authored
Add support for TC flower offload statistics including number of packets, bytes and last use timestamp. Currently the statistics are gathered on a per-rule basis. Signed-off-by:
Arkadi Sharshvesky <arkadis@mellanox.com> Reviewed-by:
Ido Schimmel <idosch@mellanox.com> Signed-off-by:
Jiri Pirko <jiri@mellanox.com> Signed-off-by:
David S. Miller <davem@davemloft.net>
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Arkadi Sharshevsky authored
Add support for packets and byte statistics on TCAM entries. The counters are allocated from the generic flow counters pool. Signed-off-by:
Arkadi Sharshevsky <arkadis@mellanox.com> Reviewed-by:
Ido Schimmel <idosch@mellanox.com> Signed-off-by:
Jiri Pirko <jiri@mellanox.com> Signed-off-by:
David S. Miller <davem@davemloft.net>
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Arkadi Sharshevsky authored
Add support for Policing and Counting action block. This action block will be used to bind counter to TCAM entries. Signed-off-by:
Arkadi Sharshevsky <arkadis@mellanox.com> Reviewed-by:
Ido Schimmel <idosch@mellanox.com> Signed-off-by:
Jiri Pirko <jiri@mellanox.com> Signed-off-by:
David S. Miller <davem@davemloft.net>
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Arkadi Sharshevsky authored
Introduce periodic task for dumping the activity status for the ACL rule TCAM entries. This is done in order to emulate last use statistics. Signed-off-by:
Arkadi Sharshevsky <arkadis@mellanox.com> Reviewed-by:
Ido Schimmel <idosch@mellanox.comi> Signed-off-by:
Jiri Pirko <jiri@mellanox.com> Signed-off-by:
David S. Miller <davem@davemloft.net>
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Arkadi Sharshevsky authored
Currently the ACL rules can be accessed only by hashing. In order to dump the activity the rules are also placed in a list. Signed-off-by:
Arkadi Sharshevsky <arkadis@mellanox.com> Reviewed-by:
Ido Schimmel <idosch@mellanox.com> Signed-off-by:
Jiri Pirko <jiri@mellanox.com> Signed-off-by:
David S. Miller <davem@davemloft.net>
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Arkadi Sharshevsky authored
Add support for retrieving TCAM entry activity. In order to support ACL rule activity corresponding TCAM entry should be queried. Signed-off-by:
Arkadi Sharshevsky <arkadis@mellanox.com> Reviewed-by:
Ido Schimmel <idosch@mellanox.com> Signed-off-by:
Jiri Pirko <jiri@mellanox.com> Signed-off-by:
David S. Miller <davem@davemloft.net>
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Arkadi Sharshevsky authored
Add support for allocating generic flow counter. Generic flow counter can count packets or packets and bytes and can be assigned to different hardware processes. First use will be for counting packets and bytes of ACL rules, and will be introduced in the following patches. Signed-off-by:
Arkadi Sharshevsky <arkadis@mellanox.com> Reviewed-by:
Ido schimmel <idosch@mellanox.com> Signed-off-by:
Jiri Pirko <jiri@mellanox.com> Signed-off-by:
David S. Miller <davem@davemloft.net>
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Arkadi Sharshevsky authored
The MGPC register retrieves generic flow counter value. It will be used to query ACL counters. Signed-off-by:
Arkadi Sharshevsky <arkadis@mellanox.com> Reviewed-by:
Ido Schimmel <idosch@mellanox.com> Signed-off-by:
Jiri Pirko <jiri@mellanox.com> Signed-off-by:
David S. Miller <davem@davemloft.net>
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Arkadi Sharshevsky authored
Add implementation for counter allocator. The ASIC has special memory pool for various counting purposes. Counter memory is distributed between equal size banks. The static sub-pool configuration should specify the following parameters for each sub-pool: - Number of required banks. - Maximum entry size. Each module can add dedicated sub-pool or use existing one. Signed-off-by:
Arkadi Sharshevsky <arkadis@mellanox.com> Reviewed-by:
Ido Schimmel <idosch@mellanox.com> Signed-off-by:
Jiri Pirko <jiri@mellanox.com> Signed-off-by:
David S. Miller <davem@davemloft.net>
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Geliang Tang authored
Use setup_timer() instead of init_timer() to simplify the code. Signed-off-by:
Geliang Tang <geliangtang@gmail.com> Signed-off-by:
David S. Miller <davem@davemloft.net>
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Geliang Tang authored
Use setup_timer() instead of init_timer() to simplify the code. Signed-off-by:
Geliang Tang <geliangtang@gmail.com> Signed-off-by:
David S. Miller <davem@davemloft.net>
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David S. Miller authored
Jakub Kicinski says: ==================== nfp: XDP adjust head support This series adds support for XDP adjust head. Bulk of the code is actually just paying technical debt. On reconfiguration request nfp was allocating new resources separately leaving device running with the existing set of rings. We used to manage the new resources in special ring set structures. This set is simply separating the datapath part of the device structure from the control information allowing the new datapath structure to be allocated with all new memory and rings. The swap operation is now greatly simplified. We also save a lot of parameter passing this way. Hopefully the churn is worth the negative diffstat. Support for XDP adjust head is done in a pretty standard way. NFP is a bit special because it prepends metadata before packet data so we have to do a bit of memcpying in case XDP will run. We also luck out a little bit because the fact that we already have prepend space allocated means that one byte is enough to store the extra XDP space (256 of standard prepend space is a bit inconvenient since it would normally require 16bits or boolean with additional shifts). ==================== Signed-off-by:
David S. Miller <davem@davemloft.net>
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Jakub Kicinski authored
Support prepending data from XDP. We are already always allocating some headroom because FW may prepend metadata to packets. xdp_adjust_head() can be supported by making sure that headroom is big enough for XDP. In case FW had prepended metadata to the packet, however, we have to move it out of the way before we call XDP. Signed-off-by:
Jakub Kicinski <jakub.kicinski@netronome.com> Signed-off-by:
David S. Miller <davem@davemloft.net>
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Jakub Kicinski authored
XDP may require us to move metadata to make room for pushing headers. Track meta data location with a pointer and pass it explicitly to functions. While at it validate that meta_len from the descriptor is not bogus. Signed-off-by:
Jakub Kicinski <jakub.kicinski@netronome.com> Signed-off-by:
David S. Miller <davem@davemloft.net>
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Jakub Kicinski authored
Rename pkt_off variable to dma_off, it should hold data offset counting from beginning of DMA mapping. Compute the value only in XDP context. Signed-off-by:
Jakub Kicinski <jakub.kicinski@netronome.com> Signed-off-by:
David S. Miller <davem@davemloft.net>
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