- 28 Jul, 2022 3 commits
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Roy Sun authored
The comments say that the product number is a 16-digit HEX string so the buffer needs to be at least 17 characters to hold the NUL terminator. Expand the buffer size to 20 to avoid the alignment issues. The comment:Product number should only be 16 characters. Any more,and something could be wrong. Cap it at 16 to be safe Signed-off-by:
Roy Sun <Roy.Sun@amd.com> Reviewed-by:
André Almeida <andrealmeid@igalia.com> Reviewed-by:
Alex Deucher <alexander.deucher@amd.com> Signed-off-by:
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Guchun Chen authored
Keep code consistency when accessing drm_device from amdgpu driver. Signed-off-by:
Guchun Chen <guchun.chen@amd.com> Reviewed-by:
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wangjianli authored
Delete the redundant word 'in'. Signed-off-by:
wangjianli <wangjianli@cdjrlc.com> Signed-off-by:
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- 27 Jul, 2022 1 commit
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git://anongit.freedesktop.org/drm/drmDave Airlie authored
drm/nouveau-misc: display patches. These are just some precursor and cleanup display patches from Ben, tested by Lyude. Signed-off-by:
Dave Airlie <airlied@redhat.com> From: Dave Airlie <airlied@gmail.com> Link: https://patchwork.freedesktop.org/patch/msgid/CAPM=9ty0R37q0mohBr_CegpYLXK2=fAH54QfAsMhHfPygTsdQA@mail.gmail.com
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- 26 Jul, 2022 18 commits
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Dave Airlie authored
Merge tag 'amd-drm-next-5.20-2022-07-26' of https://gitlab.freedesktop.org/agd5f/linux into drm-next amdgpu: - VCN4 fixes - RAS support for UMC 8.10 - ACP support for jadeite platforms - NBIO HDP flush fixes - Misc spelling and grammar fixes - Runtime PM fixes - Non-DC HPD fix - Clean up amdgpu DM code - DSC fixes - Expose some additional GFXOFF data via debugfs - More FP clean up for new DCN blocks - PPC DC FP fixes - DCN 3.1.4 fixes - DC DML stack usage fixes - GMC fixes - SPM fixes for RDNA2 amdkfd: - MMU notifier fix - Mutex fix UAPI: - Add a comment about VCN4 unified queues - IP version information for UMDs Proposed mesa change: https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17411/diffs?commit_id=c8a63590dfd0d64e6e6a634dcfed993f135dd075Signed-off-by:
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Ben Skeggs authored
Signed-off-by:
Ben Skeggs <bskeggs@redhat.com> Reviewed-by:
Lyude Paul <lyude@redhat.com> Signed-off-by:
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Ben Skeggs authored
Will be used to more cleanly implement existing method interfaces that take some confusing (IEDTkey, inherited from VBIOS, which RM no longer uses on Ampere) match values to determine which display path to operate on. Methods will be protected from racing with supervisor, and from being called where they shouldn't be (ie. without an OR assigned). v2: - use ?: (lyude) v3: - fix return code if noacquire() method fails Signed-off-by:
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Ben Skeggs authored
Will be used to protect NVIF_CLASS_OUTP method calls from racing with in-progress supervisor handling. Signed-off-by:
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Ben Skeggs authored
And use it to bail early in DP detection and avoid futile AUX transactions. This could be used on other connector types too in theory, but it's not something we've ever done before and I'd rather not risk breaking working systems without looking into it more closely. It's safe for DP though. We already do this by checking an AUX register that contains HPD status and aborting the transaction. However, this is much deeper in the stack - after taking various mutexes, poking HW for no good reason, and making a mess in debug logs. Signed-off-by:
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Ben Skeggs authored
Will be used to provide more solid driver interfaces in general, but the immediate motivation is work towards fixing issues with handling hotplug/DP IRQ events. Its use is currently limited to where we support non-polled hotplug already (ie. any GPU since NV40ish era, where our DCB handling works well enough), until that gets cleaned up someday. v2: - use ?: (lyude) Signed-off-by:
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Ben Skeggs authored
Replaces a bunch of unnecessarily duplicated boilerplate in per-chipset code with a simpler, common, implementation. Channel "awaken" notify code is completely gone for now. KMS has never made use of it so far, and event notify handling is about to be changed in general anyway. Signed-off-by:
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Ben Skeggs authored
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Ben Skeggs authored
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Ben Skeggs authored
Simpler, and less error-prone than a separate set of function pointers. Signed-off-by:
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Ben Skeggs authored
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Ben Skeggs authored
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Ben Skeggs authored
No changes to code at all here, just shuffling it around and removing a bunch of (now unnecessary) forward-declarations from headers. Signed-off-by:
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Ben Skeggs authored
About to expose head/output path/connector objects everywhere, so we will need support for child classes prior to nv50 now. Somewhat cleaner than the code >=nv50 used previously. v2: - use ?: (lyude) Signed-off-by:
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Ben Skeggs authored
Dump of one struct's members into another, with a couple of list renames because of collisions. Signed-off-by:
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Ben Skeggs authored
Aside from a chicken-and-egg problem with a duplicate 'root' member, this is a straight dump of function pointers from one struct into another. The left-over wrapping mess in >=nv50 structs will be fixed later. Signed-off-by:
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Ben Skeggs authored
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Ben Skeggs authored
There should be no changes to code here other than modifying the dereferences. Signed-off-by:
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- 25 Jul, 2022 18 commits
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Rodrigo Siqueira authored
When we use the allmodconfig option we see the following error: drivers/gpu/drm/amd/amdgpu/../display/dc/dml/dcn32/display_mode_vba_32.c: In function 'dml32_ModeSupportAndSystemConfigurationFull': drivers/gpu/drm/amd/amdgpu/../display/dc/dml/dcn32/display_mode_vba_32.c:3799:1: error: the frame size of 2464 bytes is larger than 2048 bytes [-Werror=frame-larger-than=] 3799 | } // ModeSupportAndSystemConfigurationFull This commit fixes this issue by moving part of the mode support operation from ModeSupportAndSystemConfigurationFull to a dedicated function. Cc: Harry Wentland <harry.wentland@amd.com> Cc: Alex Deucher <alexander.deucher@amd.com> Cc: Aurabindo Pillai <aurabindo.pillai@amd.com> Cc: Stephen Rothwell <sfr@canb.auug.org.au> Tested-by:
Stephen Rothwell <sfr@canb.auug.org.au> Acked-by:
Rodrigo Siqueira <Rodrigo.Siqueira@amd.com> Signed-off-by:
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Anthony Koo authored
This version brings along following fixes: - Copy crc_skip_count when duplicating CRTC state - Add debug option for idle optimizations on cursor updates - Disable MPC split for DCN32/321 - Add missing ODM 2:1 policy logic - Update DCN32 and DCN321 SR latencies - Add reinstate dram in the FPO logic - Add dc_ctx to link_enc_create() parameters - Cache cursor when cursor exceeds 64x64 - Add support for manual DMUB FAMS trigger - Fix dpstreamclk programming - Add missing AUDIO_DTO_SEL reg field - Add OTG/ODM functions - Use correct clock source constructor for DCN314 - Use correct DTO_SRC_SEL for 128b/132b encoding - Add pixel rate div calcs and programming - Remove FPU flags from DCN30 Makefile - Create patch bounding box function for isolate FPU - Move mclk calculation function to DML - Remove FPU operations from dcn201 resources - Fallback to SW cursor if SubVP + cursor too big - Drop unnecessary FPU flags on dcn302 files - Reboot while unplug hdcp enabled dp from mst hub - Reset pipe count when iterating for DET override - Calculate MALL cache lines based on Mblks required - Fix two MPO videos in single display ODM combine mode - Guard against zero memory channels - Updates SubVP + SubVP DRR cases updates - Fix OPTC function pointers for DCN314 - Add enable/disable FIFO callbacks to stream setup - Avoid MPC infinite loop Acked-by:
Alex Hung <alex.hung@amd.com> Signed-off-by:
Anthony Koo <anthony.koo@amd.com> Tested-by:
Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by:
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Leo Li authored
[Why] crc_skip_count is used to track how many frames to skip to allow the OTG CRC engine to "warm up" before it outputs correct CRC values. Experimentally, this seems to be 2 frames. When duplicating CRTC states, this value was not copied to the duplicated state. Therefore, when this state is committed, we will needlessly wait 2 frames before outputing CRC values. Even if the CRC engine is already warmed up. [How] Copy the crc_skip_count as part of dm_crtc_duplicate_state. Acked-by:
Leo Li <sunpeng.li@amd.com> Tested-by:
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Alvin Lee authored
For optimizations and debug purposes we added an option to exit idle operations on cursor updates. Acked-by:
Alvin Lee <Alvin.Lee2@amd.com> Tested-by:
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Alvin Lee authored
Due to CRB, no need to rely on MPC splitting to maximize use of DET anymore. Reviewed-by:
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Samson Tam authored
Phantom pipes must use the same configuration used in main pipes. This commit add this check. Reviewed-by:
Samson Tam <Samson.Tam@amd.com> Tested-by:
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Alvin Lee authored
Update worst case SR latencies according to values measured by hardware team. Reviewed-by:
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Rodrigo Siqueira authored
In order to handle FPO correctly, we need to reinstate the dram values. This function adds the required code to handle the vblank stretch and the dram calculation. Acked-by:
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Aurabindo Pillai authored
[Why&How] Preparation to enable run time initialization of register offsets to add dc_context to the link_enc_create callback. This is needed to get the dc_ctx handle where register offset initialization routine is called. Reviewed-by:
Alan Liu <HaoPing.Liu@amd.com> Acked-by:
Aurabindo Pillai <aurabindo.pillai@amd.com> Tested-by:
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Chris Park authored
[Why] When Static screen from MALL, the cursor needs to be cached if cursor exceeds 64x64 size. [How] Program the bit that cache cursor in MALL when size of the cursor exceeds 64x64. Reviewed-by:
Jun Lei <Jun.Lei@amd.com> Acked-by:
Chris Park <chris.park@amd.com> Tested-by:
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Anthony Koo authored
- Add is_drr parameter to indicate DRR is enabled on the panel to determine whether SubVP MCLK switch logic should be enabled - Add DRR manual trigger in FW (instead of driver) because manual trigger programming triggers DRR update pending and can block SubVP MCLK switches from taking place Acked-by:
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Michael Strauss authored
[WHY] Currently programming incorrect hpo inst as well as selecting incorrect source [HOW] Use hpo inst instead of otg inst to select dpstreamclk inst Reviewed-by:
Nicholas Kazlauskas <Nicholas.Kazlauskas@amd.com> Acked-by:
Michael Strauss <michael.strauss@amd.com> Tested-by:
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Michael Strauss authored
[WHY] Needed to program audio dto Reviewed-by:
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Michael Strauss authored
[WHY] Required for correct OTG_H_TIMING_CNTL programming Reviewed-by:
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Michael Strauss authored
[WHY] Previously was pointing to DCN3 clock constructor rather than DCN31's Reviewed-by:
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Michael Strauss authored
[WHY] DP DTO isn't used for 128b/132b encoding [HOW] Check current link rate to determine whether using 8b/10b or 128/132b encoding Reviewed-by:
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Michael Strauss authored
[WHY/HOW] Need to calculate and set some pixel rate divisors on correct otg_inst Reviewed-by:
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Rodrigo Siqueira authored
At this stage, we must have all the FPU code for DCN30 isolated in the DML folder. Drop FPU flags from Makefile. Reviewed-by:
Harry Wentland <Harry.Wentland@amd.com> Acked-by:
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