When building a kernel for multiple CPU architecture levels,
cpu_do_idle() is a macro for an indirect function call, which
cannot be called from assembly code as Tegra does.

Adding a trivial C wrapper for this function lets us build
a tegra kernel with ARMv6 support enabled.
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Acked-by: Joseph Lo <josephl@nvidia.com>
Cc: Stephen Warren <swarren@nvidia.com>

The UART1 is on the fast AHB bridge, not on the slow bus.

Cc: stable@vger.kernel.org
Acked-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Olof Johansson <olof@lixom.net>

CONFIG_ARCH_OMAP2PLUS depends on (ARCH_MULTI_V6 || ARCH_MULTI_V7) as of
a0694861 "ARM: OMAP2+: Enable ARCH_MULTIPLATFORM support", but the
individual OMAP2/3/4/5 and AM33XX platforms can all be selected independent
of what we are building for, which is a bug and prevents us from easily
building e.g. an ARMv7-only defconfig.

This makes ARCH_OMAP2 depend on ARCH_MULTI_V6 and the others depend on
ARCH_MULTI_V7, to ensure we really only build the platforms for the
CPUs we have enabled in the global multiplatform configuration step.

Cc: Ezequiel Garcia <ezequiel.garcia@free-electrons.com>
Acked-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>

When building the kernel with CONFIG_THUMB2_KERNEL enabled, older
assemblers may emit the following error:

reset-handler.S:78: Error: invalid immediate for address calculation (value = 0x00000004)

Using an explicit adr.w instruction will solve this. Newer assemblers do
this automatically. Use the W() macro to do this under Thumb mode only.
Inspired-by: Joseph Lo <josephl@nvidia.com>
Suggested-by: Dave Martin <dave.martin@linaro.org>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Olof Johansson <olof@lixom.net>

The conditional branch instruction in Thumb2 only available to short range.
The linker will fail when the conditional branch over the range. Then
resulting in link error when generating kernel image. e.g.:

arch/arm/mach-tegra/reset-handler.S:47:(.text+0xf8e):
relocation truncated to fit: R_ARM_THM_JUMP19 against symbol
`cpu_resume' defined in .data section in arch/arm/kernel/built-in.o

This patch using a Thumb2 instruction IT (if-then) to have a longer branch
range.
Reported-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Joseph Lo <josephl@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Reviewed-by: Dave Martin <dave.martin@linaro.org>
Signed-off-by: Olof Johansson <olof@lixom.net>

This patch fix the build failure when CONFIG_THUBM2_KERNEL enabled. You
clould see the error message below:

arch/arm/mach-tegra/sleep-tegra30.S:69: Error: shift must be constant --
`orr r12,r12,r4,lsl r3'
Reported-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Joseph Lo <josephl@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Reviewed-by: Dave Martin <dave.martin@linaro.org>
Signed-off-by: Olof Johansson <olof@lixom.net>

Merge tag 'msm-fix-3.10' of git://git.kernel.org/pub/scm/linux/kernel/git/davidb/linux-msm into next/fixes-non-critical

From David Brown:
Some minor fixes for MSM for 3.10

  - Fix a timer problem that causes missed ticks and hangs.

  - Fix a problem with the decompressor UART dropping characters.

* tag 'msm-fix-3.10' of git://git.kernel.org/pub/scm/linux/kernel/git/davidb/linux-msm:
  ARM: msm: Fix uncompess.h tx underrun check
  ARM: msm: Stop counting before reprogramming clockevent
Signed-off-by: Olof Johansson <olof@lixom.net>

Bit 3 of the SR register is set if there is a tx underrun. If
this bit isn't set, we should loop on the tx ready bit until we
can transmit again. Otherwise we should skip the loop and
transmit immediately. The code is doing the opposite though,
checking for an underrun and then looping on the tx ready bit
causing us to never loop on the tx read bit when the tx buffer
may not be ready.

This doesn't seem to affect my 8960 device too often, but in some
cases I see a lost character or two from the decompressor prints.
This also matches what we do in the assembly in debug-macro.S.
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Signed-off-by: David Brown <davidb@codeaurora.org>

Merge tag 'imx-noncritical-fixes-3.10' of git://git.linaro.org/people/shawnguo/linux-2.6 into next/fixes-non-critical

From Shawn Guo:
The imx noncritical fixes for 3.10:

* A bunch of fixes for sparse warings
* One fix for the typo in use of Kconfig symbol
  MACH_EUKREA_CPUIMX27_USEUART4

* tag 'imx-noncritical-fixes-3.10' of git://git.linaro.org/people/shawnguo/linux-2.6:
  ARM: cpuimx27 and mbimx27: prepend CONFIG_ to Kconfig macro
  ARM: mach-imx: mach-imx6q: Fix sparse warnings
  ARM: mach-imx: src: Include "common.h
  ARM: mach-imx: gpc: Include "common.h"
  ARM: mach-imx: avic: Staticize *avic_base
  ARM: mach-imx: tzic: Staticize *tzic_base
  ARM: mach-imx: clk: Include "clk.h"
  ARM: mach-imx: clk-busy: Staticize clk_busy_mux_ops
  ARM: mach-imx: irq-common: Remove imx_irq_set_priority()
  ARM: mach-imx: clk-gate2: Include "clk.h"
  ARM: mach-imx: clk-pllv2: Staticize clk_pllv2_ops
  ARM: mach-imx: clk-pllv1: Staticize clk_pllv1_ops
  ARM: mach-imx: cpu-imx5: Include "common.h"
  ARM: mach-imx: iomux-imx31: Staticize mxc_pin_alloc_map
  ARM: mach-imx: mm-imx3: Staticize imx3_init_l2x0()
  ARM: mach-imx: cpu: Include "common.h"
Signed-off-by: Olof Johansson <olof@lixom.net>

The ARM perf core code used to rely on the pmu node being
compatible with "arm,cortex-a9-pmu", even when the PMUs
of the different Cortex-A processors are not really
compatible... This is no longer required and actually
became harmful, so remove all the offending values
from Versatile Express DTS files.
Signed-off-by: Pawel Moll <pawel.moll@arm.com>
Signed-off-by: Olof Johansson <olof@lixom.net>

Merge tag 'tegra-for-3.10-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/swarren/linux-tegra into next/fixes-non-critical

From Stephen Warren <swarren@wwwdotorg.org>:

ARM: tegra: minor fixes

This branch contains a variety of small build and run-time fixes that
weren't important enough for 3.9.

* Enable CPU errata WARs in secondary reset handler as a preparation
  for multi-platform support, and a related fix.
* Don't touch DBLGAR in reset/resume handlers, so enable the code to
  run on A15 cores.
* Minor build fixes.
* A fix to the Tegra clock driver.
* Some error-handling fixes.

This branch is based on the previous fixes-for-mmc pull request.

* tag 'tegra-for-3.10-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/swarren/linux-tegra:
  ARM: tegra: powergate: Don't error out if new state == old state
  ARM: tegra: Export tegra_powergate_sequence_power_up()
  memory: tegra30: Fix build error w/o PM
  ARM: tegra: fix ignored return value of regulator_enable
  ARM: tegra: fix the logical detection of power on sequence of warm boot CPUs
  ARM: tegra: Fix unchecked return value
  ARM: tegra: don't unlock MMIO access to DBGLAR
  clk: tegra: No 7.1 super clk dividers on Tegra20
  ARM: tegra: remove save/restore of CPU diag register
  ARM: tegra: add CPU errata WARs to Tegra reset handler
  ARM: dts: tegra: fix the activate polarity of cd-gpio in mmc host
Signed-off-by: Arnd Bergmann <arnd@arndb.de>

Merge tag 'omap-for-v3.10/fixes-non-critical-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into next/fixes-non-critical

From Tony Lindgren <tony@atomide.com>:

Non critical omap fixes for v3.10 merge window. A big chunk
of these fixes are needed to support omap5 es2 version that includes
PM features while the earlier version es1 did not.

* tag 'omap-for-v3.10/fixes-non-critical-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap:
  ARM: OMAP2+: fix typo "CONFIG_BRIDGE_DVFS"
  ARM: OMAP1: remove "config MACH_OMAP_HTCWIZARD"
  ARM: OMAP: dpll: enable bypass clock only when attempting dpll bypass
  ARM: OMAP2+: powerdomain: avoid testing whether an unsigned char is less than 0
  ARM: OMAP2+: hwmod: Remove unused _HWMOD_WAKEUP_ENABLED flag
  ARM: OMAP2+: am335x: Change the wdt1 func clk src to per_32k clk
  ARM: OMAP2+: AM33xx: hwmod: Add missing sysc definition to wdt1 entry

Contains an update to 3.9-rc5
Signed-off-by: Arnd Bergmann <arnd@arndb.de>

Commit 2d66c780 ("cpuimx27 and mbimx27:
allow fine control of UART4 and SDHC2 usage") added the Kconfig symbol
MACH_EUKREA_CPUIMX27_USEUART4. But it forgot to prepend CONFIG_ to the
use of its macro. Add that prefix now.
Signed-off-by: Paul Bolle <pebolle@tiscali.nl>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>

Merge tag 'v3.9-rc1_cns3xxx_fixes' of git://git.infradead.org/users/cbou/linux-cns3xxx into next/fixes-non-critical

From Anton Vorontsov <anton@enomsg.org>:

This tag includes Mac Lin's work to revive CNS3xxx booting:

 "Since commit 0536bdf3 (ARM: move iotable mappings within the vmalloc
 region), [...] the pre-defined iotable mappings is not in the vmalloc
 region. [...] move the iotable mappings into the vmalloc region, and
 merge the MPCore private memory region (containing the SCU, the GIC and
 the TWD) as a single region."

Plus there is a small cosmetic fix, also from Mac Lin.

* tag 'v3.9-rc1_cns3xxx_fixes' of git://git.infradead.org/users/cbou/linux-cns3xxx:
  ARM: cns3xxx: remove unused virtual address and iotable defines
  ARM: cns3xxx: fix mapping of private memory region
Signed-off-by: Arnd Bergmann <arnd@arndb.de>

Merge branch 'for_3.10/omap5_generic_updates' of git://git.kernel.org/pub/scm/linux/kernel/git/ssantosh/linux into omap-for-v3.10/fixes-non-critical

Merge tag 'omap-devel-b-for-3.10' of git://git.kernel.org/pub/scm/linux/kernel/git/pjw/omap-pending into omap-for-v3.10/fixes-non-critical

Some miscellaneous OMAP hwmod, powerdomain, and clock fixes for 3.10.

Basic test logs are here:

http://www.pwsan.com/omap/testlogs/prcm_fixes_a_3.10/20130331205716/

Commit 90173882 ("omap: add dsp platform
device") used CONFIG_BRIDGE_DVFS were it obviously meant
CONFIG_TIDSPBRIDGE_DVFS. Fix that.
Signed-off-by: Paul Bolle <pebolle@tiscali.nl>
Signed-off-by: Tony Lindgren <tony@atomide.com>

The Kconfig symbol MACH_OMAP_HTCWIZARD got added in v2.6.30. It has
never been used. Its entry can safely be removed.
Signed-off-by: Paul Bolle <pebolle@tiscali.nl>
Signed-off-by: Tony Lindgren <tony@atomide.com>

Fix the following sparse warnings:

arch/arm/mach-imx/mach-imx6q.c:60:6: warning: symbol 'imx6q_restart' was not declared. Should it be static?
arch/arm/mach-imx/mach-imx6q.c:223:24: warning: symbol 'imx6q_cpufreq_pdev' was not declared. Should it be static?
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>

Fix the following sparse warnings:

arch/arm/mach-imx/src.c:28:6: warning: symbol 'imx_enable_cpu' was not declared. Should it be static?
arch/arm/mach-imx/src.c:39:6: warning: symbol 'imx_set_cpu_jump' was not declared. Should it be static?
arch/arm/mach-imx/src.c:46:6: warning: symbol 'imx_src_prepare_restart' was not declared. Should it be static?
arch/arm/mach-imx/src.c:59:13: warning: symbol 'imx_src_init' was not declared. Should it be static?
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>

Fix the following sparse warnings:

arch/arm/mach-imx/gpc.c:29:6: warning: symbol 'imx_gpc_pre_suspend' was not declared. Should it be static?
arch/arm/mach-imx/gpc.c:43:6: warning: symbol 'imx_gpc_post_resume' was not declared. Should it be static?
arch/arm/mach-imx/gpc.c:71:6: warning: symbol 'imx_gpc_mask_all' was not declared. Should it be static?
arch/arm/mach-imx/gpc.c:83:6: warning: symbol 'imx_gpc_restore_all' was not declared. Should it be static?
arch/arm/mach-imx/gpc.c:122:13: warning: symbol 'imx_gpc_init' was not declared. Should it be static?
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>

Fix the following sparse warning:

arch/arm/mach-imx/avic.c:54:14: warning: symbol 'avic_base' was not declared. Should it be static?
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>

Fix the following sparse warning:

arch/arm/mach-imx/tzic.c:52:14: warning: symbol 'tzic_base' was not declared. Should it be static?

Also, remove the comment, as it does not apply for kernels newer than 3.2.
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>

Fix the following sparse warning:

arch/arm/mach-imx/clk.c:3:1: warning: symbol 'imx_ccm_lock' was not declared. Should it be static?
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>

Fix the following sparse warning:

arch/arm/mach-imx/clk-busy.c:150:16: warning: symbol 'clk_busy_mux_ops' was not declared. Should it be static?
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>

imx_irq_set_priority() is not used anywhere, so remove it.

This fixes the following sparse warnings:

arch/arm/mach-imx/irq-common.c:24:5: warning: symbol 'imx_irq_set_priority' was not declared. Should it be static?
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>

Fix the following sparse warning:

arch/arm/mach-imx/clk-gate2.c:86:12: warning: symbol 'clk_register_gate2' was not declared. Should it be static?
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>

Fix the following sparse warning:

rch/arm/mach-imx/clk-pllv2.c:232:16: warning: symbol 'clk_pllv2_ops' was not declared. Should it be static?
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>

Fix the following sparse warning:

arch/arm/mach-imx/clk-pllv1.c:81:16: warning: symbol 'clk_pllv1_ops' was not declared. Should it be static?
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>

Fix the following sparse warnings:

arch/arm/mach-imx/cpu-imx5.c:65:12: warning: symbol 'mx51_neon_fixup' was not declared. Should it be static?
arch/arm/mach-imx/cpu-imx5.c:99:5: warning: symbol 'mx53_revision' was not declared. Should it be static?
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>

Fix the following sparse warning:

arch/arm/mach-imx/iomux-imx31.c:43:15: warning: symbol 'mxc_pin_alloc_map' was not declared. Should it be static?
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>

Fix the following sparse warning:

arch/arm/mach-imx/mm-imx3.c:85:13: warning: symbol 'imx3_init_l2x0' was not declared. Should it be static?
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>

Fix the following sparse warnings:

arch/arm/mach-imx/cpu.c:10:6: warning: symbol 'mxc_set_cpu_type' was not declared. Should it be static?
arch/arm/mach-imx/cpu.c:15:6: warning: symbol 'imx_print_silicon_rev' was not declared. Should it be static?
arch/arm/mach-imx/cpu.c:24:13: warning: symbol 'imx_set_aips' was not declared. Should it be static?
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>

omap3_noncore_dpll_set_rate() attempts an enable of bypass clk as well
as ref clk for every .set_rate attempt on a noncore DPLL, regardless of
whether the .set_rate results in the DPLL being locked or put in bypass.
Early at boot, while some of these DPLLs are programmed and locked
(using .set_rate for the DPLL), this causes an ordering issue.

For instance, on OMAP5, the USB DPLL derives its bypass clk from ABE DPLL.
If a .set_rate of USB DPLL which programmes the M,N and locks it is called
before the one for ABE, the enable of USB bypass clk (derived from ABE DPLL)
then attempts to lock the ABE DPLL and fails as the M,N values for ABE
are yet to be programmed.

To get rid of this ordering needs, enable bypass clk for a DPLL as part
of its .set_rate only when its being put in bypass, and only enable the
ref clk when its locked.
Reported-by: Roger Quadros <rogerq@ti.com>
Signed-off-by: Rajendra Nayak <rnayak@ti.com>
Signed-off-by: Paul Walmsley <paul@pwsan.com>

_pwrdm_save_clkdm_state_and_activate() tried to test one of its
unsigned arguments to determine whether it was less than zero.  Fix by
moving the error test to the caller.
Reported-by: Chen Gang <gang.chen@asianux.com>
Signed-off-by: Paul Walmsley <paul@pwsan.com>

_HWMOD_WAKEUP_ENABLED is currently unused across the hwmod
framework. Just get rid of it, so we have one less flag to
worry about.
Tested-by: Vaibhav Bedia <vaibhav.bedia@ti.com>
Signed-off-by: Rajendra Nayak <rnayak@ti.com>
Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Signed-off-by: Paul Walmsley <paul@pwsan.com>

WDT1 module can take one of the below clocks as input functional
clock -
     - On-Chip 32K RC Osc [default/reset]
     - 32K from PRCM

The On-Chip 32K RC Osc clock is not an accurate clock-source as per
the design/spec, so as a result, for example, timer which supposed
to get expired @60Sec, but will expire somewhere ~@40Sec, which is
not expected by any use-case.

The solution here is to switch the input clock-source to PRCM
generated 32K clock-source during boot-time itself.
Signed-off-by: Vaibhav Hiremath <hvaibhav@ti.com>
Cc: Santosh Shilimkar <santosh.shilimkar@ti.com>
Cc: Benoit Cousson <benoit.cousson@linaro.org>
Cc: Paul Walmsley <paul@pwsan.com>

This patch adds sysc definitions to the wdt1 hwmod entry, which in-turn
makes sure that sysc idle bit-fields are configured to valid state on
enable/disable callbacks.

With the recent submitted patch from Santosh Shilimkar,
"ARM: OMAP2+: hwmod: Don't call _init_mpu_rt_base if no sysc"
(commit: 4a98c2d89), it is required to add sysconf
information to each valid hwmod entry, else device will not be
come out from idle state properly and leads to below kernel
crash  -

[2.190237] Unhandled fault: external abort on non-linefetch (0x1028) at
0xf9e35034
[2.198325] Internal error: : 1028 [#1] SMP ARM
[2.203101] Modules linked in:
[2.206334] CPU: 0    Not tainted  (3.9.0-rc3-00059-gd114294#1)
[2.212679] PC is at omap_wdt_disable.clone.5+0xc/0x60
[2.218090] LR is at omap_wdt_probe+0x184/0x1fc
Signed-off-by: Vaibhav Hiremath <hvaibhav@ti.com>
Cc: Santosh Shilimkar <santosh.shilimkar@ti.com>
Cc: Benoit Cousson <benoit.cousson@linaro.org>
Cc: Paul Walmsley <paul@pwsan.com>

Pull slave-dmaengine fixes from Vinod Koul:
 "Two fixes for slave-dmaengine.

  The first one is for making slave_id value correct for dw_dmac and
  the other one fixes the endieness in DT parsing"

* 'fixes' of git://git.infradead.org/users/vkoul/slave-dma:
  dw_dmac: adjust slave_id accordingly to request line base
  dmaengine: dw_dma: fix endianess for DT xlate function