- 26 Jan, 2022 3 commits
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Stanislav Lisovskiy authored
There might be various logical contructs when we might want to enable async flip, so lets calculate those and set this flag, so that there is no need in long conditions in other places. v2: - Set do_async_flip flag to False, if no async flip needed. Lets not rely that it will be 0-initialized, but set explicitly, so that the logic is clear as well. v3: - Clear do_async_flip in intel_plane_duplicate_state(Ville Syrjälä) - Check with do_async_flip also when calling intel_crtc_{enable,disable}_flip_done(Ville Syrjälä) Reviewed-by:Ville Syrjälä <ville.syrjala@linux.intel.com> Signed-off-by:
Stanislav Lisovskiy <stanislav.lisovskiy@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20220124090653.14547-3-stanislav.lisovskiy@intel.com
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Stanislav Lisovskiy authored
Sometimes we might need to change the way we calculate watermarks, based on which particular plane it is calculated for. Thus it would be convenient to pass plane struct to those functions. v2: Pass plane instead of plane_id v3: Do not pass plane to skl_cursor_allocation(Ville Syrjälä) v4: - Make intel_crtc_get_plane static again(Ville Syrjälä) - s/cursor_plane/plane(Ville Syrjälä) - Pass plane to skl_compute_wm_* instead of plane_id(Ville Syrjälä) Signed-off-by: -
Ville Syrjälä authored
Complete the ilk pch modeset abstraction by adding ilk_pch_pre_enable(). I did the disable vs. post_disable split already for the disable sequence, but the enable sequence was still left with the naked ilk_fdi_pll_enable() call for some reason. Signed-off-by:
Jani Nikula <jani.nikula@intel.com>
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- 25 Jan, 2022 1 commit
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Dan Carpenter authored
Smatch detected a divide by zero bug in check_overlay_scaling(). drivers/gpu/drm/i915/display/intel_overlay.c:976 check_overlay_scaling() error: potential divide by zero bug '/ rec->dst_height'. drivers/gpu/drm/i915/display/intel_overlay.c:980 check_overlay_scaling() error: potential divide by zero bug '/ rec->dst_width'. Prevent this by ensuring that the dst height and width are non-zero. Fixes: 02e792fb ("drm/i915: implement drmmode overlay support v4") Signed-off-by:Dan Carpenter <dan.carpenter@oracle.com> Signed-off-by:
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- 24 Jan, 2022 13 commits
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Jani Nikula authored
Prefer drm device based logging. Cc: Ville Syrjälä <ville.syrjala@linux.intel.com> Signed-off-by:
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Jani Nikula authored
Gather some intel_dump_cdclk_config() changes together to avoid extra churn: Rename to intel_cdclk_dump_config() to following naming conventions. Pass in i915. Use i915 for struct drm_device based logging. Switch to KMS drm debug class. Cc: Ville Syrjälä <ville.syrjala@linux.intel.com> Signed-off-by:
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Jani Nikula authored
Prefer drm device based logging. Do some related dev_priv->i915 and dp->intel_dp renames while at it. Cc: Ville Syrjälä <ville.syrjala@linux.intel.com> Signed-off-by:
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Jani Nikula authored
Prefer drm device based logging. Cc: Ville Syrjälä <ville.syrjala@linux.intel.com> Signed-off-by:
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Jani Nikula authored
Prefer drm device based logging and WARN. Cc: Ville Syrjälä <ville.syrjala@linux.intel.com> Signed-off-by:
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Jani Nikula authored
Prefer drm device based logging. Cc: Ville Syrjälä <ville.syrjala@linux.intel.com> Signed-off-by:
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Jani Nikula authored
Prefer drm device based logging. Cc: Ville Syrjälä <ville.syrjala@linux.intel.com> Signed-off-by:
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Jani Nikula authored
Prefer drm device based logging. Cc: Ville Syrjälä <ville.syrjala@linux.intel.com> Signed-off-by:
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Jani Nikula authored
Prefer drm device based logging. Do some dev_priv->i915 conversions while at it. Cc: Ville Syrjälä <ville.syrjala@linux.intel.com> Signed-off-by:
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Jani Nikula authored
In general, we should avoid redefining kernel macros like this. It can get confusing, and what gets used will depend on whether the header is included or not. Moreover, we should prefer drm_WARN_ON() and drm_WARN_ON_ONCE() anyway, which include the stringified error condition in the message. Signed-off-by:
Lucas De Marchi <lucas.demarchi@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20220121132957.3778555-1-jani.nikula@intel.com
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Ville Syrjälä authored
dg2_ddi_pre_enable_dp() has outlived its usefulness so eliminate it. The one thing that tgl_ddi_pre_enable_dp() is missing that we need is intel_ddi_config_transcoder_dp2(). So we'll bring that over. tgl_ddi_pre_enable_dp() does also have a few things that dg2_ddi_pre_enable_dp() didn't have: - icl_program_mg_dp_mode() -> nop due to intel_phy_is_tc()==false on DG2 - intel_ddi_power_up_lanes() -> nop due to intel_phy_is_combo()==false on DG2 - intel_ddi_mso_configure() -> only matters for MSO panels Another slight difference is that dg2_ddi_pre_enable_dp() was missing a bigjoiner check around intel_dsc_enable(), which tgl_ddi_pre_enable_dp() does have. Signed-off-by:
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Ville Syrjälä authored
Currently we just use all the hdmi_deep_color_possible() stuff to compute whether deep color is possible, and leave the 8bpc case to do its own thing. That doesn't mesh super well with 4:2:0 handling because we might end up going for 8bpc RGB without considering that it's essentially illegal and we could instead go for a legal 4:2:0 config. So let's run through all the clock checks even for 8bpc first. If we've fully exhausted all options only then do we re-run the computation for 8bpc while ignoring the downstream TMDS clock limits. This will guarantee that if there's a config that respects all limits we will find it, and if there is not we still allow the user to override the mode manually. Signed-off-by:
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Ville Syrjälä authored
Use REG_BIT() & co. for the pre-skl primary plane registers. Also give everything a consistent namespace. v2: s/DSP/DISP/ to avoid confusion (José) Use DISP_WIDTH rather than DISP_POS_X for DSPSIZE (José) Deal with gvt Cc: José Roberto de Souza <jose.souza@intel.com> Signed-off-by:José Roberto de Souza <jose.souza@intel.com>
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- 21 Jan, 2022 8 commits
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Jani Nikula authored
Seems odd that we clear all event status indicators if we've only handled some. Only clear the ones we've handled. v2: ack DOWN_REP and UP_REQ only if they were set in esi (Ville) Signed-off-by:
Uma Shankar <uma.shankar@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20220120110102.3116218-1-jani.nikula@intel.com
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Jani Nikula authored
Only specific event status indicators caused the link status to be acked. Be sure to ack the link status change event. Arguably we should track which bits to actually clear in ESI instead of the wholesale approach. Signed-off-by:
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Jani Nikula authored
The link service irq vector in DPCD 0x2005 contains the link status changed bit to indicate the status should be checked. Only read and check the link status when requested by the sink. This also reduces the confusion around the buffer size for the combined ESI and link status. Alas, we still need to take into account that all link status helpers expect a buffer of DP_LINK_STATUS_SIZE (6) while the link status in ESI only has 4 bytes. Signed-off-by:
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Jani Nikula authored
We'll want to expand on this, so abstract it to a separate function first. Improve debug logging while at it. Signed-off-by:
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Jani Nikula authored
For whatever reason, the ESI link service irq vector was missing from the debug output. Add the missing byte, clean up the debug message, and do the logging right after reading the data. Signed-off-by:
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Jani Nikula authored
Smaller functions make the thing easier to read. Debug log failures to ack. Note: Looks like we have the retry loop simply because of hysterical raisins, dating back to the original DP MST enabling. Keep it, though I have no idea why we have it. Signed-off-by:
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Jani Nikula authored
Remove extra indentation. Signed-off-by:
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Jani Nikula authored
Add new files i915_ioctl.[ch] to hold small ioctls that are out of place everywhere else, and not big enough to warrant a file of their own. For starters, it's just for i915_reg_read_ioctl() that's a bit high level for a low level implementation that intel_uncore.[ch] is. Suggested-by:
Tvrtko Ursulin <tvrtko.ursulin@linux.intel.com> Signed-off-by:
Tvrtko Ursulin <tvrtko.ursulin@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20220120113346.3214745-1-jani.nikula@intel.com
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- 20 Jan, 2022 2 commits
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Madhumitha Tolakanahalli Pradeep authored
Replace GEN<n> with DISPLAY_VER<n>, in line with the naming convention followed in the i915 driver code. Signed-off-by:
Madhumitha Tolakanahalli Pradeep <madhumitha.tolakanahalli.pradeep@intel.com> Reviewed-by:
Caz Yokoyama <caz.yokoyama@intel.com> Signed-off-by:
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Ville Syrjälä authored
Use REG_BIT() & co. to polish the vlv/chv sprite plane registers. Signed-off-by:
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- 19 Jan, 2022 8 commits
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Ville Syrjälä authored
Lots of machines these days seem to have a crappy type1 DP dual mode adaptor chip slapped onto the motherboard. Based on the DP dual mode spec we currently limit those to 165MHz max TMDS clock. Windows OTOH ignores DP dual mode adaptors when the VBT indicates that the port is not actually DP++, so we can perhaps assume that the vendors did intend that the 165MHz clock limit doesn't apply here. Though it would be much nicer if they actually declared an explicit limit through VBT, but that doesn't seem to be happening either. So in order to match Windows behaviour let's ignore the DP dual mode adaptor's TMDS clock limit for ports that don't look like DP++ in VBT. Unfortunately many older VBTs misdelcare their DP++ ports as just HDMI (eg. ILK Dell Latitude E5410) or DP (eg. SNB Lenovo ThinkPad X220). So we can't really do this universally without risking black screens. I suppose a sensible cutoff is HSW+ since that's when 4k became a thing and one might assume that the machines have been tested to work with higher TMDS clock rates. v2: s/IS_BROADWELL/IS_HASWELL/ Acked-by:
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Ville Syrjälä authored
Replace the DEVICE_TYPE_DP_DUAL_MODE_BITS stuff with just a DP+HDMI check. The rest of the bits shouldn't really matter anyway. The slight change in behaviour here is that now we do look at the DEVICE_TYPE_NOT_HDMI_OUTPUT bit (via intel_bios_encoder_supports_hdmi()) when we previously ignored it. The one platform we know that has problems with that bit is VLV. But IIRC the problem was always that buggy VBTs basically never set that bit. So that should be OK since all it would do is make all DVI ports look like HDMI ports instead. Also can't imagine there are many VLV machines with actual DVI ports in existence. We still keep the rest of the dvo_port/aux_ch checks as we can't trust that DP+HDMI device type equals DP++ due to buggy VBTs. Signed-off-by:
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Ville Syrjälä authored
Now that we parse the DDI port info from the VBT on all g4x+ platforms we can throw out all the old codepaths in intel_bios_is_port_present(), intel_bios_is_port_edp() and intel_bios_is_port_dp_dual_mode(). None of these should be called on pre-g4x platforms. For good measure throw in a WARN into intel_bios_is_port_present() should someone get the urge to call it on older platforms. The other two functions are specific to HDMI and DP so should not need any protection as those encoder types don't even exist on older platforms. Signed-off-by:
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Ville Syrjälä authored
Extend the vbt.ports[] stuff for all g4x+ platforms. We do need to drop the version check as some elk/ctg machines may have VBTs older than that. The oldest I know is an elk with version 142. But the child device stuff has had the correct size since at least version 125 (observed on my sdg), so from that angle this should be totally safe. This does couple of things: - Start using the aux_ch/ddc_pin from VBT instead of just the hardcoded defaults. Hopefully there are no VBTs with entirely bogus information here. - Start using i915->vbt.ports[] for intel_bios_is_port_dp_dual_mode(). Should be fine as the logic doesn't actually change. - Start using i915->vbt.ports[] for intel_bios_is_port_edp(). The old codepath only looks at the DP DVO ports, the new codepath looks at both DP and HDMI DVO ports. In principle that should not matter. We also stop looking at some of the other device type bits (eg. LVDS,MIPI,ANALOG,etc.). Hopefully no VBT is broken enough that it sets up totally conflicting device type bits (eg. LVDS+eDP at the same time). We also lose the "g4x->no eDP ever" hardcoding (shouldn't be hard to re-introduce that into eg. sanitize_device_type() if needed). Lightly smoke tested on a set of machines (one of ctg,ilk,snb,ivb each) with both DP and HDMI (DP++). Everything still worked as it should. Signed-off-by:
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Ville Syrjälä authored
CHV is currently straddling the divide by using parse_ddi_ports() stuff for aux_ch/ddc_pin but going through all old codepaths for the rest (intel_bios_is_port_present(), intel_bios_is_port_edp(), intel_bios_is_port_dp_dual_mode()). Let's switch over full and use i915->vbt.ports[] for the rest of the stuff. dvo_port_to_port() doesn't know about DSI so we won't get into any kind of "is port B HDMI or DSI or both?" conundrum, which could otherwise happen on VLV/CHV due to DSI ports living in a separate world from the other digital ports. Including Jani's detailed analysis here for posterity: "We stop checking for port A for CHV in intel_bios_is_port_present(), but it's a warn and I don't recall any bug reports, so probably fine. We could add a check in parse_ddi_port(), but meh. Ditto for intel_bios_is_port_dp_dual_mode(), except it doesn't have a warn. The eDP check in intel_bios_is_port_edp() becomes slightly more relaxed. Both the old and new check require these to be set: - DEVICE_TYPE_DISPLAYPORT_OUTPUT - DEVICE_TYPE_INTERNAL_CONNECTOR. The old code also required these to be unset: - DEVICE_TYPE_MIPI_OUTPUT - DEVICE_TYPE_COMPOSITE_OUTPUT - DEVICE_TYPE_DUAL_CHANNEL - DEVICE_TYPE_LVDS_SIGNALING - DEVICE_TYPE_TMDS_DVI_SIGNALING - DEVICE_TYPE_VIDEO_SIGNALING - DEVICE_TYPE_ANALOG_OUTPUT It's possible we've added these just as a sanity check for broken VBTs more than anything. I guess I'd see if actual problems arise. Bottom line, I think the functional changes matter only for VBTs with bogus data." I agree that it should work assuming the VBT isn't totally insane. Modern windows drivers also don't seem to check any of those additional device type bits, which may or may not matter for older devices (no idea what some old driver versions are checking). Signed-off-by:
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Ville Syrjälä authored
Pull the "do we want to use i915->vbt.ports[]?" check into a central place. Signed-off-by:
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Ville Syrjälä authored
This async flip vt-d w/a was moved to a different place in commit 7d396cac ("drm/i195: Make the async flip VT-d workaround dynamic") but the drm-intel-fixes cherry-pick commit b2d73deb ("drm/i915: Extend the async flip VT-d w/a to skl/bxt") resurrected the original code as well. So now we have this w/a in two places. Remove the resurrected zombie code. Not done as a revert to hopefully prevent any kind of automagic stable backport. Signed-off-by:
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Jani Nikula authored
Move struct intel_shared_dpll_funcs to intel_dpll_mgr.c, as no other place needs to have access to it. We also don't need to have kernel-doc documentation for file internal structures, so drop them while at it. Signed-off-by:
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- 18 Jan, 2022 5 commits
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Ville Syrjälä authored
There is no real point in having this two stage skl_program_plane*() vs. skl_plane_update*() wrapper stuff. All we need to do is determine the correct color plane and we're done. Signed-off-by:
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Ville Syrjälä authored
Add a few small helpers to calculate the color key register values. Cleans up skl_program_plane_arm() a bit. Signed-off-by:
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Ville Syrjälä authored
Extract the PLANE_AUX_DIST stuff into a small helper to dclutter skl_program_plane_arm() a bit. Signed-off-by:
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Ville Syrjälä authored
Use REG_BIT() & co. to polish the cursor plane registers. v2: deal with gvt Signed-off-by:
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Ville Syrjälä authored
Use REG_BIT() & co. to polish the g4x+ sprite plane registers. Signed-off-by:
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