- 25 Oct, 2019 35 commits
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Jun Lei authored
[why] SLT tests require that diag can drive eDP even if nothing is connected, this is not typical production use case, so we need to add flag [how] add flag, and this flag supercedes "should destroy" logic Signed-off-by:
Jun Lei <Jun.Lei@amd.com> Reviewed-by:
Aric Cyr <Aric.Cyr@amd.com> Acked-by:
Leo Li <sunpeng.li@amd.com> Signed-off-by:
Alex Deucher <alexander.deucher@amd.com>
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Dmytro Laktyushkin authored
Signed-off-by:
Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com> Reviewed-by:
Eric Bernstein <Eric.Bernstein@amd.com> Acked-by:
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Dmytro Laktyushkin authored
These are specific to dcn21 and should not be increased for reuse on other asics. Signed-off-by:
Chris Park <Chris.Park@amd.com> Acked-by:
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Yongqiang Sun authored
[Why & How] vm should be enabled by default for rn to get right dml. Signed-off-by:
Yongqiang Sun <yongqiang.sun@amd.com> Reviewed-by:
Tony Cheng <Tony.Cheng@amd.com> Acked-by:
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Aidan Yang authored
[why] There's a use case for inverted gamma and it's been confirmed that negative slopes are ok. [how] Remove code for blocking non-monotonically increasing gamma Signed-off-by:
Aidan Yang <Aidan.Yang@amd.com> Reviewed-by:
Krunoslav Kovac <Krunoslav.Kovac@amd.com> Acked-by:
Reza Amini <Reza.Amini@amd.com> Signed-off-by:
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Alvin Lee authored
[Why] NV12 has lower min dcfclk [How] Add update in update_bounding_box Signed-off-by:
Alvin Lee <alvin.lee2@amd.com> Reviewed-by:
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Paul Hsieh authored
[Why] On some systems, we need to check the dcn version in runtime system, not in compile time. [How] Stub in dcn version parameter to find_first_free_audio Signed-off-by:
Paul Hsieh <paul.hsieh@amd.com> Reviewed-by:
Charlene Liu <Charlene.Liu@amd.com> Acked-by:
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Michael Strauss authored
[WHY] DML is incorrectly initialized with 4 pipes on 3 pipe configs RequiredDPPCLK is halved on unsplit pipe due to an incorrectly handled 3 pipe case, causing underflow with 2 planes & pipe split (MPO, 8K + 2nd display) [HOW] Set correct number of DPP/OTGs for dml init to generate correct DPP topology Double RequiredDPPCLK after clock is halved for pipe split and find_secondary_pipe fails to fix underflow Signed-off-by:
Michael Strauss <michael.strauss@amd.com> Reviewed-by:
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Dmytro Laktyushkin authored
Signed-off-by:
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Dmytro Laktyushkin authored
This value will be needed by dml and therefore should be externally accessible. Signed-off-by:
Nevenko Stupar <Nevenko.Stupar@amd.com> Acked-by:
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Dmytro Laktyushkin authored
One of odm variables was not initialized in dml. Signed-off-by:
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Dmytro Laktyushkin authored
Split a large function into smaller, reusable chunks. Signed-off-by:
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Anthony Koo authored
[Why] In diags environment we are not programming the DPP DTO correctly. [How] Populate the dpp refclk in dccg so it can be used to correctly program DPP DTO. Signed-off-by:
Anthony Koo <Anthony.Koo@amd.com> Reviewed-by:
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Roman Li authored
[Why] PSR (Panel Self-Refresh) is a power-saving feature for eDP panels. The feature has support in DMCU (Display MicroController Unit). DMCU/driver communication is implemented in DC. DM can use existing DC PSR interface to use PSR feature. [How] - Read psr caps via dpcd - Send vsc infoframe if panel supports psr - Disable psr before h/w programming (FULL_UPDATE) - Enable psr after h/w programming - Disable psr for fb console Signed-off-by:
Roman Li <Roman.Li@amd.com> Reviewed-by:
Nicholas Kazlauskas <Nicholas.Kazlauskas@amd.com> Acked-by:
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Roman Li authored
[Why] For upcoming PSR stupport it's useful to have debug entry to verify psr state. [How] - Enable psr dc api for Linux - Add psr_state file to eDP connector debugfs usage e.g.: cat /sys/kernel/debug/dri/0/DP-1/psr_state Signed-off-by:
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Aric Cyr authored
Signed-off-by:
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Dmytro Laktyushkin authored
Commit hints are unnecessary after front end programming redesign. Signed-off-by:
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Jordan Lazare authored
[Why] For loop below the assert already checks for the number of instances to create. ASSERT is meaningless and causing spam. [How] dd Signed-off-by:
Jordan Lazare <Jordan.Lazare@amd.com> Reviewed-by:
Harry Wentland <Harry.Wentland@amd.com> Acked-by:
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Aidan Yang authored
[why] Optimized gamma22 assumes fixed point distribution which is not true for eetf true. [how] Use long calculation for eetf. Signed-off-by:
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Yongqiang Sun authored
[Why] System hang during S0i3 if DP only connected due to clk is disabled when doing link training. During S0i3, clk is disabled while the clk state is updated when ini_hw called, and at the moment clk is still disabled which indicating a wrong state for next time trying to enable clk. [How] Add an unknown state and initialize it during int_hw, make sure enable clk command be sent to smu. Signed-off-by:
Eric Yang <eric.yang2@amd.com> Acked-by:
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Jun Lei authored
[why] Hard to determine if pipe combine is done with MPC or ODM [how] Add new visual confirm type, this will mark each MPCC tree with a different color Signed-off-by:
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Jun Lei authored
Signed-off-by:
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Wayne Lin authored
[Why] While setting hdmi_vic, hv_frame.vic is not initialized and might assign a wrong value to hdmi_vic. Cause to send out VSIF with abnormal value. [How] Initialize hv_frame and avi_frame Signed-off-by:
Wayne Lin <Wayne.Lin@amd.com> Reviewed-by:
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Evan Quan authored
To fit the latest SMU firmware. Signed-off-by:
Evan Quan <evan.quan@amd.com> Reviewed-by:
Kenneth Feng <kenneth.feng@amd.com> Signed-off-by:
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Colin Ian King authored
There is a spelling mistake in a DRM_ERROR error message. Fix it. Signed-off-by:
Colin Ian King <colin.king@canonical.com> Signed-off-by:
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Nicholas Kazlauskas authored
[Why] We're leaking memory by not freeing the gamma used to calculate the transfer function for legacy gamma. [How] Release the gamma after we're done with it. Signed-off-by:
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Xiaojie Yuan authored
Signed-off-by:
Xiaojie Yuan <xiaojie.yuan@amd.com> Reviewed-by:
Feifei Xu <Feifei.Xu@amd.com> Signed-off-by:
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Xiaojie Yuan authored
Signed-off-by:
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Zhan liu authored
[Why] This patch is for fixing Navi14 HDMI display pink screen issue. [How] Call stream->link->link_enc->funcs->setup twice. This is setting the DIG_MODE to the correct value after having been overridden by the call to transmitter control. Signed-off-by:
Zhan Liu <zhan.liu@amd.com> Reviewed-by:
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Alex Deucher authored
To avoid walking past the end of the arrays since the PP_SMU defines don't match the renoir defines. Reviewed-by:
Prike Liang <Prike.Liang@amd.com> Signed-off-by:
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Pelloux-prayer, Pierre-eric authored
amdgpu_vm_prt_fini uses "vm->root.base.bo" so it must still be valid when we call it. Fixes: b65709a9 ("drm/amdgpu: reserve the root PD while freeing PASIDs") Signed-off-by:
Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com> Reviewed-by:
Christian König <christian.koenig@amd.com> Signed-off-by:
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Dan Carpenter authored
Smatch complains that we need to initialized "*cap" otherwise it can lead to an uninitialized variable bug in the caller. This seems like a reasonable warning and it doesn't hurt to silence it at least. drivers/gpu/drm/amd/amdgpu/vi.c:767 vi_asic_reset_method() error: uninitialized symbol 'baco_reset'. Fixes: 425db255 ("drm/amdgpu: expose BACO interfaces to upper level from PP") Signed-off-by:
Dan Carpenter <dan.carpenter@oracle.com> Signed-off-by:
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Alex Deucher authored
They are not used outside of the file they are defined in. Reviewed-by:
James Zhu <James.Zhu@amd.com> Acked-by:
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Alex Deucher authored
We need to allocate a large enough buffer for the feedback buffer, otherwise the IB test can overwrite other memory. Reviewed-by:
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chen gong authored
Add PSP TA firmware declaration for raven raven2 picasso Signed-off-by:
chen gong <curry.gong@amd.com> Reviewed-by:
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- 17 Oct, 2019 5 commits
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Kevin Wang authored
the trace event print string format error. (use integer type to handle string) before: amdgpu_test_kev-1556 [002] 138.508781: amdgpu_cs_ioctl: sched_job=8, timeline=gfx_0.0.0, context=177, seqno=1, ring_name=ffff94d01c207bf0, num_ibs=2 after: amdgpu_test_kev-1506 [004] 370.703783: amdgpu_cs_ioctl: sched_job=12, timeline=gfx_0.0.0, context=234, seqno=2, ring_name=gfx_0.0.0, num_ibs=1 change trace event list: 1.amdgpu_cs_ioctl 2.amdgpu_sched_run_job 3.amdgpu_ib_pipe_sync Signed-off-by:
Kevin Wang <kevin1.wang@amd.com> Reviewed-by:
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Tianci.Yin authored
add memory training implementation code to save resume time. Reviewed-by:
Luben Tuikov <luben.tuikov@amd.com> Signed-off-by:
Tianci.Yin <tianci.yin@amd.com> Signed-off-by:
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Tianci.Yin authored
memory training using specific fixed vram segment, reserve these segments before anyone may allocate it. Reviewed-by:
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Tianci.Yin authored
add interface for memory training. Reviewed-by:
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Tianci.Yin authored
parse firmware to get memory training capability and fb location. Reviewed-by:
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