- 10 Aug, 2021 6 commits
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Thomas Zimmermann authored
Drop the DRM IRQ midlayer in favor of Linux IRQ interfaces. DRM's IRQ helpers are mostly useful for UMS drivers. Modern KMS drivers don't benefit from using it. DRM IRQ callbacks are now being called directly or inlined. Signed-off-by:
Thomas Zimmermann <tzimmermann@suse.de> Acked-by:
Sam Ravnborg <sam@ravnborg.org> Link: https://patchwork.freedesktop.org/patch/msgid/20210803090704.32152-6-tzimmermann@suse.de
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Thomas Zimmermann authored
Drop the DRM IRQ midlayer in favor of Linux IRQ interfaces. DRM's IRQ helpers are mostly useful for UMS drivers. Modern KMS drivers don't benefit from using it. DRM IRQ callbacks are now being called directly or inlined. Signed-off-by:
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Thomas Zimmermann authored
Drop the DRM IRQ midlayer in favor of Linux IRQ interfaces. DRM's IRQ helpers are mostly useful for UMS drivers. Modern KMS drivers don't benefit from using it. DRM IRQ callbacks are now being called directly or inlined. v2: * use managed release via devm_request_irq() (Sam) * drop extra test for irq != IRQ_NOTCONNECTED (Sam) Signed-off-by:
Dan Sneddon <Dan.Sneddon@microchip.com> Link: https://patchwork.freedesktop.org/patch/msgid/20210803090704.32152-4-tzimmermann@suse.de
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Thomas Zimmermann authored
Drop the DRM IRQ midlayer in favor of Linux IRQ interfaces. DRM's IRQ helpers are mostly useful for UMS drivers. Modern KMS drivers don't benefit from using it. DRM IRQ callbacks are now being called directly or inlined. Calls to platform_get_irq() can fail with a negative errno code. Abort initialization in this case. The DRM IRQ midlayer does not handle this case correctly. v2: * name struct drm_device variables 'drm' (Sam) Signed-off-by:
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Thomas Zimmermann authored
Drop the DRM IRQ midlayer in favor of Linux IRQ interfaces. DRM's IRQ helpers are mostly useful for UMS drivers. Modern KMS drivers don't benefit from using it. DRM IRQ callbacks are now being called directly or inlined. The interrupt number returned by pci_msi_vector() is now stored in struct amdgpu_irq. Calls to pci_msi_vector() can fail and return a negative errno code. Abort initlaizaton in thi case. The DRM IRQ midlayer does not handle this correctly. Signed-off-by:
Alex Deucher <alexander.deucher@amd.com> Acked-by:
Christian König <christian.koenig@amd.com> Link: https://patchwork.freedesktop.org/patch/msgid/20210803090704.32152-2-tzimmermann@suse.de
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Gal Pressman authored
Fix a few typos in the documentation: - Remove an extraneous 'or' - 'unpins' -> 'unpin' - 'braket' -> 'bracket' - 'mappinsg' -> 'mappings' - 'fullfills' -> 'fulfills' Reviewed-by:
Randy Dunlap <rdunlap@infradead.org> Signed-off-by:
Gal Pressman <galpress@amazon.com> Signed-off-by:
Daniel Vetter <daniel.vetter@ffwll.ch> Link: https://patchwork.freedesktop.org/patch/msgid/20210809122247.15869-1-galpress@amazon.com
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- 09 Aug, 2021 6 commits
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Cai Huoqing authored
we counld use PFN_UP instead of vmw_num_pages() Signed-off-by:
Cai Huoqing <caihuoqing@baidu.com> Signed-off-by:
Zack Rusin <zackr@vmware.com> Link: https://patchwork.freedesktop.org/patch/msgid/20210802033552.990-1-caihuoqing@baidu.com
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Cai Huoqing authored
it's a refactor to make use of PFN_ALIGN/PFN_UP helper macro Signed-off-by:
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Desmond Cheong Zhi Xi authored
drm_file.master should be protected by either drm_device.master_mutex or drm_file.master_lookup_lock when being dereferenced. However, drm_master_get is called on unprotected file_priv->master pointers in vmw_surface_define_ioctl and vmw_gb_surface_define_internal. This is fixed by replacing drm_master_get with drm_file_get_master. Signed-off-by:
Desmond Cheong Zhi Xi <desmondcheongzx@gmail.com> Reviewed-by:
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Baokun Li authored
Using list_move_tail() instead of list_del() + list_add_tail() in vmwgfx_cmdbuf_res.c. Reported-by:
Hulk Robot <hulkci@huawei.com> Signed-off-by:
Baokun Li <libaokun1@huawei.com> Signed-off-by:
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Baokun Li authored
Using list_move_tail() instead of list_del() + list_add_tail() in vmwgfx_cmdbuf.c. Reported-by:
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Shaokun Zhang authored
Function 'vmw_context_binding_list' is declared twice, remove the repeated declaration. Cc: VMware Graphics <linux-graphics-maintainer@vmware.com> Cc: Roland Scheidegger <sroland@vmware.com> Cc: Zack Rusin <zackr@vmware.com> Signed-off-by:
Shaokun Zhang <zhangshaokun@hisilicon.com> Signed-off-by:
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- 08 Aug, 2021 24 commits
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Thomas Zimmermann authored
For framebuffers with non-zero offset fields, shadow-plane helpers provide a pointer to the first byte of the contained data. Use it in vkms. Also provide use the offset-adjusted data address for the writeback job's output buffers. Output framebuffers with non-zero offsets now have their content written to the correct location. Signed-off-by:
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Thomas Zimmermann authored
For framebuffers with non-zero offset fields, shadow-plane helpers provide a pointer to the first byte of the contained data. Use it in vbox. Signed-off-by:
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Thomas Zimmermann authored
For framebuffers with non-zero offset fields, shadow-plane helpers provide a pointer to the first byte of the contained data. Use it in udl. Signed-off-by:
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Thomas Zimmermann authored
For framebuffers with non-zero offset fields, shadow-plane helpers provide a pointer to the first byte of the contained data. Use it in simpledrm. Signed-off-by:
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Thomas Zimmermann authored
For framebuffers with non-zero offset fields, shadow-plane helpers provide a pointer to the first byte of the contained data. Use it in gm12u320. Signed-off-by:
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Thomas Zimmermann authored
For framebuffers with non-zero offset fields, shadow-plane helpers provide a pointer to the first byte of the contained data. Use it in cirrus. Signed-off-by:
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Thomas Zimmermann authored
For framebuffers with non-zero offset fields, shadow-plane helpers provide a pointer to the first byte of the contained data. Use it in mgag200. Signed-off-by:
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Thomas Zimmermann authored
For framebuffers with non-zero offset fields, shadow-plane helpers provide a pointer to the first byte of the contained data. Use it in hyperv. Signed-off-by:
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Thomas Zimmermann authored
Pass the data parameter to drm_gem_fb_vmap() to retrieve pointers to the data. This address is different from the mapping addresses for framebuffers with non-zero offsets. Replaces gud's internal computation. Signed-off-by:
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Thomas Zimmermann authored
For framebuffers with non-zero offset fields, shadow-plane helpers provide a pointer to the first byte of the contained data. Use it in ast. Signed-off-by:
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Thomas Zimmermann authored
Add an additional argument to drm_gem_fb_vmap() to return each BO's mapping adjusted by the respective offset. Update all callers. The newly returned values point to the first byite of the data stored in the framebuffer BOs. Drivers that access the BO data should use it. Signed-off-by:
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Thomas Zimmermann authored
PLL setup can fail if the display mode's clock is not supported by any PLL configuration. Compute the PLL values during atomic check, so that atomic commits can fail at the appropriate time. If successful, use the values in the atomic-update phase. Signed-off-by:
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Thomas Zimmermann authored
Inherit from struct drm_crtc_state by embeding it and providing the rsp callbacks for simple-kms helpers. No functional changes. The new state struct mgag200_crtc_state will hold PLL values for modeset operations. v2: * move the simple-kms changes into a separate patch (Sam) Signed-off-by:
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Thomas Zimmermann authored
Simple KMS helpers already support custom state for planes. Extend the helpers to support custom CRTC state as well. Drivers can set the reset, duplicate and destroy callbacks for the display pipeline's CRTC state and inherit from struct drm_crtc_state by embedding an instance. Signed-off-by:
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Thomas Zimmermann authored
Move all PLL compute and update functions into mgag200_pll.c. No functional changes to the rsp algorithms. Introduce struct mgag200_pll and mgag200_pll_funcs. The data strutures abstract the details of each revision's PLL. Perform calls to compute and update functionality via function pointers. Init the PLL once as part of the driver initialization. Signed-off-by:
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Thomas Zimmermann authored
Move the PLL constants to the RO data section by declaring them as static const. No functional changes. Signed-off-by:
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Thomas Zimmermann authored
The compute function for G200SE pixel PLLs handles two revisions with different algorithms. Split it accordingly to make it readable. No functional changes. Signed-off-by:
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Thomas Zimmermann authored
Several PLL functions compute values for different device types. Split them up to make the code more readable. No functional changes. Signed-off-by:
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Thomas Zimmermann authored
The fields in struct mgag200_pll_values currently hold the bits of each register. Store the PLL values instead and let the PLL-update code figure out the bits for each register. Until now, the compute function either stored plain values or register bits in struct mgag200_pll_values. The rsp update function used the values as-is. This made it very hard to correctly interpret the stored values (e.g., for logging or debugging). With the cleanup, the stored values now have a clear meaning. v2: * add a bit more context in the commit message (Sam) Signed-off-by:
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Thomas Zimmermann authored
The S parameter is controls the loop filter bandwidth when programming the PLL. It's currently stored as part of P (i.e., the clock divider.) Add a separate variable for S prepares the PLL code for further refactoring. The value of s is currently 0, so it has not yet an effect on the programming. v2: * add a note on the current value of s to commit message Signed-off-by:
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Thomas Zimmermann authored
The _set_plls() functions compute a pixel clock's PLL values and program the hardware accordingly. This happens during atomic commits. For atomic modesetting, it's better to separate computation and programming from each other. This will allow to compute the PLL value during atomic checks and catch unsupported modes early. Split the PLL setup into a compute and an update functions, and call them one after the other. Computed PLL values are store in struct mgag200_pll_values. There are four parameters for the PLL, m, n, p and s. Every compute function stores a value for each of these parameters, and the rsp update function makes the register bits from them. The values stored by the compute function are either plain values or register bits. An additional change is required to always store plain values. No functional changes. Signed-off-by:
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Thomas Zimmermann authored
Replace P_ARRAY_SIZE by array pre-initializing and ARRAY_SIZE(). No functional changes. Signed-off-by:
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Thomas Zimmermann authored
Return -EINVAL if there's no PLL configuration for the given pixel clock. The returned errors are currently ignored by the caller, but the errno codes will become useful when the compute functions run during atomic checks. v2: * give a rational for this change (Sam) Signed-off-by:
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Thomas Zimmermann authored
Put the clock-selection code into each of the PLL-update functions to make them select the correct pixel clock. Instead of copying the code, introduce a new helper WREG_MISC_MASKED, which does masked writes into <MISC>. Use it from each individual PLL update function. The pixel clock for video output was not actually set before programming the clock's values. It worked because the device had the correct clock pre-set. v2: * don't duplicate <MISC> update code (Sam) Signed-off-by:
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- 06 Aug, 2021 2 commits
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Xin Ji authored
IVO panel require less input video clock variation than video clock variation in DP CTS spec. This patch decreases the K value of ANX7625 which will shrink eDP Tx video clock variation to meet IVO panel's requirement. Acked-by:
Xin Ji <xji@analogixsemi.com> Signed-off-by:
Robert Foss <robert.foss@linaro.org> Link: https://patchwork.freedesktop.org/patch/msgid/20210806104407.2208538-1-xji@analogixsemi.com
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Robert Foss authored
The return value of drm_bridge_attach() is ignored during the it66121_bridge_attach() call, which is incorrect. Fixes: 988156dc ("drm: bridge: add it66121 driver") Signed-off-by:
Jernej Skrabec <jernej.skrabec@gmail.com> Link: https://patchwork.freedesktop.org/patch/msgid/20210805185039.402178-1-robert.foss@linaro.org Link: https://patchwork.freedesktop.org/patch/msgid/20210805185039.402178-1-robert.foss@linaro.org
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- 05 Aug, 2021 2 commits
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Søren Andersen authored
Add support for the LOGIC Technologies, Inc LTTD800480070-L6WH-RT Signed-off-by:
Søren Andersen <san@skov.dk> Signed-off-by:
Oleksij Rempel <o.rempel@pengutronix.de> Reviewed-by:
Ahmad Fatoum <a.fatoum@pengutronix.de> Signed-off-by:
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Sam Ravnborg authored
The Multi Innotechnology is a 10.1" 1280x800 panel. The datasheet did not specify specific values for sync, back, front porch. The values are a best guess based on values for similar panels. Signed-off-by:
Ulrich Ölmann <u.oelmann@pengutronix.de> Signed-off-by:
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