1. 08 Oct, 2018 22 commits
    • Al Viro's avatar
      net: sched: cls_u32: disallow linking to root hnode · 27594ec4
      Al Viro authored
      Operation makes no sense.  Nothing will actually break if we do so
      (depth limit in u32_classify() will prevent infinite loops), but
      according to maintainers it's best prohibited outright.
      
      NOTE: doing so guarantees that u32_destroy() will trigger the call
      of u32_destroy_hnode(); we might want to make that unconditional.
      
      Test:
      tc qdisc add dev eth0 ingress
      tc filter add dev eth0 parent ffff: protocol ip prio 100 u32 \
      link 800: offset at 0 mask 0f00 shift 6 plus 0 eat match ip protocol 6 ff
      should fail with
      Error: cls_u32: Not linking to root node
      Signed-off-by: default avatarAl Viro <viro@zeniv.linux.org.uk>
      Signed-off-by: default avatarJamal Hadi Salim <jhs@mojatatu.com>
      Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
      27594ec4
    • Al Viro's avatar
      net: sched: cls_u32: mark root hnode explicitly · b44ef845
      Al Viro authored
      ... and produce consistent error on attempt to delete such.
      Existing check in u32_delete() is inconsistent - after
      
      tc qdisc add dev eth0 ingress
      tc filter add dev eth0 parent ffff: protocol ip prio 100 handle 1: u32 \
      divisor 1
      tc filter add dev eth0 parent ffff: protocol ip prio 200 handle 2: u32 \
      divisor 1
      
      both
      
      tc filter delete dev eth0 parent ffff: protocol ip prio 100 handle 801: u32
      
      and
      
      tc filter delete dev eth0 parent ffff: protocol ip prio 100 handle 800: u32
      
      will fail (at least with refcounting fixes), but the former will complain
      about an attempt to remove a busy table, while the latter will recognize
      it as root and yield "Not allowed to delete root node" instead.
      
      The problem with the existing check is that several tcf_proto instances
      might share the same tp->data and handle-to-hnode lookup will be the same
      for all of them. So comparing an hnode to be deleted with tp->root won't
      catch the case when one tp is used to try deleting the root of another.
      Solution is trivial - mark the root hnodes explicitly upon allocation and
      check for that.
      Signed-off-by: default avatarAl Viro <viro@zeniv.linux.org.uk>
      Signed-off-by: default avatarJamal Hadi Salim <jhs@mojatatu.com>
      Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
      b44ef845
    • David S. Miller's avatar
      Merge branch 'net-phy-mscc-add-support-for-VSC8584-and-VSC8574-Microsemi-quad-port-PHYs' · 67db8c3e
      David S. Miller authored
      Quentin Schulz says:
      
      ====================
      net: phy: mscc: add support for VSC8584 and VSC8574 Microsemi quad-port PHYs
      
      RESEND: rebased on top of latest net-next and on top of latest version of
      "net: phy: mscc: various improvements to Microsemi PHY driver" patch
      series.
      
      Both PHYs are 4-port PHY that are 10/100/1000BASE-T, 100BASE-FX, 1000BASE-X
      and triple-speed copper SFP capable, can communicate with the MAC via
      SGMII, QSGMII or 1000BASE-X, supports downshifting and can set the blinking
      pattern of each of its 4 LEDs, supports SyncE as well as HP Auto-MDIX
      detection.
      
      VSC8574 supports WOL and VSC8584 supports hardware offloading of MACsec.
      
      This patch series add support for 10/100/1000BASE-T, SGMII/QSGMII link with
      the MAC, downshifting, HP Auto-MDIX detection and blinking pattern for
      their 4 LEDs.
      
      They have also an internal Intel 8051 microcontroller whose firmware needs
      to be patched when the PHY is reset. If the 8051's firmware has the
      expected CRC, its patching can be skipped. The microcontroller can be
      accessed from any port of the PHY, though the CRC function can only be done
      through the PHY that is the base PHY of the package (internal address 0)
      due to a limitation of the firmware.
      
      The GPIO register bank is a set of registers that are common to all PHYs in
      the package. So any modification in any register of this bank affects all
      PHYs of the package.
      
      If the PHYs haven't been reset before booting the Linux kernel and were
      configured to use interrupts for e.g. link status updates, it is required
      to clear the interrupts mask register of all PHYs before being able to use
      interrupts with any PHY. The first PHY of the package that will be init
      will take care of clearing all PHYs interrupts mask registers. Thus, we
      need to keep track of the init sequence in the package, if it's already
      been done or if it's to be done.
      
      Most of the init sequence of a PHY of the package is common to all PHYs in
      the package, thus we use the SMI broadcast feature which enables us to
      propagate a write in one register of one PHY to all PHYs in the same
      package.
      
      We also introduce a new development board called PCB120 which exists in
      variants for VSC8584 and VSC8574 (and that's the only difference to the
      best of my knowledge).
      
      I suggest patches 1 to 3 go through net tree and patches 4 and 5 go
      through MIPS tree. Patches going through net tree and those going through
      MIPS tree do not depend on one another.
      
      This patch series depends on this patch series:
      (https://lore.kernel.org/lkml/20181008100728.24959-1-quentin.schulz@bootlin.com/)
      ====================
      Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
      67db8c3e
    • Quentin Schulz's avatar
      net: phy: mscc: add support for VSC8574 PHY · 00d70d8e
      Quentin Schulz authored
      The VSC8574 PHY is a 4-ports PHY that is 10/100/1000BASE-T, 100BASE-FX,
      1000BASE-X and triple-speed copper SFP capable, can communicate with
      the MAC via SGMII, QSGMII or 1000BASE-X, supports WOL, downshifting and
      can set the blinking pattern of each of its 4 LEDs, supports SyncE as
      well as HP Auto-MDIX detection.
      
      This adds support for 10/100/1000BASE-T, SGMII/QSGMII link with the MAC,
      WOL, downshifting, HP Auto-MDIX detection and blinking pattern for its 4
      LEDs.
      
      The VSC8574 has also an internal Intel 8051 microcontroller whose
      firmware needs to be patched when the PHY is reset. If the 8051's
      firmware has the expected CRC, its patching can be skipped. The
      microcontroller can be accessed from any port of the PHY, though the CRC
      function can only be done through the PHY that is the base PHY of the
      package (internal address 0) due to a limitation of the firmware.
      
      The GPIO register bank is a set of registers that are common to all PHYs
      in the package. So any modification in any register of this bank affects
      all PHYs of the package.
      
      If the PHYs haven't been reset before booting the Linux kernel and were
      configured to use interrupts for e.g. link status updates, it is
      required to clear the interrupts mask register of all PHYs before being
      able to use interrupts with any PHY. The first PHY of the package that
      will be init will take care of clearing all PHYs interrupts mask
      registers. Thus, we need to keep track of the init sequence in the
      package, if it's already been done or if it's to be done.
      
      Most of the init sequence of a PHY of the package is common to all PHYs
      in the package, thus we use the SMI broadcast feature which enables us
      to propagate a write in one register of one PHY to all PHYs in the same
      package.
      Signed-off-by: default avatarQuentin Schulz <quentin.schulz@bootlin.com>
      Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
      00d70d8e
    • Quentin Schulz's avatar
      net: phy: mscc: add support for VSC8584 PHY · a5afc167
      Quentin Schulz authored
      The VSC8584 PHY is a 4-ports PHY that is 10/100/1000BASE-T, 100BASE-FX,
      1000BASE-X and triple-speed copper SFP capable, can communicate with the
      MAC via SGMII, QSGMII or 1000BASE-X, supports downshifting and can set
      the blinking pattern of each of its 4 LEDs, supports hardware offloading
      of MACsec and supports SyncE as well as HP Auto-MDIX detection.
      
      This adds support for 10/100/1000BASE-T, SGMII/QSGMII link with the MAC,
      downshifting, HP Auto-MDIX detection and blinking pattern for its 4
      LEDs.
      
      The VSC8584 has also an internal Intel 8051 microcontroller whose
      firmware needs to be patched when the PHY is reset. If the 8051's
      firmware has the expected CRC, its patching can be skipped. The
      microcontroller can be accessed from any port of the PHY, though the CRC
      function can only be done through the PHY that is the base PHY of the
      package (internal address 0) due to a limitation of the firmware.
      
      The GPIO register bank is a set of registers that are common to all PHYs
      in the package. So any modification in any register of this bank affects
      all PHYs of the package.
      
      If the PHYs haven't been reset before booting the Linux kernel and were
      configured to use interrupts for e.g. link status updates, it is
      required to clear the interrupts mask register of all PHYs before being
      able to use interrupts with any PHY. The first PHY of the package that
      will be init will take care of clearing all PHYs interrupts mask
      registers. Thus, we need to keep track of the init sequence in the
      package, if it's already been done or if it's to be done.
      
      Most of the init sequence of a PHY of the package is common to all PHYs
      in the package, thus we use the SMI broadcast feature which enables us
      to propagate a write in one register of one PHY to all PHYs in the same
      package.
      
      The revA of the VSC8584 PHY (which is not and will not be publicly
      released) should NOT patch the firmware of the microcontroller or it'll
      make things worse, the easiest way is just to not support it.
      Signed-off-by: default avatarQuentin Schulz <quentin.schulz@bootlin.com>
      Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
      a5afc167
    • Quentin Schulz's avatar
      dt-bindings: net: vsc8531: add two additional LED modes for VSC8584 · 9494a6c2
      Quentin Schulz authored
      The VSC8584 (and most likely other PHYs in the same generation) has two
      additional LED modes that can be picked, so let's add them.
      Reviewed-by: default avatarRob Herring <robh@kernel.org>
      Reviewed-by: default avatarFlorian Fainelli <f.fainelli@gmail.com>
      Reviewed-by: default avatarAndrew Lunn <andrew@lunn.ch>
      Signed-off-by: default avatarQuentin Schulz <quentin.schulz@bootlin.com>
      Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
      9494a6c2
    • David S. Miller's avatar
      Merge branch 'net-phy-mscc-various-improvements-to-Microsemi-PHY-driver' · 26faf0e7
      David S. Miller authored
      Quentin Schulz says:
      
      ====================
      net: phy: mscc: various improvements to Microsemi PHY driver
      
      The Microsemi PHYs have multiple banks of registers (called pages).
      Registers can only be accessed from one page, if we need a register from
      another page, we need to switch the page and the registers of all other
      pages are not accessible anymore.
      
      Basically, to read register 5 from page 0, 1, 2, etc., you do the same
      phy_read(phydev, 5); but you need to set the desired page beforehand.
      
      In order to guarantee that two concurrent functions do not change the
      page, we need to do some locking per page. This can be achieved with the
      use of phy_select_page and phy_restore_page functions but phy_write/read
      calls in-between those two functions shall be replaced by their
      lock-free alternative __phy_write/read.
      
      The Microsemi PHYs have several counters so let's make them available as PHY
      statistics.
      
      The VSC 8530/31/40/41 also need to update their EEE init sequence in order to
      avoid packet losses and improve performance.
      
      This patch series also makes some minor cosmetic changes to the driver.
      
      v3:
        - add reviewed-by,
        - use phy_read/write/modify_paged whenever possible instead of the
        combo phy_select_page, __phy_read/write/modify, phy_restore_page when
        only one __phy_read/write/modify was executed,
      
      v2:
        - add patch to migrate MSCC driver to use phy_restore/select_page,
        - migrate all patches from v1 to use those two functions,
        - put the multiple lines of constants writes in an array and iterate over
        it to write the values,
        - add reviewed-bys,
      ====================
      Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
      26faf0e7
    • Quentin Schulz's avatar
      net: phy: mscc: remove unneeded temporary variable · 629ea0f1
      Quentin Schulz authored
      Here, the rc variable is either used only for the condition right after
      the assignment or right before being used as the return value of the
      function it's being used in.
      
      So let's remove this unneeded temporary variable whenever possible.
      Reviewed-by: default avatarFlorian Fainelli <f.fainelli@gmail.com>
      Reviewed-by: default avatarAndrew Lunn <andrew@lunn.ch>
      Signed-off-by: default avatarQuentin Schulz <quentin.schulz@bootlin.com>
      Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
      629ea0f1
    • Quentin Schulz's avatar
      net: phy: mscc: shorten `x != 0` condition to `x` · 6f0430c7
      Quentin Schulz authored
      `if (x != 0)` is basically a more verbose version of `if (x)` so let's
      use the latter so it's consistent throughout the whole driver.
      Reviewed-by: default avatarFlorian Fainelli <f.fainelli@gmail.com>
      Reviewed-by: default avatarAndrew Lunn <andrew@lunn.ch>
      Signed-off-by: default avatarQuentin Schulz <quentin.schulz@bootlin.com>
      Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
      6f0430c7
    • Quentin Schulz's avatar
      net: phy: mscc: remove unneeded parenthesis · b7d373c5
      Quentin Schulz authored
      The == operator precedes the || operator, so we can remove the
      parenthesis around (a == b) || (c == d).
      
      The condition is rather explicit and short so removing the parenthesis
      definitely does not make it harder to read.
      Reviewed-by: default avatarFlorian Fainelli <f.fainelli@gmail.com>
      Reviewed-by: default avatarAndrew Lunn <andrew@lunn.ch>
      Signed-off-by: default avatarQuentin Schulz <quentin.schulz@bootlin.com>
      Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
      b7d373c5
    • Raju Lakkaraju's avatar
      net: phy: mscc: Add EEE init sequence · 96dae01f
      Raju Lakkaraju authored
      Microsemi PHYs (VSC 8530/31/40/41) need to update the Energy Efficient
      Ethernet initialization sequence.
      In order to avoid certain link state errors that could result in link
      drops and packet loss, the physical coding sublayer (PCS) must be
      updated with settings related to EEE in order to improve performance.
      Reviewed-by: default avatarFlorian Fainelli <f.fainelli@gmail.com>
      Signed-off-by: default avatarRaju Lakkaraju <Raju.Lakkaraju@microchip.com>
      Signed-off-by: default avatarQuentin Schulz <quentin.schulz@bootlin.com>
      Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
      96dae01f
    • Raju Lakkaraju's avatar
      net: phy: mscc: add ethtool statistics counters · f76178dc
      Raju Lakkaraju authored
      There are a few counters available in the PHY: receive errors, false
      carriers, link disconnects, media CRC errors and valids counters.
      
      So let's expose those in the PHY driver.
      
      Use the priv structure as the next PHY to be supported has a few
      additional counters.
      Reviewed-by: default avatarAndrew Lunn <andrew@lunn.ch>
      Signed-off-by: default avatarRaju Lakkaraju <Raju.Lakkaraju@microsemi.com>
      Signed-off-by: default avatarQuentin Schulz <quentin.schulz@bootlin.com>
      Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
      f76178dc
    • Quentin Schulz's avatar
      net: phy: mscc: migrate to phy_select/restore_page functions · 6a0bfbbe
      Quentin Schulz authored
      The Microsemi PHYs have multiple banks of registers (called pages).
      Registers can only be accessed from one page, if we need a register from
      another page, we need to switch the page and the registers of all other
      pages are not accessible anymore.
      
      Basically, to read register 5 from page 0, 1, 2, etc., you do the same
      phy_read(phydev, 5); but you need to set the desired page beforehand.
      
      In order to guarantee that two concurrent functions do not change the
      page, we need to do some locking per page. This can be achieved with the
      use of phy_select_page and phy_restore_page functions but phy_write/read
      calls in-between those two functions shall be replaced by their
      lock-free alternative __phy_write/read.
      
      Let's migrate this driver to those functions.
      Suggested-by: default avatarAndrew Lunn <andrew@lunn.ch>
      Signed-off-by: default avatarQuentin Schulz <quentin.schulz@bootlin.com>
      Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
      6a0bfbbe
    • Yangbo Lu's avatar
      net: dpaa2: fix and improve dpaa2-ptp driver · 590ac2ff
      Yangbo Lu authored
      This patch is to fix and improve dpaa2-ptp driver
      in some places.
      
      - Fixed the return for some functions.
      - Replaced kzalloc with devm_kzalloc.
      - Removed dev_set_drvdata(dev, NULL).
      - Made ptp_dpaa2_caps const.
      Signed-off-by: default avatarYangbo Lu <yangbo.lu@nxp.com>
      Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
      590ac2ff
    • Yangbo Lu's avatar
      net: dpaa2: remove unused code for dprtc · 15b49f36
      Yangbo Lu authored
      This patch is to removed unused code for dprtc.
      This code will be re-added along with more features
      of dpaa2-ptp added.
      Signed-off-by: default avatarYangbo Lu <yangbo.lu@nxp.com>
      Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
      15b49f36
    • Yangbo Lu's avatar
      net: dpaa2: rename rtc as ptp in dpaa2-ptp driver · 180f539d
      Yangbo Lu authored
      In dpaa2-ptp driver, it's odd to use rtc in names of
      some functions and structures except these dprtc APIs.
      This patch is to use ptp instead of rtc in names.
      Signed-off-by: default avatarYangbo Lu <yangbo.lu@nxp.com>
      Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
      180f539d
    • Yangbo Lu's avatar
      net: dpaa2: fix dependency of config FSL_DPAA2_ETH · 58b1e729
      Yangbo Lu authored
      The NETDEVICES dependency and ETHERNET dependency hadn't
      been required since dpaa2-eth was moved out of staging.
      Also allowed COMPILE_TEST for dpaa2-eth.
      Signed-off-by: default avatarYangbo Lu <yangbo.lu@nxp.com>
      Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
      58b1e729
    • Yangbo Lu's avatar
      MAINTAINERS: update files maintained under DPAA2 PTP/ETHERNET · 82beb598
      Yangbo Lu authored
      The files maintained under DPAA2 PTP/ETHERNET needs to
      be updated since dpaa2 ptp driver had been moved into
      drivers/net/ethernet/freescale/dpaa2/.
      Signed-off-by: default avatarYangbo Lu <yangbo.lu@nxp.com>
      Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
      82beb598
    • Yangbo Lu's avatar
      net: dpaa2: move DPAA2 PTP driver out of staging/ · 0a006a2f
      Yangbo Lu authored
      This patch is to move DPAA2 PTP driver out of staging/
      since the dpaa2-eth had been moved out.
      Signed-off-by: default avatarYangbo Lu <yangbo.lu@nxp.com>
      Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
      0a006a2f
    • Tonghao Zhang's avatar
      abf1a08f
    • Leslie Monis's avatar
      net: sched: pie: fix coding style issues · ac4a02c5
      Leslie Monis authored
      Fix 5 warnings and 14 checks issued by checkpatch.pl:
      
      CHECK: Logical continuations should be on the previous line
      +	if ((q->vars.qdelay < q->params.target / 2)
      +	    && (q->vars.prob < MAX_PROB / 5))
      
      WARNING: line over 80 characters
      +		q->params.tupdate = usecs_to_jiffies(nla_get_u32(tb[TCA_PIE_TUPDATE]));
      
      CHECK: Blank lines aren't necessary after an open brace '{'
      +{
      +
      
      CHECK: braces {} should be used on all arms of this statement
      +			if (qlen < QUEUE_THRESHOLD)
      [...]
      +			else {
      [...]
      
      CHECK: Unbalanced braces around else statement
      +			else {
      
      CHECK: No space is necessary after a cast
      +	if (delta > (s32) (MAX_PROB / (100 / 2)) &&
      
      CHECK: Unnecessary parentheses around 'qdelay == 0'
      +	if ((qdelay == 0) && (qdelay_old == 0) && update_prob)
      
      CHECK: Unnecessary parentheses around 'qdelay_old == 0'
      +	if ((qdelay == 0) && (qdelay_old == 0) && update_prob)
      
      CHECK: Unnecessary parentheses around 'q->vars.prob == 0'
      +	if ((q->vars.qdelay < q->params.target / 2) &&
      +	    (q->vars.qdelay_old < q->params.target / 2) &&
      +	    (q->vars.prob == 0) &&
      +	    (q->vars.avg_dq_rate > 0))
      
      CHECK: Unnecessary parentheses around 'q->vars.avg_dq_rate > 0'
      +	if ((q->vars.qdelay < q->params.target / 2) &&
      +	    (q->vars.qdelay_old < q->params.target / 2) &&
      +	    (q->vars.prob == 0) &&
      +	    (q->vars.avg_dq_rate > 0))
      
      CHECK: Blank lines aren't necessary before a close brace '}'
      +
      +}
      
      CHECK: Comparison to NULL could be written "!opts"
      +	if (opts == NULL)
      
      CHECK: No space is necessary after a cast
      +			((u32) PSCHED_TICKS2NS(q->params.target)) /
      
      WARNING: line over 80 characters
      +	    nla_put_u32(skb, TCA_PIE_TUPDATE, jiffies_to_usecs(q->params.tupdate)) ||
      
      CHECK: Blank lines aren't necessary before a close brace '}'
      +
      +}
      
      CHECK: No space is necessary after a cast
      +		.delay		= ((u32) PSCHED_TICKS2NS(q->vars.qdelay)) /
      
      WARNING: Missing a blank line after declarations
      +	struct sk_buff *skb;
      +	skb = qdisc_dequeue_head(sch);
      
      WARNING: Missing a blank line after declarations
      +	struct pie_sched_data *q = qdisc_priv(sch);
      +	qdisc_reset_queue(sch);
      
      WARNING: Missing a blank line after declarations
      +	struct pie_sched_data *q = qdisc_priv(sch);
      +	q->params.tupdate = 0;
      Signed-off-by: default avatarLeslie Monis <lesliemonis@gmail.com>
      Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
      ac4a02c5
    • Gustavo A. R. Silva's avatar
      bnxt_en: Remove unnecessary unsigned integer comparison and initialize variable · 5fc7c12f
      Gustavo A. R. Silva authored
      There is no need to compare *val.vu32* with < 0 because
      such variable is of type u32 (32 bits, unsigned), making it
      impossible to hold a negative value. Fix this by removing
      such comparison.
      
      Also, initialize variable *max_val* to -1, just in case
      it is not initialized to either BNXT_MSIX_VEC_MAX or
      BNXT_MSIX_VEC_MIN_MAX before using it in a comparison
      with val.vu32 at line 159:
      
      	if (val.vu32 > max_val)
      
      Addresses-Coverity-ID: 1473915 ("Unsigned compared against 0")
      Addresses-Coverity-ID: 1473920 ("Uninitialized scalar variable")
      Signed-off-by: default avatarGustavo A. R. Silva <gustavo@embeddedor.com>
      Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
      5fc7c12f
  2. 07 Oct, 2018 1 commit
    • David S. Miller's avatar
      Merge tag 'wireless-drivers-next-for-davem-2018-10-07' of... · 5057ef7f
      David S. Miller authored
      Merge tag 'wireless-drivers-next-for-davem-2018-10-07' of git://git.kernel.org/pub/scm/linux/kernel/git/kvalo/wireless-drivers-next
      
      Kalle Valo says:
      
      ====================
      wireless-drivers-next patches for 4.20
      
      Second set of patches for 4.20. Heavy refactoring on mt76 continues
      and the usual drivers in active development (iwlwifi, qtnfmac, ath10k)
      getting new features. And as always, fixes and cleanup all over.
      
      Major changes:
      
      mt76
      
      * more major refactoring to make it easier add new hardware support
      
      * more work on mt76x0e support
      
      * support for getting firmware version via ethtool
      
      * add mt7650 PCI ID
      
      iwlwifi
      
      * HE radiotap cleanup and improvements
      
      * reorder channel optimization for scans
      
      * bump the FW API version
      
      qtnfmac
      
      * fixes for 'iw' output: rates for enabled SGI, 'dump station'
      
      * expose more scan features to host: scan flush and dwell time
      
      * inform cfg80211 when OBSS is not supported by firmware
      
      wlcore
      
      * add support for optional wakeirq
      
      ath10k
      
      * retrieve MAC address from system firmware if provided
      
      * support extended board data download for dual-band QCA9984
      
      * extended per sta tx statistics support via debugfs
      
      * average ack rssi support for data frames
      
      * speed up QCA6174 and QCA9377 firmware download using diag Copy
        Engine
      
      * HTT High Latency mode support needed by SDIO and USB support
      
      * get STA power save state via debugfs
      
      ath9k
      
      * add reset functionality for airtime station debugfs file
      ====================
      Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
      5057ef7f
  3. 06 Oct, 2018 17 commits