- 06 Feb, 2024 9 commits
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Nishanth Menon authored
Modify license to include dual licensing as GPL-2.0-only OR MIT license for SoC and TI evm device tree files. This allows for Linux kernel device tree to be used in other Operating System ecosystems such as Zephyr or FreeBSD. While at this, update the GPL-2.0 to be GPL-2.0-only to be in sync with latest SPDX conventions (GPL-2.0 is deprecated). While at this, update the TI copyright year to sync with current year to indicate license change (and add it at least for one file which was missing TI copyright). Cc: "Alexander A. Klimov" <grandmaster@al2klimov.de> Cc: Jan Kiszka <jan.kiszka@siemens.com> Cc: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Cc: Matthias Schiffer <matthias.schiffer@ew.tq-group.com> Cc: Pierre Gondois <pierre.gondois@arm.com> Cc: Rob Herring <robh@kernel.org> Cc: Tomi Valkeinen <tomi.valkeinen@ideasonboard.com> Cc: Tony Lindgren <tony@atomide.com> Acked-by:
Jan Kiszka <jan.kiszka@siemens.com> Acked-by:
Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Acked-by:
Matthias Schiffer <matthias.schiffer@ew.tq-group.com> Acked-by:
Pierre Gondois <pierre.gondois@arm.com> Acked-by:
Tomi Valkeinen <tomi.valkeinen@ideasonboard.com> Acked-by:
Tony Lindgren <tony@atomide.com> Signed-off-by:
Nishanth Menon <nm@ti.com> Acked-by:
Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20240122145539.194512-7-nm@ti.comSigned-off-by:
Vignesh Raghavendra <vigneshr@ti.com>
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Nishanth Menon authored
Modify license to include dual licensing as GPL-2.0-only OR MIT license for SoC and TI evm device tree files. This allows for Linux kernel device tree to be used in other Operating System ecosystems such as Zephyr or FreeBSD. While at this, update the GPL-2.0 to be GPL-2.0-only to be in sync with latest SPDX conventions (GPL-2.0 is deprecated). While at this, update the TI copyright year to sync with current year to indicate license change (and add it at least for one file which was missing TI copyright). Cc: Christian Gmeiner <christian.gmeiner@gmail.com> Cc: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Cc: Matthias Schiffer <matthias.schiffer@ew.tq-group.com> Cc: Pierre Gondois <pierre.gondois@arm.com> Cc: Roger Quadros <rogerq@kernel.org> Cc: Tony Lindgren <tony@atomide.com> Cc: Wadim Egorov <w.egorov@phytec.de> Acked-by:
Christian Gmeiner <christian.gmeiner@gmail.com> Acked-by:
Roger Quadros <rogerq@kernel.org> Acked-by:
Wadim Egorov <w.egorov@phytec.de> Signed-off-by:
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Nishanth Menon authored
Modify license to include dual licensing as GPL-2.0-only OR MIT license for SoC and TI evm device tree files. This allows for Linux kernel device tree to be used in other Operating System ecosystems such as Zephyr or FreeBSD. While at this, update the GPL-2.0 to be GPL-2.0-only to be in sync with latest SPDX conventions (GPL-2.0 is deprecated). While at this, update the TI copyright year to sync with current year to indicate license change (and add it at least for one file which was missing TI copyright). Acked-by:
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Nishanth Menon authored
Modify license to include dual licensing as GPL-2.0-only OR MIT license for SoC and TI evm device tree files. This allows for Linux kernel device tree to be used in other Operating System ecosystems such as Zephyr or FreeBSD. While at this, update the GPL-2.0 to be GPL-2.0-only to be in sync with latest SPDX conventions (GPL-2.0 is deprecated). While at this, update the TI copyright year to sync with current year to indicate license change (and add it at least for one file which was missing TI copyright). Cc: Guillaume La Roque <glaroque@baylibre.com> Cc: Julien Panis <jpanis@baylibre.com> Cc: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Cc: Pierre Gondois <pierre.gondois@arm.com> Cc: Roger Quadros <rogerq@kernel.org> Cc: Ronald Wahl <ronald.wahl@raritan.com> Cc: Sarah Walker <sarah.walker@imgtec.com> Cc: Tony Lindgren <tony@atomide.com> Acked-by:
Guillaume La Roque <glaroque@baylibre.com> Acked-by:
Julien Panis <jpanis@baylibre.com> Acked-by:
Ronald Wahl <ronald.wahl@raritan.com> Acked-by:
Sarah Walker <sarah.walker@imgtec.com> Acked-by:
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Nishanth Menon authored
Modify license to include dual licensing as GPL-2.0-only OR MIT license for SoC and TI evm device tree files. This allows for Linux kernel device tree to be used in other Operating System ecosystems such as Zephyr or FreeBSD. While at this, update the GPL-2.0 to be GPL-2.0-only to be in sync with latest SPDX conventions (GPL-2.0 is deprecated). While at this, update the TI copyright year to sync with current year to indicate license change (and add it at least for one file which was missing TI copyright). Cc: Julien Panis <jpanis@baylibre.com> Cc: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Cc: Pierre Gondois <pierre.gondois@arm.com> Cc: Tony Lindgren <tony@atomide.com> Acked-by:
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Nishanth Menon authored
Replace the pending http:// urls with https Signed-off-by:
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Thomas Richard authored
For suspend to ram on j7200, use ti,j7200-padconf compatible to save and restore pinctrl contexts. Signed-off-by:
Thomas Richard <thomas.richard@bootlin.com> Reviewed-by:
Linus Walleij <linus.walleij@linaro.org> Reviewed-by:
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Vaishnav Achath authored
K3 Remoteproc R5 driver requires reserved memory carveouts and mailbox configuration to instantiate the cores successfully. Since this is a board level dependency, keep the R5 subsytem disabled at SoC dtsi, otherwise it results in probe errors like below during AM62P SK boot: r5fss@79000000: reserved memory init failed, ret = -22 r5fss@79000000: k3_r5_cluster_rproc_init failed, ret = -22 r5fss@78000000: reserved memory init failed, ret = -22 r5fss@78000000: k3_r5_cluster_rproc_init failed, ret = -22 Fixes: b5080c7c ("arm64: dts: ti: k3-am62p: Add nodes for more IPs") Signed-off-by:
Vaishnav Achath <vaishnav.a@ti.com> Reviewed-by:
Jayesh Choudhary <j-choudhary@ti.com> Reviewed-by:
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Jayesh Choudhary authored
VP2 and VP3 are unused video ports and VP3 share the same parent clock as VP1 causing issue with pixel clock setting for HDMI (VP1). The current DM firmware does not support changing parent clock if it is shared by another component. It returns 0 for the determine_rate query before causing set_rate to set the clock at default maximum of 1.8GHz which is a lot more than the maximum frequency videoports can support (600MHz) causing SYNC LOST issues. So remove the parent clocks for unused VPs to avoid conflict. Fixes: 6f8605fd ("arm64: dts: ti: k3-am69-sk: Add DP and HDMI support") Reported-by:
Aradhya Bhatia <a-bhatia1@ti.com> Tested-by:
Enric Balletbo i Serra <eballetbo@redhat.com> Link: https://lore.kernel.org/r/20240201142308.4954-1-j-choudhary@ti.comSigned-off-by:
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- 05 Feb, 2024 31 commits
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Aradhya Bhatia authored
HDMI audio can be enabled over AM62A-SK using the same DT overlay that is used for AM625 / AM62-LP SK-EVMs. Add the sk.dtb + hdmi-audio.dtbo combination for AM62A7-SK as well, to check for overlay applicability during DTBS compile tests. Signed-off-by:
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Aradhya Bhatia authored
The DSS outputs DPI signals via its second video port (VP2). The DPI output from DSS is 24 bits (RGB888) and is forwarded to an HDMI transmitter (SIL9022) on the board. Add pinmux info for DSS DPI output. Add DT nodes for SIL9022 HDMI transmitter (TX), and the HDMI connector on the AM62A7-SK platforms. Additionally, connect the output of DSS (VP2) with input of the HDMI TX, and the output of HDMI TX to the input of the HDMI connector. Signed-off-by:
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Aradhya Bhatia authored
Add Display SubSystem (DSS) DT node for the AM62A7 SoC. The DSS supports one each of video pipeline (vid) and video-lite pipeline (vidl1). The video port 1 (vp1) is tied-off in AM62A SoC, but the pipeline remains active. The video port 2 (vp2) outputs the DPI signals. Both the video ports are connected to the pipelines via 2 identical overlay managers (ovr1 and ovr2). Signed-off-by:
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Nathan Morrisson authored
Add the ADC node to the phyCORE AM64x and enable the ADC. Signed-off-by:
Nathan Morrisson <nmorrisson@phytec.com> Reviewed-by:
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Manorit Chawdhry authored
Fix the power domain device ID for wkup_vtm0 node. Link: https://software-dl.ti.com/tisci/esd/latest/5_soc_doc/j784s4/devices.html Fixes: 64821fbf ("arm64: dts: ti: j784s4: Add VTM node") Signed-off-by:
Manorit Chawdhry <m-chawdhry@ti.com> Reviewed-by:
Andrew Davis <afd@ti.com> Link: https://lore.kernel.org/r/20240201-b4-upstream-j721s2-fix-vtm-devid-v2-2-85fd568b77e3@ti.comSigned-off-by:
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Manorit Chawdhry authored
Fix the power domain device ID for wkup_vtm0 node. Link: https://software-dl.ti.com/tisci/esd/latest/5_soc_doc/j721s2/devices.html Fixes: d148e3fe ("arm64: dts: ti: j721s2: Add VTM node") Signed-off-by:
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Ravi Gunasekaran authored
Enable the CPSW MDIO node, and link the pinctrl information to enable ethernet on SK-AM62P. Ethernet was unintentally broken on this board, even though these nodes were already present, as enabling them was missed in the original patch. Fixes: c00504ea ("arm64: dts: ti: k3-am62p5-sk: Updates for SK EVM") Signed-off-by:
Ravi Gunasekaran <r-gunasekaran@ti.com> Signed-off-by:
Jai Luthra <j-luthra@ti.com> Link: https://lore.kernel.org/r/20240201-am62p_cpsw_mdio-v1-1-05f758300f6e@ti.comSigned-off-by:
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Bhavya Kapoor authored
CAN instances 0 and 1 in the mcu domain are brought on the common processor board through headers J30 and J31 respectively. Thus, add their respective transceivers 1 and 2 dt nodes to add support for these CAN instances. CAN instance 3 in the main domain is brought on the common processor board through header J27. The CAN High and Low lines from the SoC are routed through a mux on the SoM. The select lines need to be set for the CAN signals to get connected to the transceiver 3 on the common processor board. Therefore, add transceiver dt nodes to add support for this CAN instance. Signed-off-by:
Bhavya Kapoor <b-kapoor@ti.com> Link: https://lore.kernel.org/r/20240130102044.120483-4-b-kapoor@ti.comSigned-off-by:
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Bhavya Kapoor authored
CAN instance 0 in the main domain is brought on the J7200 SoM through header J1. Thus, Add transceiver dt node to add support for this CAN instance. Also, add the mux dt nodes to route CAN High and Low lines coming from the SoC to the Common Processor Board. Signed-off-by:
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Bhavya Kapoor authored
Add support for 18 CAN controllers in main domain and 2 CAN controllers present in mcu domain. All the CAN controllers support classic CAN messages as well as CAN_FD messages. Signed-off-by:
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Francesco Dolcini authored
Add TPM device to Mallow device tree file, the device is connected to the SoC with SPI1/CS1, the same SPI interface is also available on an extension header together with an additional CS0 signal. Signed-off-by:
Francesco Dolcini <francesco.dolcini@toradex.com> Link: https://lore.kernel.org/r/20240126165136.28543-1-francesco@dolcini.itSigned-off-by:
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Andrew Davis authored
This node is an example node for the PCIe controller in "endpoint" mode. By default the controller is in "root complex" mode and there is already a DT node for the same. Examples should go in the bindings or other documentation. Remove this node. Signed-off-by:
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Andrew Davis authored
These nodes are example nodes for the PCIe controller in "endpoint" mode. By default the controller is in "root complex" mode and there is already a DT node for the same. Examples should go in the bindings or other documentation. Remove this node. Signed-off-by:
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Andrew Davis authored
This node is an example node for the PCIe controller in "endpoint" mode. By default the controller is in "root complex" mode and there is already a DT node for the same. Examples should go in the bindings or other documentation. Remove this node. Signed-off-by:
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Andrew Davis authored
PCIe node defined in the top-level J7200 SoC dtsi file is incomplete and will not be functional unless it is extended with a SerDes PHY. As the PHY and mode is only known at the board integration level, this node should only be enabled when provided with this information. Disable the PCIe node in the dtsi files and only enable when it is actually pinned out on a given board. Signed-off-by:
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Andrew Davis authored
Each "mboxes" item is composed of two cells. It seems these got split as they appeared to be two items in an array, but are actually a single two-cell item. Rejoin these cells. Signed-off-by:
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Andrew Davis authored
Each "mboxes" item is composed of two cells. It seems these got split as they appeared to be two items in an array, but are actually a single two-cell item. Rejoin these cells. Signed-off-by:
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Andrew Davis authored
Each "mboxes" item is composed of two cells. It seems these got split as they appeared to be two items in an array, but are actually a single two-cell item. Rejoin these cells. Signed-off-by:
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Andrew Davis authored
Each "mboxes" item is composed of two cells. It seems these got split as they appeared to be two items in an array, but are actually a single two-cell item. Rejoin these cells. Signed-off-by:
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Andrew Davis authored
Each "mboxes" item is composed of two cells. It seems these got split as they appeared to be two items in an array, but are actually a single two-cell item. Rejoin these cells. Signed-off-by:
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Andrew Davis authored
Each "mboxes" item is composed of two cells. It seems these got split as they appeared to be two items in an array, but are actually a single two-cell item. Rejoin these cells. Signed-off-by:
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Andrew Davis authored
Each "mboxes" item is composed of two cells. It seems these got split as they appeared to be two items in an array, but are actually a single two-cell item. Rejoin these cells. Signed-off-by:
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Andrew Davis authored
Each "mboxes" item is composed of two cells. It seems these got split as they appeared to be two items in an array, but are actually a single two-cell item. Rejoin these cells. Signed-off-by:
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Andrew Davis authored
Each "mboxes" item is composed of two cells. It seems these got split as they appeared to be two items in an array, but are actually a single two-cell item. Rejoin these cells. Signed-off-by:
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Andrew Davis authored
Each "mboxes" item is composed of two cells. It seems these got split as they appeared to be two items in an array, but are actually a single two-cell item. Rejoin these cells. Signed-off-by:
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Andrew Davis authored
Each "mboxes" item is composed of two cells. It seems these got split as they appeared to be two items in an array, but are actually a single two-cell item. Rejoin these cells. Signed-off-by:
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Wadim Egorov authored
The phyBOARD-Electra populates a TPM module on SPI0 bus. Add support for the Infineon SLB9670 TPM module. Signed-off-by:
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Nathan Morrisson authored
The clock on the ethernet1 PHY is turned on by default. This turns the clock off as we do not use it. Signed-off-by:
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Apurva Nandan authored
memory node are required for bootloader operation on TI K3 J784S4 EVM and AM69-SK boards for finding the memory size during early boot stage. So, align Linux device tree by adding phase tag marking 'bootph-all', which is to enable for all bootloader stages. Signed-off-by:
Apurva Nandan <a-nandan@ti.com> Link: https://lore.kernel.org/r/20240119171619.3759205-1-a-nandan@ti.comSigned-off-by:
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Sjoerd Simons authored
The beagleplay dts was using a bit-bang gpio mdio bus as a work-around for errata i2329. However since commit d04807b8 ("net: ethernet: ti: davinci_mdio: Add workaround for errata i2329") the mdio driver itself already takes care of this errata for effected silicon, which landed well before the beagleplay dts. So i suspect the reason for the workaround in upstream was simply due to copying the vendor dts. Switch the dts to the ti,cpsw-mdio instead so it described the actual hardware and is consistent with other AM625 based boards Signed-off-by:
Sjoerd Simons <sjoerd@collabora.com> Reviewed-by:
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Sjoerd Simons authored
The USB0 port on the beagleplay can be used for DFU booting. To enable that functionality mark with bootph-all. Signed-off-by:
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