- 07 Dec, 2009 4 commits
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Alex Deucher authored
Grab pll ref div from regs at driver init. r4xx seems very picky about the dividers for the pll driving lvds. Signed-off-by:
Alex Deucher <alexdeucher@gmail.com> Signed-off-by:
Dave Airlie <airlied@redhat.com>
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Alex Deucher authored
The DDX and radeonfb always set these regs to a sane value. Signed-off-by:
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Alex Deucher authored
These can end up with garbage otherwise. fixes rh bug 537140 Signed-off-by:
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Dave Airlie authored
Again we try to put VRAM at 0, and it didn't work on this chipset, reports of corrupt RAM appeared on irc and bugzilla. Fix the vram location according to what the BIOS setup, I'm not 100% sure we don't need the same thing on rs690/rs780/rs880, we probably should do it there just in case as its what the DDX does. Signed-off-by:
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- 06 Dec, 2009 1 commit
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Alex Deucher authored
Set up rs600 gart like r600: - set gart system aperture to vram - inside gart system aperture is unmapped* - outside gart system aperture is mapped* *mapped refers to memory handled by page tables Signed-off-by:
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- 04 Dec, 2009 10 commits
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Dave Airlie authored
Similiar to other quirks for RV515, this card has no second DVI port. Signed-off-by: -
Alex Deucher authored
Signed-off-by:
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Alex Deucher authored
also fix up rs690 mem width. should fix fdo bug 25408 Signed-off-by:
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Alex Deucher authored
noticed by Matthijs Kooijman on fdo bug 22140 Signed-off-by:
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Alex Deucher authored
avivo chips Copied from pre-avivo code. Signed-off-by:
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Alex Deucher authored
Board is DVI+VGA, not DVI+DVI Signed-off-by:
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Alex Deucher authored
R4xx cards don't have lvds pll dividers since they use atom. should fix rh bug 541562 Signed-off-by:
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Rafał Miłecki authored
Signed-off-by:
Rafał Miłecki <zajec5@gmail.com> Acked-by:
Jerome Glisse <jglisse@redhat.com> Signed-off-by:
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Rafał Miłecki authored
Signed-off-by:
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Rafał Miłecki authored
Unit typo noticed by taiu on IRC Signed-off-by:
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- 02 Dec, 2009 25 commits
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Jerome Glisse authored
The locking & protection of radeon object was somewhat messy. This patch completely rework it to now use ttm reserve as a protection for the radeon object structure member. It also shrink down the various radeon object structure by removing field which were redondant with the ttm information. Last it converts few simple functions to inline which should with performances. airlied: rebase on top of r600 and other changes. Signed-off-by:
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Dave Airlie authored
We really don't need to process every irq that comes in, we only really want to do SW irq processing when we are actually waiting for a fence to pass. I'm not 100% sure this is race free esp on non-MSI systems so it needs some testing. Signed-off-by: -
Alex Deucher authored
This enables the use of interrupts on r6xx/r7xx hardware. Interrupts are implemented via a ring buffer. The GPU adds interrupts vectors to the ring and the host reads them off in the interrupt handler. The interrupt controller requires firmware like the CP. This firmware must be installed and accessble to the firmware loader for interrupts to function. MSIs don't seem to work on my RS780. They work fine on all my discrete cards. I'm not sure about other RS780s or RS880s. I've disabled MSIs on RS780 and RS880, but it would probably be worth checking on some other systems. v2 - fix some checkpatch.pl problems; re-read the disp int status reg if we restart the ih; v3 - remove the irq handler if r600_irq_init() fails; remove spinlock in r600_ih_ring_fini(); move ih rb overflow check to r600_get_ih_wptr(); move irq ack to separate function; Signed-off-by: -
Dave Airlie authored
found while working on displayport. Signed-off-by: -
Jerome Glisse authored
Don't overwritte crtc_gen_cntl or crtc_gen_cntl2 or we may loose the cursor. This especialy happen when changing video mode. Fix bugs: https://bugzilla.redhat.com/show_bug.cgi?id=529146Signed-off-by:
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Alex Deucher authored
Lets user select tv-standard. The property was there, just not hooked up. Signed-off-by:
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Dave Airlie authored
If we find a GPU but we can't find its BIOS and it isn't posted, then ignore it. Signed-off-by: -
Dave Airlie authored
If the chip isn't initialised properly this can happen. also fix return value in combios clocks function. Signed-off-by: -
Alex Deucher authored
sync polarity, etc. This will likely fix LVDS problems on some laptops. Signed-off-by:
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Jerome Glisse authored
On IGP if you pass option agpmode=-1 you would overwrite the set_page function callback with improper function which endup in non functioning hw. This patch will disable agp when giving agpmode=-1 parameter only if we are dealing with an AGP GPU. Signed-off-by:
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Pierre Ossman authored
Reconfiguring one CRTC whilst another is running can cause a hang under some circumstances. Unfortunately we haven't pinpointed exactly what those circumstances are, so disable all CRTCs for every mode switch. Signed-off-by:
Pierre Ossman <pierre@ossman.eu> Acked-by:
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Alex Deucher authored
R4xx mobility chips use atombios, which does not store the LVDS_GEN_CNTL parameter setup like combios. Rather, it's configured in LVDSEncoderControl. As such, LVDS_GEN_CNTL is set wrong when on resume. Call LVDSEncoderControl to set it properly. Should fix fdo bug 25336 Signed-off-by:
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Dave Airlie authored
rendercheck under kms on r600s was failing due to HDP flushing not happening. This adds HDP flushing to the object wait function for r100->r700 families. rendercheck passes basic tests on r600 with this change. Acked-by:
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Michel Dänzer authored
This patch varies from the original and just removes memory for kernel pinned objects. Signed-off-by:
Michel Dänzer <daenzer@vmware.com> Signed-off-by:
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Dave Airlie authored
making the pinned console smaller gives X a bit more room to play with. Signed-off-by: -
Dave Airlie authored
The RN50 really needs this since its a single crtc card, however other gpus may benefit from it as well. Signed-off-by: -
Jerome Glisse authored
Just do nothing if crct_set_base() is called with no FB. The oops happens when the user switches between X & vt or in some case when changing mode. Signed-off-by:
Andrew Morton <akpm@linux-foundation.org> Signed-off-by:
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Alex Deucher authored
doesn't have a tv-out port Signed-off-by:
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Alex Deucher authored
Some systems have multiple connectors connected to the same encoder; e.g., DVI and HDMI connected to the same encoder with the same ddc line. Since we expose connectors as xrandr outputs, randr treats them separately which results in it trying to source the same encoder to different crtcs. If we have an HDMI and DVI-D port on the same encoder, pick the one to be considered connected based on the edid (HDMI if edid indicates HDMI, DVI otherwise). Should fix fdo bug 25150 Signed-off-by:
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Alex Deucher authored
DVI-I port is actually DVI-D Signed-off-by:
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Alex Deucher authored
Keep requested scaler type in radeon_encoder and the actual scaler type used in radeon_crtc. This prevents us from enabling the scaler when it's not required (i.e., the requested mode is the native mode). Also, always set the adjusted mode equal to the native mode for lvds. Should fix: https://bugzilla.redhat.com/show_bug.cgi?id=522271Signed-off-by:
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Alex Deucher authored
Call to set active device was missing. Signed-off-by:
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Dave Airlie authored
We might not hit this yet, but when if we do any sort of writeback we really need to enable PCI bus mastering on these systems from what I can see. This enables PCI BM on all radeons that require it. Signed-off-by: -
Alex Deucher authored
This enables initialization of external tmds chips on pre-atom and mac systems. Macs are untested. Also, some macs have single link tmds chips while others have dual link tmds chips. We need to figure out which ones have which. This gets external TMDS working on my RS485 and RV380. Signed-off-by:
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Alex Deucher authored
- Change reg/mask names to match what we use internally and in the bios - Clarify how i2c over gpio on radeon actually works Signed-off-by:
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