- 04 Mar, 2016 4 commits
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Carlos Palminha authored
This patch set nukes all the dummy crtc mode_fixup implementations. (made on top of Daniel topic/drm-misc branch) Signed-off-by:
Carlos Palminha <palminha@synopsys.com> Signed-off-by:
Daniel Vetter <daniel.vetter@ffwll.ch> Link: http://patchwork.freedesktop.org/patch/msgid/3d089c84bcb1aafd485d4944ad472f9843c38eaf.1455630967.git.palminha@synopsys.com
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Carlos Palminha authored
This patch set nukes all the dummy crtc mode_fixup implementations. (made on top of Daniel topic/drm-misc branch) Signed-off-by:
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Maarten Lankhorst authored
Minor cleanup, connector and connector_state are always non-NULL here. Signed-off-by:
Maarten Lankhorst <maarten.lankhorst@linux.intel.com> Reviewed-by:
Ville Syrjälä <ville.syrjala@linux.intel.com> Signed-off-by:
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Maarten Lankhorst authored
With the addition of crtc_state->connector_mask other connectors from different crtc's aren't needed any more to determine if a crtc has connectors, so only call add_affected_connectors on the target crtc. This allows a cleanup to first remove all current connectors, then add all set->connectors to the target crtc. Signed-off-by:
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- 29 Feb, 2016 1 commit
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Liu Ying authored
The function __drm_framebuffer_unregister() has boilerplate code to drop idr reference. Let's replace it with drm_mode_object_put() to simplify the code. Signed-off-by:
Liu Ying <gnuiyl@gmail.com> Signed-off-by:
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- 26 Feb, 2016 11 commits
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http://git.agner.ch/git/linux-drm-fsl-dcuDave Airlie authored
As previously discussed, this is my first pull request for the DCU DRM driver along with the change in MAINTAINERS. https://lkml.org/lkml/2016/1/7/26 The pull contains some code cleanup changes (e.g. removing all error handling for the regmap calls) and several fixes. * 'for-next' of http://git.agner.ch/git/linux-drm-fsl-dcu: drm/fsl-dcu: fix register initialization drm/fsl-dcu: use mode flags for hsync/vsync polarity drm/fsl-dcu: fix alpha blending drm/fsl-dcu: mask all interrupts on initialization drm/fsl-dcu: handle initialization errors properly drm/fsl-dcu: avoid memory leak on errors drm/fsl-dcu: remove regmap return value checks drm/fsl-dcu: specify volatile registers drm: fsl-dcu: Fix no fb check bug MAINTAINERS: update for Freescale DCU DRM driver
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Stefan Agner authored
The layer enumeration start with 0 (0-15 for LS1021a and 0-63 for Vybrid) whereas the register enumeration start from 1 (1-10 for LS1021a and 1-9 for Vybrid). The loop started off from 0 for both iterations and initialized the number of layers inclusive, which is one layer too many. All extensively written registers seem to be unassigned, it seems that the write to those registers did not do any harm in practice. Signed-off-by:Stefan Agner <stefan@agner.ch>
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Stefan Agner authored
The current default configuration is as follows: - Invert VSYNC signal (active LOW) - Invert HSYNC signal (active LOW) The mode flags allow to specify the required polarity per mode. Furthermore, none of the current driver settings is actually a standard polarity. This patch applies the current driver default polarities as explicit flags to the display which has been introduced with the driver (NEC WQVGA "nec,nl4827hc19-05b"). The driver now also parses the flags field and applies the configuration accordingly, by using the following values as standard polarities: (e.g. when no flags are specified): - VSYNC signal not inverted (active HIGH) - HSYNC signal not inverted (active HIGH) Acked-by:
Thierry Reding <treding@nvidia.com> Signed-off-by:
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Stefan Agner authored
Fix alpha blending by enabling alpha blending for the whole frame if a color mode with alpha channel is selected (DRM_FORMAT_ARGB*). Also support color modes without alpha channel (DRM_FORMAT_XRGB*) by just not enabling alpha blending on layer level. Signed-off-by: -
Stefan Agner authored
The state of the interrupt mask register on initialization is unknown, e.g. U-Boot could already used the DCU. So depending on the boot loader, the outcome of the interrupt mask register could be different. A defined state is much more preferable. Also, there is no value in keeping interrupts enabled which we don't need. Therefor, mask all interrupts on initialization. Signed-off-by: -
Stefan Agner authored
If initialization fails (e.g. due to missing panel node or deferred probe) make sure to roll-back all operations and return the error code. Signed-off-by: -
Stefan Agner authored
Improve error handling during CRTC initialization. Especially avoid memory leaks in the primary plane initialization error path. Signed-off-by: -
Stefan Agner authored
It is not common to do regmap return value checks, especially not for memory mapped device. We can rule out most error returns since the conditions are static and we know they are ok (e.g. offset aligned to register stride). Also without proper error handling they are not really valuable for the user. Hence remove most of them. The check in the interrupt handler is worth keeping since a volatile register won't be readable in case register caching is still enabled. Signed-off-by: -
Stefan Agner authored
Since we are using cached registers, we need to specify volatile registers explicitly to avoid reading their value from the cache. This allows to read the correct interrupt status in fsl_dcu_drm_irq and clear the asserted bits only. Signed-off-by: -
Meng Yi authored
For state->fb or state->crtc may be NULL in fsl_dcu_drm_plane_atomic_check function, if so, return 0. Signed-off-by:
Meng Yi <meng.yi@nxp.com> Signed-off-by:
Jianwei Wang <jianwei.wang.chn@gmail.com> Signed-off-by:
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Stefan Agner authored
Promote myself as new maintainer of the Freescale DCU DRM driver. Acked-by:
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- 25 Feb, 2016 1 commit
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git://linuxtv.org/pinchartl/fbdevDave Airlie authored
rcar-du updates. * 'drm/next/du' of git://linuxtv.org/pinchartl/fbdev: (281 commits) drm: rcar-du: Add tri-planar memory formats support drm: rcar-du: Add probe deferral debug messages drm: rcar-du: lvds: Add R-Car Gen3 support drm: rcar-du: lvds: Rename PLLEN bit to PLLON drm: rcar-du: lvds: Fix PLL frequency-related configuration drm: rcar-du: lvds: Avoid duplication of clock clamp code drm: rcar-du: Add R8A7795 device support drm: rcar-du: Output the DISP signal on the ODDF pin drm: rcar-du: Output the DISP signal on the DISP pin drm: rcar-du: Support up to 4 CRTCs drm: rcar-du: Drop LVDS double dependency on OF drm: rcar-du: Enable compilation on ARM64 drm: rcar-du: Fix compile warning on 64-bit platforms drm: rcar-du: Expose the VSP1 compositor through KMS planes drm: rcar-du: Move plane allocator to rcar_du_plane.c drm: rcar-du: Restart the DU group when a plane source changes drm: rcar-du: Add VSP1 compositor support drm: rcar-du: Add VSP1 support to the planes allocator drm: rcar-du: Refactor plane setup drm: rcar-du: Compute plane DDCR4 register value directly ...
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- 23 Feb, 2016 14 commits
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Laurent Pinchart authored
Those formats are supported on Gen3 only. Signed-off-by:Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
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Laurent Pinchart authored
Print a message when the HDMI I2C slave encoder can't be found to help debugging probe deferral issues. Signed-off-by: -
Koji Matsuoka authored
The LVDS encoder differs slightly in Gen3 SoCs in its PLL configuration. Add support for the Gen3 LVDS PLL parameters and startup procedure. Signed-off-by:
Koji Matsuoka <koji.matsuoka.xm@renesas.com> Signed-off-by:
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Laurent Pinchart authored
The bit is named PLLON in the datasheet, rename it. Signed-off-by: -
Laurent Pinchart authored
The frequency checks don't match the datasheet, fix them. Signed-off-by: -
Laurent Pinchart authored
Replace the duplicate code by a single central function. Signed-off-by: -
Laurent Pinchart authored
Document the R8A7795-specific DT bindings and support them in the driver. The HDMI and LVDS outputs are currently not supported. Signed-off-by:
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Laurent Pinchart authored
The ODDF signal, output by default on the ODDF pin, isn't used on any board supported in the kernel. As the Gen3 Salvator-X board uses the ODDF pin as a DISP signal, hardcode that configuration in the driver. Use of the ODDF signal will be implemented later through proper DT-based configuration of the DU pins. Signed-off-by: -
Laurent Pinchart authored
The DE signal is currently configured to be identical to the DISP signal and is used for the same purpose. To make it clearer that the DISP pin outputs the DISP signal, select it explicitly. Signed-off-by: -
Koji Matsuoka authored
The Gen3 R8A7795 DU has 4 CRTCs, support them all. Signed-off-by:
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Laurent Pinchart authored
LVDS support depends on DRM_RCAR_DU which already depends on OF. Drop the explicit dependency. Signed-off-by: -
Koji Matsuoka authored
The R8A7795 SoC is ARM64-based and include a DU. Enable driver compilation on ARM64. Signed-off-by:
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Koji Matsuoka authored
Use %tu instead of %u to print difference between pointers. Signed-off-by:
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Laurent Pinchart authored
On R-Car Gen3 SoCs the DU lost its ability to access memory directly and needs to work in conjunction with the VSP to do so. This commit handles the VSP internally to hide it from the user. Signed-off-by:
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- 20 Feb, 2016 9 commits
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Laurent Pinchart authored
The plane allocator is specific to DU planes and won't be used for VSP-based planes, move it with the rest of the DU planes code where it belongs. Signed-off-by: -
Laurent Pinchart authored
Plane sources are configured by the VSPS bit in the PnDDCR4 register. Although the datasheet states that the bit is updated during vertical blanking, it seems that updates only occur when the DU group is held in reset through the DSYSR.DRES bit. Restart the group if the source changes. Signed-off-by: -
Laurent Pinchart authored
Configure the plane source at plane setup time to source frames from memory or from the VSP1. Signed-off-by: -
Laurent Pinchart authored
The R8A7790 DU can source frames directly from the VSP1 devices VSPD0 and VSPD1. VSPD0 feeds DU0/1 plane 0, and VSPD1 feeds either DU2 plane 0 or DU0/1 plane 1. Allocate the correct fixed plane when sourcing frames from VSPD0 or VSPD1, and allocate planes in reverse index order otherwise to ensure maximum availability of planes 0 and 1. Signed-off-by: -
Laurent Pinchart authored
Rename plane setup functions using more explicit names, and use local variables to store intermediate values to increase readability. This also prepares for VSP compositor support. Signed-off-by: -
Laurent Pinchart authored
There's no need for a read-modify-write pattern, all register bits can be set explicitly. Signed-off-by: -
Laurent Pinchart authored
A disabled CRTC can't display planes, the driver shouldn't try to configure it when updating planes. The DRM core will store the plane state for us, and the plane will be configured appropriately the next time the CRTC is enabled. Signed-off-by: -
Laurent Pinchart authored
The atomic framework guarantees that the CRTC enable and disable functions will only be called when needed, there's no need to duplicate the CRTC state check. By replacing the local CRTC enabled state check at resume time with the CRTC active state we can remove the local CRTC enabled state altogether. Signed-off-by: -
Laurent Pinchart authored
The drm driver .load() operation is prone to race conditions as it initializes the driver after registering the device nodes. Its usage is deprecated, inline it in the probe function and call drm_dev_alloc() and drm_dev_register() explicitly. For consistency inline the .unload() handler in the remove function as well. Signed-off-by:
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