- 28 Sep, 2022 38 commits
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David S. Miller authored
Zhengchao Shao says: ==================== net: add tc-testing qdisc test cases For this patchset, test cases of the qdisc modules are added to the tc-testing test suite. Last, thanks to Victor for testing and suggestion. After a test case is added locally, the test result is as follows: ./tdc.py -c atm ok 1 7628 - Create ATM with default setting ok 2 390a - Delete ATM with valid handle ok 3 32a0 - Show ATM class ok 4 6310 - Dump ATM stats ./tdc.py -c choke ok 1 8937 - Create CHOKE with default setting ok 2 48c0 - Create CHOKE with min packet setting ok 3 38c1 - Create CHOKE with max packet setting ok 4 234a - Create CHOKE with ecn setting ok 5 4380 - Create CHOKE with burst setting ok 6 48c7 - Delete CHOKE with valid handle ok 7 4398 - Replace CHOKE with min setting ok 8 0301 - Change CHOKE with limit setting ./tdc.py -c codel ok 1 983a - Create CODEL with default setting ok 2 38aa - Create CODEL with limit packet setting ok 3 9178 - Create CODEL with target setting ok 4 78d1 - Create CODEL with interval setting ok 5 238a - Create CODEL with ecn setting ok 6 939c - Create CODEL with ce_threshold setting ok 7 8380 - Delete CODEL with valid handle ok 8 289c - Replace CODEL with limit setting ok 9 0648 - Change CODEL with limit setting ./tdc.py -c etf ok 1 34ba - Create ETF with default setting ok 2 438f - Create ETF with delta nanos setting ok 3 9041 - Create ETF with deadline_mode setting ok 4 9a0c - Create ETF with skip_sock_check setting ok 5 2093 - Delete ETF with valid handle ./tdc.py -c fq ok 1 983b - Create FQ with default setting ok 2 38a1 - Create FQ with limit packet setting ok 3 0a18 - Create FQ with flow_limit setting ok 4 2390 - Create FQ with quantum setting ok 5 845b - Create FQ with initial_quantum setting ok 6 9398 - Create FQ with maxrate setting ok 7 342c - Create FQ with nopacing setting ok 8 6391 - Create FQ with refill_delay setting ok 9 238b - Create FQ with low_rate_threshold setting ok 10 7582 - Create FQ with orphan_mask setting ok 11 4894 - Create FQ with timer_slack setting ok 12 324c - Create FQ with ce_threshold setting ok 13 424a - Create FQ with horizon time setting ok 14 89e1 - Create FQ with horizon_cap setting ok 15 32e1 - Delete FQ with valid handle ok 16 49b0 - Replace FQ with limit setting ok 17 9478 - Change FQ with limit setting ./tdc.py -c gred ok 1 8942 - Create GRED with default setting ok 2 5783 - Create GRED with grio setting ok 3 8a09 - Create GRED with limit setting ok 4 48cb - Create GRED with ecn setting ok 5 763a - Change GRED setting ok 6 8309 - Show GRED class ./tdc.py -c hhf ok 1 4812 - Create HHF with default setting ok 2 8a92 - Create HHF with limit setting ok 3 3491 - Create HHF with quantum setting ok 4 ba04 - Create HHF with reset_timeout setting ok 5 4238 - Create HHF with admit_bytes setting ok 6 839f - Create HHF with evict_timeout setting ok 7 a044 - Create HHF with non_hh_weight setting ok 8 32f9 - Change HHF with limit setting ok 9 385e - Show HHF class ./tdc.py -c pfifo_fast ok 1 900c - Create pfifo_fast with default setting ok 2 7470 - Dump pfifo_fast stats ok 3 b974 - Replace pfifo_fast with different handle ok 4 3240 - Delete pfifo_fast with valid handle ok 5 4385 - Delete pfifo_fast with invalid handle ./tdc.py -c plug ok 1 3289 - Create PLUG with default setting ok 2 0917 - Create PLUG with block setting ok 3 483b - Create PLUG with release setting ok 4 4995 - Create PLUG with release_indefinite setting ok 5 389c - Create PLUG with limit setting ok 6 384a - Delete PLUG with valid handle ok 7 439a - Replace PLUG with limit setting ok 8 9831 - Change PLUG with limit setting ./tdc.py -c sfb ok 1 3294 - Create SFB with default setting ok 2 430a - Create SFB with rehash setting ok 3 3410 - Create SFB with db setting ok 4 49a0 - Create SFB with limit setting ok 5 1241 - Create SFB with max setting ok 6 3249 - Create SFB with target setting ok 7 30a9 - Create SFB with increment setting ok 8 239a - Create SFB with decrement setting ok 9 9301 - Create SFB with penalty_rate setting ok 10 2a01 - Create SFB with penalty_burst setting ok 11 3209 - Change SFB with rehash setting ok 12 5447 - Show SFB class ./tdc.py -c sfq ok 1 7482 - Create SFQ with default setting ok 2 c186 - Create SFQ with limit setting ok 3 ae23 - Create SFQ with perturb setting ok 4 a430 - Create SFQ with quantum setting ok 5 4539 - Create SFQ with divisor setting ok 6 b089 - Create SFQ with flows setting ok 7 99a0 - Create SFQ with depth setting ok 8 7389 - Create SFQ with headdrop setting ok 9 6472 - Create SFQ with redflowlimit setting ok 10 8929 - Show SFQ class ./tdc.py -c skbprio ok 1 283e - Create skbprio with default setting ok 2 c086 - Create skbprio with limit setting ok 3 6733 - Change skbprio with limit setting ok 4 2958 - Show skbprio class ./tdc.py -c taprio ok 1 ba39 - Add taprio Qdisc to multi-queue device (8 queues) ok 2 9462 - Add taprio Qdisc with multiple sched-entry ok 3 8d92 - Add taprio Qdisc with txtime-delay ok 4 d092 - Delete taprio Qdisc with valid handle ok 5 8471 - Show taprio class ok 6 0a85 - Add taprio Qdisc to single-queue device ./tdc.py -c tbf ok 1 6430 - Create TBF with default setting ok 2 0518 - Create TBF with mtu setting ok 3 320a - Create TBF with peakrate setting ok 4 239b - Create TBF with latency setting ok 5 c975 - Create TBF with overhead setting ok 6 948c - Create TBF with linklayer setting ok 7 3549 - Replace TBF with mtu ok 8 f948 - Change TBF with latency time ok 9 2348 - Show TBF class ./tdc.py -c teql ok 1 84a0 - Create TEQL with default setting ok 2 7734 - Create TEQL with multiple device ok 3 34a9 - Delete TEQL with valid handle ok 4 6289 - Show TEQL stats --- v3: add config v2: modify subject prefix ==================== Signed-off-by:David S. Miller <davem@davemloft.net>
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Zhengchao Shao authored
Test 84a0: Create TEQL with default setting Test 7734: Create TEQL with multiple device Test 34a9: Delete TEQL with valid handle Test 6289: Show TEQL stats Signed-off-by:
Zhengchao Shao <shaozhengchao@huawei.com> Signed-off-by:
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Zhengchao Shao authored
Test 6430: Create TBF with default setting Test 0518: Create TBF with mtu setting Test 320a: Create TBF with peakrate setting Test 239b: Create TBF with latency setting Test c975: Create TBF with overhead setting Test 948c: Create TBF with linklayer setting Test 3549: Replace TBF with mtu Test f948: Change TBF with latency time Test 2348: Show TBF class Signed-off-by:
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Zhengchao Shao authored
Test ba39: Add taprio Qdisc to multi-queue device (8 queues) Test 9462: Add taprio Qdisc with multiple sched-entry Test 8d92: Add taprio Qdisc with txtime-delay Test d092: Delete taprio Qdisc with valid handle Test 8471: Show taprio class Test 0a85: Add taprio Qdisc to single-queue device Signed-off-by:
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Zhengchao Shao authored
Test 283e: Create skbprio with default setting Test c086: Create skbprio with limit setting Test 6733: Change skbprio with limit setting Test 2958: Show skbprio class Signed-off-by:
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Zhengchao Shao authored
Test 7482: Create SFQ with default setting Test c186: Create SFQ with limit setting Test ae23: Create SFQ with perturb setting Test a430: Create SFQ with quantum setting Test 4539: Create SFQ with divisor setting Test b089: Create SFQ with flows setting Test 99a0: Create SFQ with depth setting Test 7389: Create SFQ with headdrop setting Test 6472: Create SFQ with redflowlimit setting Test 8929: Show SFQ class Signed-off-by:
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Zhengchao Shao authored
Test 3294: Create SFB with default setting Test 430a: Create SFB with rehash setting Test 3410: Create SFB with db setting Test 49a0: Create SFB with limit setting Test 1241: Create SFB with max setting Test 3249: Create SFB with target setting Test 30a9: Create SFB with increment setting Test 239a: Create SFB with decrement setting Test 9301: Create SFB with penalty_rate setting Test 2a01: Create SFB with penalty_burst setting Test 3209: Change SFB with rehash setting Test 5447: Show SFB class Signed-off-by:
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Zhengchao Shao authored
Test 3289: Create PLUG with default setting Test 0917: Create PLUG with block setting Test 483b: Create PLUG with release setting Test 4995: Create PLUG with release_indefinite setting Test 389c: Create PLUG with limit setting Test 384a: Delete PLUG with valid handle Test 439a: Replace PLUG with limit setting Test 9831: Change PLUG with limit setting Signed-off-by:
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Zhengchao Shao authored
Test 900c: Create pfifo_fast with default setting Test 7470: Dump pfifo_fast stats Test b974: Replace pfifo_fast with different handle Test 3240: Delete pfifo_fast with valid handle Test 4385: Delete pfifo_fast with invalid handle Signed-off-by:
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Zhengchao Shao authored
Test 4812: Create HHF with default setting Test 8a92: Create HHF with limit setting Test 3491: Create HHF with quantum setting Test ba04: Create HHF with reset_timeout setting Test 4238: Create HHF with admit_bytes setting Test 839f: Create HHF with evict_timeout setting Test a044: Create HHF with non_hh_weight setting Test 32f9: Change HHF with limit setting Test 385e: Show HHF class Signed-off-by:
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Zhengchao Shao authored
Test 8942: Create GRED with default setting Test 5783: Create GRED with grio setting Test 8a09: Create GRED with limit setting Test 48cb: Create GRED with ecn setting Test 763a: Change GRED setting Test 8309: Show GRED class Signed-off-by:
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Zhengchao Shao authored
Test 983b: Create FQ with default setting Test 38a1: Create FQ with limit packet setting Test 0a18: Create FQ with flow_limit setting Test 2390: Create FQ with quantum setting Test 845b: Create FQ with initial_quantum setting Test 9398: Create FQ with maxrate setting Test 342c: Create FQ with nopacing setting Test 6391: Create FQ with refill_delay setting Test 238b: Create FQ with low_rate_threshold setting Test 7582: Create FQ with orphan_mask setting Test 4894: Create FQ with timer_slack setting Test 324c: Create FQ with ce_threshold setting Test 424a: Create FQ with horizon time setting Test 89e1: Create FQ with horizon_cap setting Test 32e1: Delete FQ with valid handle Test 49b0: Replace FQ with limit setting Test 9478: Change FQ with limit setting Signed-off-by:
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Zhengchao Shao authored
Test 34ba: Create ETF with default setting Test 438f: Create ETF with delta nanos setting Test 9041: Create ETF with deadline_mode setting Test 9a0c: Create ETF with skip_sock_check setting Test 2093: Delete ETF with valid handle Signed-off-by:
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Zhengchao Shao authored
Test 983a: Create CODEL with default setting Test 38aa: Create CODEL with limit packet setting Test 9178: Create CODEL with target setting Test 78d1: Create CODEL with interval setting Test 238a: Create CODEL with ecn setting Test 939c: Create CODEL with ce_threshold setting Test 8380: Delete CODEL with valid handle Test 289c: Replace CODEL with limit setting Test 0648: Change CODEL with limit setting Signed-off-by:
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Zhengchao Shao authored
Test 8937: Create CHOKE with default setting Test 48c0: Create CHOKE with min packet setting Test 38c1: Create CHOKE with max packet setting Test 234a: Create CHOKE with ecn setting Test 4380: Create CHOKE with burst setting Test 48c7: Delete CHOKE with valid handle Test 4398: Replace CHOKE with min setting Test 0301: Change CHOKE with limit setting Signed-off-by:
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Zhengchao Shao authored
Test 7628: Create ATM with default setting Test 390a: Delete ATM with valid handle Test 32a0: Show ATM class Test 6310: Dump ATM stats Signed-off-by:
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Kees Cook authored
To work around a misbehavior of the compiler's ability to see into composite flexible array structs (as detailed in the coming memcpy() hardening series[1]), split the memcpy() of the header and the payload so no false positive run-time overflow warning will be generated. [1] https://lore.kernel.org/linux-hardening/20220901065914.1417829-2-keescook@chromium.org Cc: Ido Schimmel <idosch@nvidia.com> Signed-off-by:
Kees Cook <keescook@chromium.org> Reviewed-by:
Gustavo A. R. Silva <gustavoars@kernel.org> Reviewed-by:
Petr Machata <petrm@nvidia.com> Link: https://lore.kernel.org/r/20220927004033.1942992-1-keescook@chromium.orgSigned-off-by:
Jakub Kicinski <kuba@kernel.org>
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Jakub Kicinski authored
Alex Elder says: ==================== net: ipa: generalized register definitions This series is quite a bit bigger than what I normally like to send, and I apologize for that. I would like it to get incorporated in its entirety this week if possible, and splitting up the series carries a small risk that wouldn't happen. Each IPA register has a defined offset, and in most cases, a set of masks that define the width and position of fields within the register. Most registers currently use the same offset for all versions of IPA. Usually fields within registers are also the same across many versions. Offsets and fields like this are defined using preprocessor constants. When a register has a different offset for different versions of IPA, an inline function is used to determine its offset. And in places where a field differs between versions, an inline function is used to determine how a value is encoded within the field, depending on IPA version. Starting with IPA version 5.0, the number of IPA endpoints supported is greater than 32. As a consequence, *many* IPA register offsets differ considerably from prior versions. This increase in endpoints also requires a lot of field sizes and/or positions to change (such as those that contain an endpoint ID). Defining these things with constants is no longer simple, and rather than fill the code with one-off functions to define offsets and encode field values, this series puts in place a new way of defining IPA registers and their fields. Note that this series creates this new scheme, but does not add IPA v5.0+ support. An enumerated type will now define a unique ID for each IPA register. Each defined register will have a structure that contains its offset and its name (a printable string). Each version of IPA will have an array of these register structures, indexed by register ID. Some "parameterized" registers are duplicated (this is not new). For example, each endpoint has an INIT_HDR register, and the offset of a given endpoint's INIT_HDR register is dependent on the endpoint number (the parameter). In such cases, the register's "stride" is defined as the distance between two of these registers. If a register contains fields, each field will have a unique ID that's used as an index into an array of field masks defined for the register. The register structure also defines the number of entries in this field array. When a register is to be used in code, its register structure will be fetched using function ipa_reg(). Other functions are then used to determine the register's offset, or to encode a value into one of the register's fields, and so on. Each version of IPA defines the set of registers that are available, including all fields for these registers. The array of defined registers is set up at probe time based on the IPA version, and it is associated with the main IPA structure. ==================== Link: https://lore.kernel.org/r/20220926220931.3261749-1-elder@linaro.orgSigned-off-by:
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Alex Elder authored
Define the fields for the ENDP_INIT_DEAGGR, ENDP_INIT_RSRC_GRP, ENDP_INIT_SEQ, ENDP_STATUS, and ENDP_FILTER_ROUTER_HSH_CFG, and IPA_IRQ_UC IPA registers for all supported IPA versions. Create enumerated types to identify fields for these IPA registers. Use IPA_REG_FIELDS() and IPA_REG_STRIDE_FIELDS() to specify the field mask values defined for these registers, for each supported version of IPA. Use ipa_reg_encode() and ipa_reg_bit() to build up the values to be written to these registers, remove an inline function and all the *_FMASK symbols that are now no longer used. Signed-off-by:
Alex Elder <elder@linaro.org> Signed-off-by:
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Alex Elder authored
Define the fields for the ENDP_INIT_MODE, ENDP_INIT_AGGR, ENDP_INIT_HOL_BLOCK_EN, and ENDP_INIT_HOL_BLOCK_TIMER IPA registers for all supported IPA versions. Create enumerated types to identify fields for these IPA registers. Use IPA_REG_STRIDE_FIELDS() to specify the field mask values defined for these registers, for each supported version of IPA. Change aggr_time_limit_encode() and hol_block_timer_encode() so they take an ipa_reg pointer, and use those register's fields to compute their encoded results. Have aggr_time_limit_encode() take an IPA pointer rather than version, to match hol_block_timer_encode(). Use ipa_reg_encode(), ipa_reg_bit(), and ipa_reg_field_max() to manipulate values to be written to these registers, remove the definitions of the various inline functions and *_FMASK symbols that are now no longer used. Signed-off-by:
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Alex Elder authored
Define the fields for the ENDP_INIT_CTRL, ENDP_INIT_CFG, ENDP_INIT_NAT, ENDP_INIT_HDR, and ENDP_INIT_HDR_EXT IPA registers for all supported IPA versions. Create enumerated types to identify fields for these IPA registers. Use IPA_REG_STRIDE_FIELDS() to specify the field mask values defined for these registers, for each supported version of IPA. Move ipa_header_size_encoded() and ipa_metadata_offset_encoded() out of "ipa_reg.h" and into "ipa_endpoint.c". Change them so they take an additional ipa_reg structure argument, and use ipa_reg_encode() to encode the parts of the header size and offset prior to writing to the register. Change their names to be verbs rather than nouns. Use ipa_reg_encode(), ipa_reg_bit, and ipa_reg_field_max() to manipulate values to be written to these registers, remove the definition of the no-longer-used *_FMASK symbols. Signed-off-by:
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Alex Elder authored
Define the fields for the {SRC,DST}_RSRC_GRP_{01,23,45,67}_RSRC_TYPE IPA registers for all supported IPA versions. Create enumerated types to identify fields for these IPA registers. Use IPA_REG_STRIDE_FIELDS() to specify the field mask values defined for these registers, for each supported version of IPA. Use ipa_reg_encode() to build up the values to be written to these registers. Remove the definition of the no-longer-used *_FMASK symbols. Signed-off-by: -
Alex Elder authored
Define the fields for the FLAVOR_0, IDLE_INDICATION_CFG, QTIME_TIMESTAMP_CFG, TIMERS_XO_CLK_DIV_CFG and TIMERS_PULSE_GRAN_CFG IPA registers for all supported IPA versions. Create enumerated types to identify fields for these IPA registers. Use IPA_REG_FIELDS() to specify the field mask values defined for these registers, for each supported version of IPA. Use ipa_reg_bit() and ipa_reg_encode() to build up the values to be written to these registers. Use ipa_reg_decode() to extract field values from the FLAVOR_0 register. Remove the definition of the no-longer-used *_FMASK symbols. Signed-off-by:
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Alex Elder authored
Define the fields for the LOCAL_PKT_PROC_CNTXT, COUNTER_CFG, and IPA_TX_CFG IPA registers for all supported IPA versions. Create enumerated types to identify fields for these IPA registers. Use IPA_REG_FIELDS() to specify the field mask values defined for these registers, for each supported version of IPA. Use ipa_reg_bit() and ipa_reg_encode() to build up the values to be written to these registers. Remove the definition of the *_FMASK symbols as well as proc_cntxt_base_addr_encoded(), because they are no longer needed. Signed-off-by:
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Alex Elder authored
Define the fields for the SHARED_MEM_SIZE, QSB_MAX_WRITES, QSB_MAX_READS, FILT_ROUT_HASH_EN, and FILT_ROUT_HASH_FLUSH IPA registers for all supported IPA versions. Create enumerated types to identify fields for these registers. Use IPA_REG_FIELDS() to specify the field mask values defined for these registers, for each supported version of IPA. Use ipa_reg_bit() and ipa_reg_encode() to build up the values to be written to these registers rather than using the *_FMASK preprocessor symbols. Remove the definition of the now unused *_FMASK symbols. Signed-off-by:
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Alex Elder authored
Create the ipa_reg_clkon_cfg_field_id enumerated type, which identifies the fields for the CLKON_CFG IPA register. Add "CLKON_" to a few short names to try to avoid name conflicts. Create the ipa_reg_route_field_id enumerated type, which identifies the fields for the ROUTE IPA register. Use IPA_REG_FIELDS() to specify the field mask values defined for these registers, for each supported version of IPA. Use ipa_reg_bit() and ipa_reg_encode() to build up the values to be written to these registers rather than using the *_FMASK preprocessor symbols. Remove the definition of the now unused *_FMASK symbols. Signed-off-by:
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Alex Elder authored
Create the ipa_reg_comp_cfg_field_id enumerated type, which identifies the fields for the COMP_CFG IPA register. Use IPA_REG_FIELDS() to specify the field mask values defined for this register, for each supported version of IPA. Use ipa_reg_bit() to build up the value to be written to this register rather than using the *_FMASK preprocessor symbols. Remove the definition of the *_FMASK symbols, along with the inline functions that were used to encode certain fields whose position and/or width within the register was dependent on IPA version. Take this opportunity to represent all one-bit fields using BIT(x) rather than GENMASK(x, x). Signed-off-by:
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Alex Elder authored
Add register field descriptors to the ipa_reg structure. A field in a register is defined by a field mask, which is a 32-bit mask having a single contiguous range of bits set. For each register that has at least one field defined, an enumerated type will identify the register's fields. The ipa_reg structure for that register will include an array fmask[] of field masks, indexed by that enumerated type. Each field mask defines the position and bit width of a field. An additional "fcount" records how many fields (masks) are defined for a given register. Introduce two macros to be used to define registers that have at least one field. Introduce a few new functions related to field masks. The first simply returns a field mask, given an IPA register pointer and field mask ID. A variant of that is meant to be used for the special case of single-bit field masks. Next, ipa_reg_encode(), identifies a field with an IPA register pointer and a field ID, and takes a value to represent in that field. The result encodes the value in the appropriate place to be stored in the register. This is roughly modeled after the bitmask operations (like u32_encode_bits()). Another function (ipa_reg_decode()) similarly identifies a register field, but the value supplied to it represents a full register value. The value encoded in the field is extracted from the value and returned. This is also roughly modeled after bitmask operations (such as u32_get_bits()). Finally, ipa_reg_field_max() returns the maximum value representable by a field. Signed-off-by:
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Alex Elder authored
Create a new function that returns a register descriptor given its ID. Change ipa_reg_offset() and ipa_reg_n_offset() so they take a register descriptor argument rather than an IPA pointer and register ID. Have them accept null pointers (and return an invalid 0 offset), to avoid the need for excessive error checking. (A warning is issued whenever ipa_reg() returns 0). Call ipa_reg() or ipa_reg_n() to look up information about the register before calls to ipa_reg_offset() and ipa_reg_n_offset(). Delay looking up offsets until they're needed to read or write registers. Signed-off-by:
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Alex Elder authored
Use the array of register descriptors assigned at initialization time to determine the offset (and where used, stride) for IPA registers. Issue a warning if an offset is requested for a register that's not valid for the current system. Remove all IPE_REG_*_OFFSET macros, as well as inline static functions that returned register offsets. Signed-off-by:
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Alex Elder authored
Create a new subdirectory "reg", which contains a register definition file for each supported version of IPA. Each register definition contains the register's offset, and for parameterized registers, the stride (distance between consecutive instances of the register). Finally, it includes an all-caps printable register name. In these files, each IPA version defines an array of IPA register definition pointers, with unsupported registers defined with a null pointer. The array is indexed by the ipa_reg_id enumerated type. At initialization time, the appropriate register definition array to use is selected based on the IPA version, and assigned to a new "regs" field in the IPA structure. Extend ipa_reg_valid() so it fails if a valid register is not defined. This patch simply puts this infrastructure in place; the next will use it. Signed-off-by:
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Alex Elder authored
Expose two inline functions that return the offset for a register whose ID is provided; one of them takes an additional argument that's used for registers that are parameterized. These both use a common helper function __ipa_reg_offset(), which just uses the offset symbols already defined. Replace all references to the offset macros defined for IPA registers with calls to ipa_reg_offset() or ipa_reg_n_offset(). Signed-off-by:
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Alex Elder authored
Create a new ipa_reg_id enumerated type, which identifies each IPA register with a symbolic identifier. Use short names, but in some cases (such as "BCR") add "IPA_" to the name to help avoid name conflicts. Create two functions that indicate register validity. The first concisely indicates whether a register is valid for a given version of IPA, and if so, whether it is defined. The second indicates whether a register is valid for TX or RX endpoints. Signed-off-by:
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Kees Cook authored
To work around a misbehavior of the compiler's ability to see into composite flexible array structs (as detailed in the coming memcpy() hardening series[1]), split the memcpy() of the header and the payload so no false positive run-time overflow warning will be generated. [1] https://lore.kernel.org/linux-hardening/20220901065914.1417829-2-keescook@chromium.org/ Cc: Wenjia Zhang <wenjia@linux.ibm.com> Cc: Heiko Carstens <hca@linux.ibm.com> Cc: Vasily Gorbik <gor@linux.ibm.com> Cc: Alexander Gordeev <agordeev@linux.ibm.com> Cc: Christian Borntraeger <borntraeger@linux.ibm.com> Cc: Sven Schnelle <svens@linux.ibm.com> Signed-off-by:
Alexandra Winter <wintera@linux.ibm.com> Link: https://lore.kernel.org/r/20220927003953.1942442-1-keescook@chromium.orgSigned-off-by:
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Donald Hunter authored
Enumerate the skb drop reasons in the receive path for IPv6 UDP packets. Signed-off-by:
Donald Hunter <donald.hunter@redhat.com> Link: https://lore.kernel.org/r/20220926120350.14928-1-donald.hunter@gmail.comSigned-off-by:
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Bo Liu authored
Use ida_alloc_xxx()/ida_free() instead of ida_simple_get()/ida_simple_remove(). The latter is deprecated and more verbose. Signed-off-by:
Bo Liu <liubo03@inspur.com> Link: https://lore.kernel.org/r/20220926012744.3363-1-liubo03@inspur.comSigned-off-by:
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Taehee Yoo authored
RFC 6209 describes ARIA for TLS 1.2. ARIA-128-GCM and ARIA-256-GCM are defined in RFC 6209. This patch would offer performance increment and an opportunity for hardware offload. Benchmark results: iperf-ssl are used. CPU: intel i3-12100. TLS(openssl-3.0-dev) [ 3] 0.0- 1.0 sec 185 MBytes 1.55 Gbits/sec [ 3] 1.0- 2.0 sec 186 MBytes 1.56 Gbits/sec [ 3] 2.0- 3.0 sec 186 MBytes 1.56 Gbits/sec [ 3] 3.0- 4.0 sec 186 MBytes 1.56 Gbits/sec [ 3] 4.0- 5.0 sec 186 MBytes 1.56 Gbits/sec [ 3] 0.0- 5.0 sec 927 MBytes 1.56 Gbits/sec kTLS(aria-generic) [ 3] 0.0- 1.0 sec 198 MBytes 1.66 Gbits/sec [ 3] 1.0- 2.0 sec 194 MBytes 1.62 Gbits/sec [ 3] 2.0- 3.0 sec 194 MBytes 1.63 Gbits/sec [ 3] 3.0- 4.0 sec 194 MBytes 1.63 Gbits/sec [ 3] 4.0- 5.0 sec 194 MBytes 1.62 Gbits/sec [ 3] 0.0- 5.0 sec 974 MBytes 1.63 Gbits/sec kTLS(aria-avx wirh GFNI) [ 3] 0.0- 1.0 sec 632 MBytes 5.30 Gbits/sec [ 3] 1.0- 2.0 sec 657 MBytes 5.51 Gbits/sec [ 3] 2.0- 3.0 sec 657 MBytes 5.51 Gbits/sec [ 3] 3.0- 4.0 sec 656 MBytes 5.50 Gbits/sec [ 3] 4.0- 5.0 sec 656 MBytes 5.50 Gbits/sec [ 3] 0.0- 5.0 sec 3.18 GBytes 5.47 Gbits/sec Signed-off-by:
Taehee Yoo <ap420073@gmail.com> Reviewed-by:
Vadim Fedorenko <vfedorenko@novek.ru> Link: https://lore.kernel.org/r/20220925150033.24615-1-ap420073@gmail.comSigned-off-by:
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Bhupesh Sharma authored
Minor spell fix related to 'stmmac_clk_csr_set()' inside a comment used in the 'stmmac_probe_config_dt()' function. Cc: Biao Huang <biao.huang@mediatek.com> Signed-off-by:
Bhupesh Sharma <bhupesh.sharma@linaro.org> Link: https://lore.kernel.org/r/20220924104514.1666947-1-bhupesh.sharma@linaro.orgSigned-off-by:
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- 27 Sep, 2022 2 commits
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Pavel Begunkov authored
d8b6171b ("selftests/io_uring: test zerocopy send") added io_uring zerocopy tests but forgot to enable it in make runs. Add missing io_uring_zerocopy_tx.sh into TEST_PROGS. Signed-off-by:
Pavel Begunkov <asml.silence@gmail.com> Link: https://lore.kernel.org/r/28e743602cdd54ffc49f68bbcbcbafc59ba22dc2.1664142210.git.asml.silence@gmail.comSigned-off-by:
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Jakub Kicinski authored
Jiri Pirko says: ==================== devlink: fix order of port and netdev register in drivers Some of the drivers use wrong order in registering devlink port and netdev, registering netdev first. That was not intended as the devlink port is some sort of parent for the netdev. Fix the ordering. Note that the follow-up patchset is going to make this ordering mandatory. ==================== Link: https://lore.kernel.org/r/20220926110938.2800005-1-jiri@resnulli.usSigned-off-by:
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