- 27 Mar, 2024 1 commit
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Ravi Kumar Vodapalli authored
New PCI IDs are added in Bspec for DG2 platform, add them in driver Bspec: 44477 Signed-off-by:
Ravi Kumar Vodapalli <ravi.kumar.vodapalli@intel.com> Reviewed-by:
Matt Roper <matthew.d.roper@intel.com> Signed-off-by:
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- 26 Mar, 2024 7 commits
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Lucas De Marchi authored
drivers/gpu/drm/i915/gt/intel_workarounds.c.rej was incorrectly added to the tree after solving a conflict. Remove it. Fixes: 326e30e4 ("drm/i915: Drop dead code for pvc") Reported-by:
Stephen Rothwell <sfr@canb.auug.org.au> Closes: https://lore.kernel.org/r/20240325083435.4f970eec@canb.auug.org.au Cc: Jani Nikula <jani.nikula@linux.intel.com> Reviewed-by:
Jani Nikula <jani.nikula@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20240325144728.537855-1-lucas.demarchi@intel.comSigned-off-by:
Lucas De Marchi <lucas.demarchi@intel.com>
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Gareth Yu authored
Historically the expectation was to set brightness to max on enable, if it was zero. However, the policy should be to preserve brightness across disable/enable, for example the userspace might want to dim the brightness before disable (e.g. on suspend) and gradually bring it back up after enable (e.g. on resume). If the brightness gets bumped to max at enable, this causes flicker as the userspace expects the brightness to have been preserved across disable/enable. For example: (suspend) [53949.248875] i915 0000:00:02.0: [drm:intel_edp_backlight_off] [53949.452046] i915 0000:00:02.0: [drm:intel_backlight_set_pwm_level] set backlight PWM = 0 (wakeup) [53986.067356] i915 0000:00:02.0: [drm:intel_edp_backlight_on] [53986.067367] i915 0000:00:02.0: [drm:intel_backlight_enable] pipe A [53986.067476] i915 0000:00:02.0: [drm:intel_backlight_set_pwm_level] set backlight PWM = 96000 [53986.119766] backlight intel_backlight: PM: calling backlight_resume+0x0/0x7a @ 4916, parent: card0-eDP-1 [53986.119781] backlight intel_backlight: PM: backlight_resume+0x0/0x7a returned 0 after 0 usecs [53986.220068] [drm:intel_backlight_device_update_status] updating intel_backlight, brightness=26321/96000 [53986.220086] i915 0000:00:02.0: [drm:intel_panel_actually_set_backlight] set backlight level = 27961 Reduce the check to respecting the minimum brightness, and avoid bumping min brightness to max on enable. Note: It's possible there's still userspace out there that relies on the old behaviour. It would be unfortunate, but there's really only one way to find out. Cc: Tejas Upadhyay <tejaskumarx.surendrakumar.upadhyay@intel.com> Cc: Matt Roper <matthew.d.roper@intel.com> Cc: Ville Syrjälä <ville.syrjala@linux.intel.com> Signed-off-by:
Gareth Yu <gareth.yu@intel.com> Reviewed-by:
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Ville Syrjälä authored
When we have no VBT we currently assume ports A-F are all pontially valid for every platform. That is nonsense. Grab the bitmask of valid ports from the runtime info instead. Although the defaults we actually fill here look semi-sensible only for hsw-skl era hardware. Dunno if we should try to do something more appropriate here for other platforms, or just try to nuke the whole thing? Signed-off-by:
Ville Syrjälä <ville.syrjala@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20240319092443.15769-2-ville.syrjala@linux.intel.comReviewed-by:
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Ville Syrjälä authored
If we have no VBT, or the VBT didn't declare the encoder in question, we won't have the 'devdata' for the encoder. Instead of oopsing just bail early. We won't be able to tell whether the port is DP++ or not, but so be it. Cc: stable@vger.kernel.org Closes: https://gitlab.freedesktop.org/drm/intel/-/issues/10464Signed-off-by:
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Ville Syrjälä authored
Calling i915_gem_object_get_dma_address() from the vblank evade critical section triggers might_sleep(). While we know that we've already pinned the framebuffer and thus i915_gem_object_get_dma_address() will in fact not sleep in this case, it seems reasonable to keep the unconditional might_sleep() for maximum coverage. So let's instead pre-populate the dma address during fb pinning, which all happens before we enter the vblank evade critical section. We can use u32 for the dma address as this class of hardware doesn't support >32bit addresses. Cc: stable@vger.kernel.org Fixes: 0225a909 ("drm/i915: Make cursor plane registers unlocked") Reported-by:
Borislav Petkov <bp@alien8.de> Closes: https://lore.kernel.org/intel-gfx/20240227100342.GAZd2zfmYcPS_SndtO@fat_crate.local/Signed-off-by:
Chaitanya Kumar Borah <chaitanya.kumar.borah@intel.com>
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Jani Nikula authored
Prefer the intel_de_wait*() functions over the uncore interface. Signed-off-by:
Gustavo Sousa <gustavo.sousa@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20240320160123.2904609-2-jani.nikula@intel.com
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Jani Nikula authored
Do some renames on the register wait functions for clarity and brevity: intel_de_wait_for_register -> intel_de_wait intel_de_wait_for_register_fw -> intel_de_wait_fw __intel_de_wait_for_register -> intel_de_wait_custom In particular, it seemed odd to have a double-underscored function be called in a number of places. Signed-off-by:
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- 22 Mar, 2024 11 commits
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Lucas De Marchi authored
With both XEHPSDV and PVC removed (as platforms, most of their code remain used by others), there's no need to handle !RCS_MASK() as other platforms don't ever have fused-off render. Remove those code paths and the special WA flag when initializing GuC. Reviewed-by:
Tvrtko Ursulin <tursulin@ursulin.net> Link: https://patchwork.freedesktop.org/patch/msgid/20240320060543.4034215-7-lucas.demarchi@intel.comSigned-off-by:
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Lucas De Marchi authored
PCI IDs for PVC were never added and platform always marked with force_probe. Drop what's not used and rename some places as needed. The registers not used anymore are also removed. Reviewed-by:
Rodrigo Vivi <rodrigo.vivi@intel.com> Acked-by:
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Lucas De Marchi authored
With no platform using graphics/media IP_VER(12, 50), replace the checks throughout the code with IP_VER(12, 55) so the code makes sense by itself with no additional explanation of previous baggage. Reviewed-by:
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Lucas De Marchi authored
All the platforms that inherit the media/graphics version from XE_HPM_FEATURES / XE_HP_FEATURES just override it to another version. Just set the version directly in the respective struct and remove the versions from the _FEATURES macros. Since that was the only use for XE_HPM_FEATURES, remove it completely. Reviewed-by:
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Lucas De Marchi authored
Now that DG2 is the only user of this forcewake table, remove the macro and use FORCEWAKE_RENDER explicitly for range 0xd800 - 0xd87f. Suggested-by:
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Lucas De Marchi authored
PCI IDs for XEHPSDV were never added and platform always marked with force_probe. Drop what's not used and rename some places to either be xehp or dg2, depending on the platform/IP checks. The registers not used anymore are also removed. Reviewed-by:
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Ville Syrjälä authored
Add the missing BDB version number information for some of the backlight fields in VBT. Signed-off-by:
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Ville Syrjälä authored
The VBT backlight entries include various fields for i2c controlled backlights. These have been obsoleted at some unknown point in time, but let's define them anyway so that we have a full picture of what has been in there. Signed-off-by:
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Ville Syrjälä authored
According to some VBIOS sources the LFP power block used to have a single bit for DPST support. In version 159 that bit got moved into the driver features block, and then in version 228 back into the LFP power block (but this time as a per-panel thing). We have definitions for the last two, but not the original bit. Define it as well. Signed-off-by:
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Ville Syrjälä authored
While the spec does claim that most of the driver feature flags start from BDB version 165, reality and some VBIOS code disagrees. The VBIOS code says it starts from version 159, and my ILK with version 162 definitely has these things already in its VBT. Update the version number comments to say 159+ for all the bits that seem relevant for pre-hsw hardware. Signed-off-by:
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Ville Syrjälä authored
We've misspelled the VBT DFPS (dynamic frames per second) field as DPFS. Fix it. Signed-off-by:
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- 21 Mar, 2024 14 commits
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José Roberto de Souza authored
It is misleading, if the intention was to also print something in case it succeed it should have a different string. Cc: Alan Previn <alan.previn.teres.alexis@intel.com> Signed-off-by:
José Roberto de Souza <jose.souza@intel.com> Fixes: 698e19da ("drm/i915: Skip pxp init if gt is wedged") Reviewed-by:
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Jani Nikula authored
The encoder is a much more useful thing to pass around than the i915 and port combo. Also drive-by clean up some cases where both i915 and encoder are passed; only the latter is needed. Reviewed-by:
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Jani Nikula authored
The intel_is_c10phy() is now unused. Remove. Reviewed-by:
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Jani Nikula authored
Wherever possible, replace the port/phy based functions with the encoder based functions: intel_is_c10phy() -> intel_encoder_is_c10phy() intel_phy_is_combo() -> intel_encoder_is_combo() intel_phy_is_tc() -> intel_encoder_is_tc() intel_port_to_phy() -> intel_encoder_to_phy() intel_port_to_tc() -> intel_encoder_to_tc() Reviewed-by:
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Jani Nikula authored
Add a number of encoder based functions to check if the port/phy of the encoder is of a certain type, or to convert to phy or tc_port. Initially these are just wrappers around the existing functions, but they can be improved to use VBT data or use some cached info in the future. Reviewed-by:
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Jani Nikula authored
Pass encoder to intel_snps_phy_update_psr_power_state(). The encoder will be more helpful than just port in the subsequent changes. Reviewed-by:
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Jani Nikula authored
Pass encoder to intel_wait_ddi_buf_active(). The encoder will be more helpful than just port in the subsequent changes. Reviewed-by:
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Jani Nikula authored
Pass encoder to the _port_to_ddc_pin() functions, and rename to _encoder_to_ddc_pin(). The encoder will be more helpful than just port in the subsequent changes. Reviewed-by:
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Jani Nikula authored
If the sink supports 128b/132b and single-stream sideband messaging, enable MST mode. With this, the topology manager will still write DP_MSTM_CTRL, which should be ignored by the sink. In the future, the topology manager should probably only set the sideband messaging related parts of the register. Cc: Arun R Murthy <arun.r.murthy@intel.com> Cc: Ville Syrjälä <ville.syrjala@linux.intel.com> Reviewed-by:
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Jani Nikula authored
Abstract the MST mode disconnect to a separate function. Cc: Arun R Murthy <arun.r.murthy@intel.com> Cc: Ville Syrjälä <ville.syrjala@linux.intel.com> Reviewed-by:
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Jani Nikula authored
Drop the duplicate read of DP_MSTM_CAP DPCD register, and the duplicate logic for choosing MST mode, and store the chosen mode in struct intel_dp. Rename intel_dp_configure_mst() to intel_dp_mst_configure() while at it. v2: Rebase on drm_dp_mst_detect() returning the mode, not bool Cc: Arun R Murthy <arun.r.murthy@intel.com> Cc: Ville Syrjälä <ville.syrjala@linux.intel.com> Reviewed-by:
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Jani Nikula authored
Clarify the conditions for choosing the MST mode to use by adding a new function intel_dp_mst_mode_choose(). This also prepares for being able to extend the MST modes to single-stream sideband messaging. Cc: Arun R Murthy <arun.r.murthy@intel.com> Cc: Ville Syrjälä <ville.syrjala@linux.intel.com> Reviewed-by:
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Jani Nikula authored
Rename intel_dp_can_mst() to intel_dp_mst_detect(), and move all DP MST detect debug logging there. Debug log the sink's MST capability, including single-stream sideband messaging support, and the decision whether to enable MST mode or not. Do this regardless of whether we're actually enabling MST or not. We need to detect MST in intel_dp_detect_dpcd() before the earlier returns, but try not to change the logic otherwise. v2: - Use "MST", "SST w/ sideband messaging", and "SST" for logging (Ville) - Return MST mode from intel_dp_mst_detect() - Do MST detect before early returns from intel_dp_detect_dpcd() Cc: Arun R Murthy <arun.r.murthy@intel.com> Cc: Ville Syrjälä <ville.syrjala@linux.intel.com> Reviewed-by:
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Jani Nikula authored
Amend drm_dp_read_mst_cap() to return an enum, indicating "SST", "SST with sideband messaging", or "MST". Modify all call sites to take the new return value into account. v2: - Rename enumerators (Ville) Cc: Arun R Murthy <arun.r.murthy@intel.com> Cc: Ville Syrjälä <ville.syrjala@linux.intel.com> Cc: Karol Herbst <kherbst@redhat.com> Cc: Lyude Paul <lyude@redhat.com> Cc: Danilo Krummrich <dakr@redhat.com> Reviewed-by:
Maxime Ripard <mripard@kernel.org> Acked-by:
Danilo Krummrich <dakr@redhat.com> Link: https://patchwork.freedesktop.org/patch/msgid/b32a3704934871a67d06420b760e148b76c5ced8.1710839496.git.jani.nikula@intel.comSigned-off-by:
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- 20 Mar, 2024 2 commits
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Ville Syrjälä authored
Our definitions for bit 7 and bit 0 of ICL_PORT_TX_DW6 are swapped. Functionally it doesn't matter as we always set both bits, but let's rename the bits to match bspec 100%. And while at it, add the definition for bits 1-6 as well, just to have it all fully documented. Signed-off-by:
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Ankit Nautiyal authored
For Earlier platforms, the Pipe source size is 12-bits so max pipe source width and height is 4096. For newer platforms it is 13-bits so theoretically max width/height is 8192. For few of the earlier platforms the scaler did not use all bits of the PIPESRC, so max scaler source size was used to make that the pipe source size is programmed within limits, before using scaler. This creates a problem, for MTL where scaler source size is 4096, but max pipe source width can theroretically be 8192. Switch the check to use the max scaler destination size, which closely match the limits. Signed-off-by:
Ankit Nautiyal <ankit.k.nautiyal@intel.com> Reviewed-by:
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- 19 Mar, 2024 1 commit
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Joonas Lahtinen authored
Add standalone includes for BUG_ON and BUILD_BUG_ON to avoid build failure after linux-next include refactoring. Signed-off-by:
Joonas Lahtinen <joonas.lahtinen@linux.intel.com> Cc: Chris Wilson <chris.p.wilson@linux.intel.com> Cc: Jani Nikula <jani.nikula@linux.intel.com> Cc: Rodrigo Vivi <rodrigo.vivi@intel.com> Cc: Tvrtko Ursulin <tursulin@ursulin.net> Reviewed-by:
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- 18 Mar, 2024 1 commit
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Jonathon Hall authored
Since commit 0c65dc06 ("drm/i915/jsl: s/JSL/JASPERLAKE for platform/subplatform defines"), boot freezes on a Jasper Lake tablet (Librem 11), usually with graphical corruption on the eDP display, but sometimes just a black screen. This commit was included in 6.6 and later. That commit was intended to refactor EHL and JSL macros, but the change to ehl_combo_pll_div_frac_wa_needed() started matching JSL incorrectly when it was only intended to match EHL. It replaced: return ((IS_PLATFORM(i915, INTEL_ELKHARTLAKE) && IS_JSL_EHL_DISPLAY_STEP(i915, STEP_B0, STEP_FOREVER)) || with: return (((IS_ELKHARTLAKE(i915) || IS_JASPERLAKE(i915)) && IS_DISPLAY_STEP(i915, STEP_B0, STEP_FOREVER)) || Remove IS_JASPERLAKE() to fix the regression. Signed-off-by:
Jonathon Hall <jonathon.hall@puri.sm> Cc: stable@vger.kernel.org Fixes: 0c65dc06 ("drm/i915/jsl: s/JSL/JASPERLAKE for platform/subplatform defines") Reviewed-by:
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- 15 Mar, 2024 3 commits
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Ville Syrjälä authored
Create the drm_printer at the start of intel_pipe_config_compare() and pass it on to all the mismatch() functions. v2: Rebase Reviewed-by:
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Ville Syrjälä authored
Just call pipe_config_mismatch() from all the more specialized mismatch() functions instead of hand rolling the same printfs all over. v2: Eliminate the dpll drm_debug_enabled() in an earlier patch (Jani) Reviewed-by:
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Ville Syrjälä authored
Hoist pipe_config_mismatch() upwards a bit so that it can get reused by the other mismatch() functions. Signed-off-by:
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