- 09 Aug, 2018 40 commits
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David S. Miller authored
Julian Wiedmann says: ==================== s390/qeth: updates 2018-08-09 one more set of patches for net-next. This is all sorts of cleanups and more refactoring on the way to using netdev_priv. Please apply. ==================== Signed-off-by:David S. Miller <davem@davemloft.net>
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Gustavo A. R. Silva authored
Return statements in functions returning bool should use true or false instead of an integer value. This issue was detected with the help of Coccinelle. Signed-off-by:
Gustavo A. R. Silva <gustavo@embeddedor.com> Signed-off-by:
Julian Wiedmann <jwi@linux.ibm.com> Signed-off-by:
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Julian Wiedmann authored
Allocating the main qeth_card struct with GFP_DMA blocks us from moving it into netdev_priv(). But the only reason why we need DMA memory is the ccw1 structs embedded into each ccw channel. So extract those into separate allocations, like we already do for the cmd buffers. Signed-off-by:
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Julian Wiedmann authored
The qeth_card struct is kzalloc-ed, so remove all the redundant 0-initializations. While at it, split up what's left of qeth_determine_card_type(). Signed-off-by:
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Julian Wiedmann authored
The data channel currently doesn't need a setup operation, because we don't use pre-allocated cmd buffers for its IO. But subsequent changes will introduce further setup that also applies to the data channel. This refactors things a bit, so that the new stuff can then be automatically applied to all channels. Signed-off-by:
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Julian Wiedmann authored
Re-work the helper a little bit, so that it can be used for all CCWs that qeth issues. Signed-off-by:
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Julian Wiedmann authored
Where possible use accessor macros and local pointers to access the ccw channels. This makes it less likely to miss a spot. Signed-off-by:
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Julian Wiedmann authored
Just a little code deduplication. Signed-off-by:
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David S. Miller authored
Overlapping changes in RXRPC, changing to ktime_get_seconds() whilst adding some tracepoints. Signed-off-by: -
David S. Miller authored
Jose Abreu says: ==================== Add support for XGMAC2 in stmmac This series adds support for 10Gigabit IP in stmmac. The IP is called XGMAC2 and has many similarities with GMAC4. Due to this, its relatively easy to incorporate this new IP into stmmac driver by adding a new block and filling the necessary callbacks. The functionality added by this series is still reduced but its only a starting point which will later be expanded. I splitted the patches into funcionality and to ease the review. Only the patch 8/9 really enables the XGMAC2 block by adding a new compatible string. Version 4 addresses review comments of Florian Fainelli and Rob Herring. NOTE: Although the IP supports 10G, for now it was only possible to test it at 1G speed due to 10G PHY HW shipping problems. Here follows iperf3 results at 1G: Connecting to host 192.168.0.10, port 5201 [ 4] local 192.168.0.3 port 39178 connected to 192.168.0.10 port 5201 [ ID] Interval Transfer Bandwidth Retr Cwnd [ 4] 0.00-1.00 sec 110 MBytes 920 Mbits/sec 0 482 KBytes [ 4] 1.00-2.00 sec 113 MBytes 946 Mbits/sec 0 482 KBytes [ 4] 2.00-3.00 sec 112 MBytes 937 Mbits/sec 0 482 KBytes [ 4] 3.00-4.00 sec 113 MBytes 946 Mbits/sec 0 482 KBytes [ 4] 4.00-5.00 sec 112 MBytes 935 Mbits/sec 0 482 KBytes [ 4] 5.00-6.00 sec 113 MBytes 946 Mbits/sec 0 482 KBytes [ 4] 6.00-7.00 sec 112 MBytes 937 Mbits/sec 0 482 KBytes [ 4] 7.00-8.00 sec 113 MBytes 946 Mbits/sec 0 482 KBytes [ 4] 8.00-9.00 sec 112 MBytes 937 Mbits/sec 0 482 KBytes [ 4] 9.00-10.00 sec 113 MBytes 946 Mbits/sec 0 482 KBytes - - - - - - - - - - - - - - - - - - - - - - - - - [ ID] Interval Transfer Bandwidth Retr [ 4] 0.00-10.00 sec 1.09 GBytes 940 Mbits/sec 0 sender [ 4] 0.00-10.00 sec 1.09 GBytes 938 Mbits/sec receiver ==================== Signed-off-by: -
Jose Abreu authored
Adds the documentation for XGMAC2 DT bindings. Signed-off-by:
Jose Abreu <joabreu@synopsys.com> Cc: David S. Miller <davem@davemloft.net> Cc: Joao Pinto <jpinto@synopsys.com> Cc: Giuseppe Cavallaro <peppe.cavallaro@st.com> Cc: Alexandre Torgue <alexandre.torgue@st.com> Cc: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com> Cc: devicetree@vger.kernel.org Cc: Rob Herring <robh+dt@kernel.org> Signed-off-by:
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Jose Abreu authored
Add the bindings parsing for XGMAC2 IP block. Signed-off-by:
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Jose Abreu authored
Now that we have all the XGMAC related callbacks, lets start integrating this IP block into main driver. Also, we corrected the initialization flow to only start DMA after setting descriptors length. Signed-off-by:
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Jose Abreu authored
XGMAC2 uses the same engine of timestamping as GMAC4. Let's use the same callbacks. Signed-off-by:
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Jose Abreu authored
Add the MDIO related funcionalities for the new IP block XGMAC2. Signed-off-by:
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Jose Abreu authored
Add the descriptor related callbacks for the new IP block XGMAC2. Signed-off-by:
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Jose Abreu authored
Add the DMA related callbacks for the new IP block XGMAC2. Signed-off-by:
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Jose Abreu authored
Add the MAC related callbacks for the new IP block XGMAC2. Signed-off-by:
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Jose Abreu authored
Add a new entry to HWIF table for XGMAC 2.10. For now we fill it with empty callbacks which will be added in posterior patches. Signed-off-by:
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David S. Miller authored
Andrew Lunn says: ==================== More complete PHYLINK support for mv88e6xxx Previous patches added sufficient PHYLINK support to the mv88e6xxx that it did not break existing use cases, basically fixed-link phys. This patchset builds out the support so that SFP modules, up to 2.5Gbps can be supported, on mv88e6390X, on ports 9 and 10. It also provides a framework which can be extended to support SFPs on ports 2-8 of mv88e6390X, 10Gbps PHYs, and SFP support on the 6352 family. Russell King did much of the initial work, implementing the validate and mac_link_state calls. However, there is an important TODO in the commit message: needs to call phylink_mac_change() when the port link comes up/goes down. The remaining patches implement this, by adding more support for the SERDES interfaces, in particular, interrupt support so we get notified when the SERDES gains/looses sync. This has been tested on the ZII devel C, using a Clearfog as peer device. ==================== Signed-off-by: -
Andrew Lunn authored
When a port changes CMODE, the SERDES interface being used can change. Disable interrupts for the old SERDES interface, and enable interrupts on the new. Signed-off-by:
Andrew Lunn <andrew@lunn.ch> Signed-off-by:
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Andrew Lunn authored
phylink wants to know when the MAC layers notices a change in the link. For the 6390 family, this is a change in the SERDES state. Add interrupt support for the SERDES interface used to implement SGMII/1000Base-X/2500Base-X. This is currently limited to ports 9 and 10. Support for the 10G SERDES and other ports will be added later, building on this basic framework. Signed-off-by:
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Andrew Lunn authored
An up coming change will register interrupts for individual switch ports, using the mv88e6xxx_port as the interrupt context information. Add members to the mv88e6xxx_port structure so we can link it back to the mv88e6xxx_chip member the port belongs to and the port number of the port. Signed-off-by:
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Andrew Lunn authored
The 6390 family has a number of SERDES interfaces per port. When the cmode changes, eg 1000Base-X to XAUI, the SERDES interface in use will also change. Power down the old SERDES interface and power up the new SERDES interface. Signed-off-by:
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Andrew Lunn authored
The ports CMODE indicates the type of link between the MAC and the PHY. It is used often in the SERDES code. Rather than read it each time, cache its value. Signed-off-by:
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Andrew Lunn authored
The 6390 has three different SERDES interface types. 2500Base-X is implemented by the SGMII/1000Base-X SERDES. So power on/off the correct SERDES. Signed-off-by:
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Andrew Lunn authored
Add a helper for accessing SERDES registers of the 6390 family. Signed-off-by:
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Andrew Lunn authored
There is a need to add more functions manipulating the SERDES interfaces. Cleanup the namespace. Signed-off-by:
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Andrew Lunn authored
The 6390 has two SERDES interfaces, used by ports 9 and 10. The 6390X has eight SERDES interfaces. These allow ports 9 and 10 to do 10G. Or if lower speeds are used, some of the SERDES interfaces can be used by ports 2-8 for 1000Base-X. Signed-off-by:
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Andrew Lunn authored
The 6390 family has 8 SERDES lanes. What ports use these lanes depends on how ports 9 and 10 are configured. If 9 and 10 does not make use of a line, one of the lower ports can use it. Add a function to return the lane a port is using, if any, and simplify the code to power up/down the lane. Signed-off-by:
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Russell King authored
Add rudimentary phylink support to mv88e6xxx. TODO: - needs to call phylink_mac_change() when the port link comes up/goes down. Signed-off-by:
Russell King <rmk+kernel@armlinux.org.uk> Signed-off-by:
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Russell King authored
Add a helper for MAC drivers to use in their validate callback to deal with 2500BaseX vs 1000BaseX modes, where the hardware supports both but it is not possible to automatically select between them. This helper defaults to 1000BaseX, as that is the 802.3 standard, and will allow users to select 2500BaseX either by forcing the speed if AN is disabled, or by changing the advertising mask if AN is enabled. Disabling AN is not recommended as it is only the speed that we're interested in controlling, not the duplex or pause mode parameters. Signed-off-by:
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Andrew Lunn authored
The 6185 can enable/disable 802.3z pause be setting the MyPause bit in the port status register. Add an op to support this. Signed-off-by:
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David S. Miller authored
Ido Schimmel says: ==================== mlxsw: Various updates Patches 1-3 update the driver to use a new firmware version. Due to a recently discovered issue, the version (and future ones) does not support matching on VLAN ID at egress. This is enforced in the driver and reported back to the user via extack. Patch 4 adds a new selftest for the recently introduced algorithmic TCAM. Patch 5 converts the driver to use SPDX identifiers. Patches 6-7 fix a bug in ethtool stats reporting and expose counters for all 16 TCs, following recent MC-aware changes that utilize TCs 8-15. ==================== Signed-off-by: -
Petr Machata authored
Before MC-aware mode was enabled in commit 7b819530 ("mlxsw: spectrum: Configure MC-aware mode on mlxsw ports"), only 8 traffic classes were used. Under MC-aware regime, however, besides using TCs 0-7 for UC traffic, it additionally uses TCs 8-15 for BUM traffic. It is therefore desirable to show counters for these TCs as well. Update ethtool stats pool length, mlxsw_sp_port_get_strings() and mlxsw_sp_port_get_stats() to include artifacts for all 16 TCs. For consistency and simplicity, expose tc_no_buffer_discard_uc_tc for BUM TCs as well, even though it ought to stay at 0 all the time. Signed-off-by:
Petr Machata <petrm@mellanox.com> Signed-off-by:
Ido Schimmel <idosch@mellanox.com> Signed-off-by:
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Petr Machata authored
The function mlxsw_sp_port_get_sset_count() is supposed to return the total number of ethtool strings that mlxsw supports. Specifically for names of statistic counters (the only string type that mlxsw supports as of now), that number is stored in MLXSW_SP_PORT_ETHTOOL_STATS_LEN. However, when adding RFC-2891 counters, that define wasn't updated to include the new counters. As a result, ethtool snips out the counters towards the end of the list, which contains per-TC counters, and only the first three traffic classes end up being reported. Fix by adding MLXSW_SP_PORT_HW_RFC_2819_STATS_LEN as appropriate. Fixes: 1222d15a ("mlxsw: spectrum: Expose counters for various packet sizes") Signed-off-by:
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Jiri Pirko authored
Signed-off-by:
Jiri Pirko <jiri@mellanox.com> Signed-off-by:
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Ido Schimmel authored
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Jiri Pirko authored
Recent FW fixes a bug and allows to load newly flashed FW image after reset. So make sure the reset happens after flash. Indicate the need down to PCI layer by -EAGAIN. Signed-off-by:
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Nir Dotan authored
This new firmware contains: - Support for new types of cables - Support for flashing future firmware without reboot - Support for Router ARP BC and UC traps Signed-off-by:Nir Dotan <nird@mellanox.com> Acked-by:
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