- 30 Aug, 2013 40 commits
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Jingoo Han authored
These local symbols are used only in this file. Fix the following sparse warnings: drivers/mtd/nand/r852.c:232:6: warning: symbol 'r852_write_buf' was not declared. Should it be static? drivers/mtd/nand/r852.c:264:6: warning: symbol 'r852_read_buf' was not declared. Should it be static? drivers/mtd/nand/r852.c:315:6: warning: symbol 'r852_cmdctl' was not declared. Should it be static? drivers/mtd/nand/r852.c:360:5: warning: symbol 'r852_wait' was not declared. Should it be static? drivers/mtd/nand/r852.c:389:5: warning: symbol 'r852_ready' was not declared. Should it be static? drivers/mtd/nand/r852.c:400:6: warning: symbol 'r852_ecc_hwctl' was not declared. Should it be static? drivers/mtd/nand/r852.c:432:5: warning: symbol 'r852_ecc_calculate' was not declared. Should it be static? drivers/mtd/nand/r852.c:464:5: warning: symbol 'r852_ecc_correct' was not declared. Should it be static? drivers/mtd/nand/r852.c:532:6: warning: symbol 'r852_engine_enable' was not declared. Should it be static? drivers/mtd/nand/r852.c:550:6: warning: symbol 'r852_engine_disable' was not declared. Should it be static? drivers/mtd/nand/r852.c:560:6: warning: symbol 'r852_card_update_present' was not declared. Should it be static? drivers/mtd/nand/r852.c:575:6: warning: symbol 'r852_update_card_detect' was not declared. Should it be static? drivers/mtd/nand/r852.c:589:9: warning: symbol 'r852_media_type_show' was not declared. Should it be static? drivers/mtd/nand/r852.c:600:1: warning: symbol 'dev_attr_media_type' was not declared. Should it be static? drivers/mtd/nand/r852.c:604:6: warning: symbol 'r852_update_media_status' was not declared. Should it be static? drivers/mtd/nand/r852.c:633:5: warning: symbol 'r852_register_nand_device' was not declared. Should it be static? drivers/mtd/nand/r852.c:671:6: warning: symbol 'r852_unregister_nand_device' was not declared. Should it be static? drivers/mtd/nand/r852.c:685:6: warning: symbol 'r852_card_detect_work' was not declared. Should it be static? drivers/mtd/nand/r852.c:824:6: warning: symbol 'r852_probe' was not declared. Should it be static? drivers/mtd/nand/r852.c:964:6: warning: symbol 'r852_remove' was not declared. Should it be static? drivers/mtd/nand/r852.c:995:6: warning: symbol 'r852_shutdown' was not declared. Should it be static? Signed-off-by: Jingoo Han <jg1.han@samsung.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
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Jingoo Han authored
These local symbols are used only in this file. Fix the following sparse warnings: drivers/mtd/nand/nandsim.c:1436:5: warning: symbol 'do_read_error' was not declared. Should it be static? drivers/mtd/nand/nandsim.c:1448:6: warning: symbol 'do_bit_flips' was not declared. Should it be static? Signed-off-by: Jingoo Han <jg1.han@samsung.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
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Jingoo Han authored
Added missing __iomem annotation and used NULL instead of 0 in order to fix the following sparse warnings: drivers/mtd/maps/impa7.c:82:32: warning: Using plain integer as NULL pointer drivers/mtd/maps/impa7.c:96:34: warning: cast removes address space of expression drivers/mtd/maps/impa7.c:96:34: warning: incorrect type in argument 1 (different address spaces) drivers/mtd/maps/impa7.c:96:34: expected void volatile [noderef] <asn:2>*addr drivers/mtd/maps/impa7.c:96:34: got void *<noident> drivers/mtd/maps/impa7.c:108:34: warning: cast removes address space of expression drivers/mtd/maps/impa7.c:108:34: warning: incorrect type in argument 1 (different address spaces) drivers/mtd/maps/impa7.c:108:34: expected void volatile [noderef] <asn:2>*addr drivers/mtd/maps/impa7.c:108:34: got void *<noident> drivers/mtd/maps/impa7.c:109:45: warning: Using plain integer as NULL pointer Signed-off-by: Jingoo Han <jg1.han@samsung.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
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Jingoo Han authored
These local symbols are used only in this file. Fix the following sparse warnings: drivers/mtd/sm_ftl.c:25:25: warning: symbol 'cache_flush_workqueue' was not declared. Should it be static? drivers/mtd/sm_ftl.c:44:9: warning: symbol 'sm_attr_show' was not declared. Should it be static? drivers/mtd/sm_ftl.c:57:24: warning: symbol 'sm_create_sysfs_attributes' was not declared. Should it be static? drivers/mtd/sm_ftl.c:110:6: warning: symbol 'sm_delete_sysfs_attributes' was not declared. Should it be static? drivers/mtd/sm_ftl.c:574:5: warning: symbol 'sm_get_media_info' was not declared. Should it be static? drivers/mtd/sm_ftl.c:881:17: warning: symbol 'sm_get_zone' was not declared. Should it be static? drivers/mtd/sm_ftl.c:902:6: warning: symbol 'sm_cache_init' was not declared. Should it be static? drivers/mtd/sm_ftl.c:912:6: warning: symbol 'sm_cache_put' was not declared. Should it be static? drivers/mtd/sm_ftl.c:920:5: warning: symbol 'sm_cache_get' was not declared. Should it be static? drivers/mtd/sm_ftl.c:931:5: warning: symbol 'sm_cache_flush' was not declared. Should it be static? Signed-off-by: Jingoo Han <jg1.han@samsung.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
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Markus Niebel authored
This adds support for the Everspin mr25h10 MRAM chip to the m25p80 driver. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Acked-by: Marek Vasut <marex@denx.de> Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
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Sascha Hauer authored
This patch adds a flag to struct flash_info indicating that fast_read is not supported. This now gives the following logic when determing whether to enable fastread: If the flash chip does not support fast_read, then disable it. Otherwise: 1) enable fast_read if device node contains m25p,fast-read 2) enable fast_read if forced in Kconfig This makes enabling CONFIG_M25PXX_USE_FAST_READ a safe option since we no longer enable the fast_read option unconditionally. For now fast_read is disabled for the everspin mr25h256 and the catalyst devices. Others may need the flag aswell. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Acked-by: Marek Vasut <marex@denx.de> Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
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Sascha Hauer authored
The flags may have to be overwritten, so add them to the CAT25_INFO macro. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Acked-by: Marek Vasut <marex@denx.de> Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
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Sascha Hauer authored
of_property_read_bool properly compiles away, no need to ifdef this for non DT builds. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Acked-by: Marek Vasut <marex@denx.de> Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
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Geert Uytterhoeven authored
If NO_DMA=y: drivers/built-in.o: In function `denali_remove': drivers/mtd/nand/denali.c:1605: undefined reference to `dma_unmap_single' drivers/built-in.o: In function `denali_read_page_raw': drivers/mtd/nand/denali.c:1190: undefined reference to `dma_sync_single_for_cpu' drivers/built-in.o: In function `denali_read_page': drivers/mtd/nand/denali.c:1140: undefined reference to `dma_sync_single_for_cpu' drivers/built-in.o: In function `write_page': drivers/mtd/nand/denali.c:1051: undefined reference to `dma_sync_single_for_cpu' drivers/built-in.o: In function `denali_init': drivers/mtd/nand/denali.c:1433: undefined reference to `dma_set_mask' drivers/mtd/nand/denali.c:1438: undefined reference to `dma_map_single' drivers/mtd/nand/denali.c:1442: undefined reference to `dma_mapping_error' Signed-off-by: Geert Uytterhoeven <geert@linux-m68k.org> Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
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Julia Lawall authored
Remove unneeded error handling on the result of a call to platform_get_resource_byname when the value is passed to devm_ioremap_resource. A simplified version of the semantic patch that makes this change is as follows: (http://coccinelle.lip6.fr/) // <smpl> @@ expression pdev,res,e,e1; expression ret != 0; identifier l; @@ res = platform_get_resource_byname(...); - if (res == NULL) { ... \(goto l;\|return ret;\) } e = devm_ioremap_resource(e1, res); // </smpl> Signed-off-by: Julia Lawall <Julia.Lawall@lip6.fr> Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
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Josh Wu authored
The PMECC use BCH algorithm to correct error. In BCH algorithm, the primitive polynomial value is GF(2^13) for 512-bytes sector size. And it is GF(2^14) for 1024-bytes sector size. This patch will choose correct degree of the remainders (13 or 14) for different sector size. Tested in AT91SAM9X5-EK with MLC nand flash. More detail can be found in §5.4.1 of: AT91SAM ARM-based Embedded MPU Application Note <http://www.atmel.com/Images/doc11127.pdf> Signed-off-by: Josh Wu <josh.wu@atmel.com> Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
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Brian Norris authored
For SPI NOR flash that are larger than 128Mbit (16MiB), we need 4 bytes of address space to reach the entire flash; however, the original SPI flash protocol used only 3 bytes for the address. So far, the practice for handling this has been either to use new command opcodes that are defined to use 4 bytes for their address, or to use special mode-switching command to configure all traditionally-3-byte-address commands to take 4 bytes instead. Macronix and Spansion developed two incompatible methods for entering/exiting "4-byte address mode." Micron flash uses the Macronix method (OPCODE_{EN4B,EX4B}), not the Spansion method. This patch solves addressing issues on Micron n25q256a and provides the ability to support other future Micron SPI flash >16MiB. Quoting a Micron representative: "Majority of our NOR that needs 4-byte addressing (256Mb or 32MB and higher) enter and exit 4byte through B7h and E9h commands. The N25Q256A7xxx and N25Q512A7xxx parts do not support 4-byte addressing mode via B7h or E9h command." They further clarified that those that don't support the enter/exit opcodes (B7h/E9h) are manufactured specifically to come up by default in 4-byte mode. We don't need to treat those parts any diffently, as they will discard the EN4B opcode as a no-op. Signed-off-by: Brian Norris <computersforpeace@gmail.com> Acked-by: Marek Vasut <marex@denx.de> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
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Brian Norris authored
First, the function argument is 'offset' not 'column'. Second, the 'data_buf' name is inconsistent with the rest of this file. Just use 'buf'. Signed-off-by: Brian Norris <computersforpeace@gmail.com> Cc: Gupta, Pekon <pekon@ti.com> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
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Huang Shijie authored
We add a new sys node for ecc step size. So update the ABI document about it. Signed-off-by: Huang Shijie <b32955@freescale.com> Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com> [Brian: edited description, modified 'ecc_strength'] Signed-off-by: Brian Norris <computersforpeace@gmail.com> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
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Huang Shijie authored
In order to make the nand_scan() work, the current code uses the hack code to init the @nand_chip->ecc.size and the @nand_chip->ecc.strength. and re-init some the ECC info in the gpmi_pre_bbt_scan(). This code is really a little ugly. The patch does following changes: (1) Use the nand_scan_ident()/nand_scan_tail() to replace the nand_scan(). (2) Init all the necessary values in the gpmi_init_last() before we call the nand_scan_tail(). (3) remove the code setting the ECC info, let the mtd layer to do the real job. (4) remove the gpmi_scan_bbt(). we do not need this function any more. Signed-off-by: Huang Shijie <b32955@freescale.com> Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
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Huang Shijie authored
We may do some ONFI get/set features operations before we call the nand_scan_tail(). So move the default ONFI nand hooks into nand_set_defaults(). Signed-off-by: Huang Shijie <b32955@freescale.com> Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
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Huang Shijie authored
Set the ecc step size for master/slave mtd_info{}. Signed-off-by: Huang Shijie <b32955@freescale.com> Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
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Huang Shijie authored
Add a new sys node to show the ecc step size. The application then can uses this node to get the ecc step size. Signed-off-by: Huang Shijie <b32955@freescale.com> Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
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Huang Shijie authored
In order to implement the NAND boot for some Freescale's chips, such as imx23/imx28/imx50/imx6, we use a tool (called kobs-ng) to burn the uboot and some metadata to nand chip. And the ROM code will use the metadata to configrate the BCH, and to find the uboot. The ECC information(ecc step size, ecc strength) which is used to configrure the BCH is part of the metadata. The kobs-ng can get the ecc strength from the sys node /sys/*/ecc_strength now. But it can not get the ecc step size. This patch adds a new field to store the ecc step size in mtd_info{}, and it makes preparation for the next patches. Signed-off-by: Huang Shijie <b32955@freescale.com> Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
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Dan Carpenter authored
There are static checkers which complain when we declare variables as 64 bit bitfields but only use the lower 32 bits because of shift wrapping. In this case "len" is declared as u64 as opposed to unsigned long or something which might be 32 bits. Signed-off-by: Dan Carpenter <dan.carpenter@oracle.com> Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
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Julia Lawall authored
Remove unneeded error handling on the result of a call to platform_get_resource when the value is passed to devm_ioremap_resource. Move the call to platform_get_resource adjacent to the call to devm_ioremap_resource to make the connection between them more clear. A simplified version of the semantic patch that makes this change is as follows: (http://coccinelle.lip6.fr/) // <smpl> @@ expression pdev,res,n,e,e1; expression ret != 0; identifier l; @@ - res = platform_get_resource(pdev, IORESOURCE_MEM, n); ... when != res - if (res == NULL) { ... \(goto l;\|return ret;\) } ... when != res + res = platform_get_resource(pdev, IORESOURCE_MEM, n); e = devm_ioremap_resource(e1, res); // </smpl> Signed-off-by: Julia Lawall <Julia.Lawall@lip6.fr> Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
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Dan Carpenter authored
The create_freezable_workqueue() returns a NULL on error, it doesn't return an ERR_PTR. Signed-off-by: Dan Carpenter <dan.carpenter@oracle.com> Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
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Akinobu Mita authored
All callers of mtdtest_write() print the same error message on failure. This incorporates the error message to mtdtest_write() and removes them from the callers. Signed-off-by: Akinobu Mita <akinobu.mita@gmail.com> Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
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Akinobu Mita authored
All callers of mtdtest_read() print the same error message on failure. This incorporates the error message to mtdtest_read() and removes them from the callers. Signed-off-by: Akinobu Mita <akinobu.mita@gmail.com> Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
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Ezequiel Garcia authored
The Armada 370 and Armada XP SoC families, selected by PLAT_ORION, have a Nand Flash Controller (NFC) IP very similar to the one present in PXA platforms. Therefore, we want to build this driver on PLAT_ORION. Signed-off-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com> Tested-by: Daniel Mack <zonque@gmail.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
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Ezequiel Garcia authored
When use_dma=0 there's no point in requesting resources for dma, since they won't be used anyway. Therefore we remove that requirement, therefore allowing devices without dma to pass the driver probe. Signed-off-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com> Tested-by: Daniel Mack <zonque@gmail.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
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Ezequiel Garcia authored
Now that we have added ARCH_HAS_DMA conditional the function enable_int() may be unused. Declare it as __maybe_unused, in order to remove the following warning, when the function is not used: drivers/mtd/nand//pxa3xx_nand.c:343:24: warning: 'enable_int' defined but not used [-Wunused-function] Signed-off-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com> Tested-by: Daniel Mack <zonque@gmail.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
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Ezequiel Garcia authored
This patch adds a macro ARCH_HAS_DMA to compile-out arch specific dma code, namely pxa_request_dma() and pxa_free_dma(). These symbols are available only in pxa, which makes impossible to build the driver in other platforms than ARCH_PXA. In order to handle non-dma capable platforms, we implement a fallbacks that allocate buffers as if 'use_dma=false', putting the dma related code under the ARCH_HAS_DMA conditional. Please note that the correct way to handle this is to migrate the dma code to use of the mmp_pdma dmaengine driver. However, currently this is not possible because the two dmaengine drivers can't work together. Signed-off-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com> Tested-by: Daniel Mack <zonque@gmail.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
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Ezequiel Garcia authored
This registers are not per-chip (aka host) but controller-wide, so it's better to store them in the global 'info' structure. Signed-off-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com> Tested-by: Daniel Mack <zonque@gmail.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
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Ezequiel Garcia authored
Use the defined macros for NAND command instead of using a constant internal structure. This commit is only a cleanup, there's no functionality modification. Signed-off-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com> Tested-by: Daniel Mack <zonque@gmail.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
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Ezequiel Garcia authored
There's no advantage in using a hardcoded name for the mtd device. Instead use the provided by the platform_device. Signed-off-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com> Tested-by: Daniel Mack <zonque@gmail.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
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Ezequiel Garcia authored
This is just a cosmetic change, to make the code more readable. Signed-off-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com> Tested-by: Daniel Mack <zonque@gmail.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
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Ezequiel Garcia authored
The ONFI command 'parameter page read' needs a non-standard length. Therefore, we enable the 'length override' field in NDCB0 and set a non-zero 'length count' in NDCB3. Additionally, the 'spare enable' bit must be disabled for any command that sets a non-zero 'length count' in NDCB3. Signed-off-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com> Tested-by: Daniel Mack <zonque@gmail.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
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Ezequiel Garcia authored
Some newer controllers support a fourth command buffer. This additional command buffer allows to set an arbitrary length count, using the NDCB3.NDLENCNT field, to perform non-standard length operations such as the ONFI parameter page read. Signed-off-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com> Tested-by: Daniel Mack <zonque@gmail.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
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Ezequiel Garcia authored
Some commands (such as the ONFI parameter page read) need to clear the 'spare enable' bit. This commit allows to set/clear depending on the prepared command, instead of having it always set. Signed-off-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com> Tested-by: Daniel Mack <zonque@gmail.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
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Ezequiel Garcia authored
When ECC is not selected, the ECC enable bit must be cleared in the NAND control register. Same applies to DMA. Signed-off-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com> Tested-by: Daniel Mack <zonque@gmail.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
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Ezequiel Garcia authored
This driver supports NFCv1 (as found in PXA SoC) and NFCv2 (as found in Armada 370/XP SoC). As both controller has a few differences, a way of distinguishing between the two is needed. This commit introduces a new compatible string 'marvell,armada370-nand' and assigns a compatible data of type enum pxa3xx_nand_variant to allow such distinction. Signed-off-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com> Tested-by: Daniel Mack <zonque@gmail.com> Cc: devicetree@vger.kernel.org Signed-off-by: Brian Norris <computersforpeace@gmail.com> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
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Huang Shijie authored
If the nand chip provides us the ECC info, we can use it firstly. The set_geometry_by_ecc_info() will use the ECC info, and calculate the parameters we need. Rename the old code to legacy_set_geometry() which will takes effect when there is no ECC info from the nand chip or we fails in the ECC info case. Signed-off-by: Huang Shijie <b32955@freescale.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
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Huang Shijie authored
Add the ecc info for TC58NVG2S0F, TC58NVG3S0F, TC58NVG5D2 and TC58NVG6D2. From these chips' datasheets, we know that: The TC58NVG2S0F and TC58NVG3S0F require 4bit ECC for per 512byte. The TC58NVG5D2 and TC58NVG6D2 require 40bits ECC for per 1024byte. Signed-off-by: Huang Shijie <b32955@freescale.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
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Huang Shijie authored
Parse out the ECC information for the full-id nand chips. Signed-off-by: Huang Shijie <b32955@freescale.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
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