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  1. 02 Jul, 2014 1 commit
    • Paolo Bonzini's avatar
      KVM: lapic: sync highest ISR to hardware apic on EOI · 331f2b02
      Paolo Bonzini authored
      commit fc57ac2c upstream.
      
      When Hyper-V enlightenments are in effect, Windows prefers to issue an
      Hyper-V MSR write to issue an EOI rather than an x2apic MSR write.
      The Hyper-V MSR write is not handled by the processor, and besides
      being slower, this also causes bugs with APIC virtualization.  The
      reason is that on EOI the processor will modify the highest in-service
      interrupt (SVI) field of the VMCS, as explained in section 29.1.4 of
      the SDM; every other step in EOI virtualization is already done by
      apic_send_eoi or on VM entry, but this one is missing.
      
      We need to do the same, and be careful not to muck with the isr_count
      and highest_isr_cache fields that are unused when virtual interrupt
      delivery is enabled.
      Reviewed-by: default avatarYang Zhang <yang.z.zhang@intel.com>
      Signed-off-by: default avatarPaolo Bonzini <pbonzini@redhat.com>
      Signed-off-by: default avatarJiri Slaby <jslaby@suse.cz>
      331f2b02
  2. 06 Feb, 2014 2 commits
  3. 09 Jan, 2014 1 commit
  4. 20 Dec, 2013 3 commits
  5. 26 Aug, 2013 1 commit
  6. 25 Jul, 2013 2 commits
  7. 27 Jun, 2013 1 commit
  8. 03 Jun, 2013 1 commit
    • Gleb Natapov's avatar
      KVM: Fix race in apic->pending_events processing · 299018f4
      Gleb Natapov authored
      apic->pending_events processing has a race that may cause INIT and
      SIPI
      processing to be reordered:
      
      vpu0:                            vcpu1:
      set INIT
                                     test_and_clear_bit(KVM_APIC_INIT)
                                        process INIT
      set INIT
      set SIPI
                                     test_and_clear_bit(KVM_APIC_SIPI)
                                        process SIPI
      
      At the end INIT is left pending in pending_events. The following patch
      fixes this by latching pending event before processing them.
      Signed-off-by: default avatarGleb Natapov <gleb@redhat.com>
      299018f4
  9. 14 May, 2013 1 commit
  10. 16 Apr, 2013 7 commits
  11. 07 Apr, 2013 2 commits
  12. 13 Mar, 2013 1 commit
    • Jan Kiszka's avatar
      KVM: x86: Rework INIT and SIPI handling · 66450a21
      Jan Kiszka authored
      A VCPU sending INIT or SIPI to some other VCPU races for setting the
      remote VCPU's mp_state. When we were unlucky, KVM_MP_STATE_INIT_RECEIVED
      was overwritten by kvm_emulate_halt and, thus, got lost.
      
      This introduces APIC events for those two signals, keeping them in
      kvm_apic until kvm_apic_accept_events is run over the target vcpu
      context. kvm_apic_has_events reports to kvm_arch_vcpu_runnable if there
      are pending events, thus if vcpu blocking should end.
      
      The patch comes with the side effect of effectively obsoleting
      KVM_MP_STATE_SIPI_RECEIVED. We still accept it from user space, but
      immediately translate it to KVM_MP_STATE_INIT_RECEIVED + KVM_APIC_SIPI.
      The vcpu itself will no longer enter the KVM_MP_STATE_SIPI_RECEIVED
      state. That also means we no longer exit to user space after receiving a
      SIPI event.
      
      Furthermore, we already reset the VCPU on INIT, only fixing up the code
      segment later on when SIPI arrives. Moreover, we fix INIT handling for
      the BSP: it never enter wait-for-SIPI but directly starts over on INIT.
      Tested-by: default avatarPaolo Bonzini <pbonzini@redhat.com>
      Signed-off-by: default avatarJan Kiszka <jan.kiszka@siemens.com>
      Signed-off-by: default avatarGleb Natapov <gleb@redhat.com>
      66450a21
  13. 29 Jan, 2013 3 commits
  14. 28 Nov, 2012 1 commit
  15. 22 Oct, 2012 1 commit
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  17. 12 Sep, 2012 1 commit
  18. 05 Sep, 2012 1 commit
  19. 09 Aug, 2012 1 commit
  20. 06 Aug, 2012 6 commits
  21. 01 Aug, 2012 2 commits