- 20 Jun, 2024 16 commits
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Matthew Brost authored
Rather than acquiring and dropping the VM / BO dma-resv around xe_vma_create and do the same thing upon adding preempt fences or an error, hold these locks through the entire new_vma() function. v2: - Rebase (CI) Cc: Fei Yang <fei.yang@intel.com> Signed-off-by:
Matthew Brost <matthew.brost@intel.com> Reviewed-by:
Jagmeet Randhawa <jagmeet.randhawa@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20240618003859.3239239-1-matthew.brost@intel.com
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Matthew Brost authored
Rather than checking for pending enable and asserting runnable_state == 1 in sched done handler, invert these. This is more robust code taking action based on the G2H message and asserting KMD tracking state is correct. Suggested-by:
John Harrison <John.C.Harrison@Intel.com> Signed-off-by:
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Michal Wajdeczko authored
The HuC firmware is loaded and initialized by the PF driver. Make sure VF driver performs only limited data structure initialization. Signed-off-by:
Michal Wajdeczko <michal.wajdeczko@intel.com> Reviewed-by:
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Michal Wajdeczko authored
All engines will be correctly initialized by the PF driver. Moreover, VF drivers can't access related engine registers. Signed-off-by:
Piotr Piórkowski <piotr.piorkowski@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20240619214557.905-9-michal.wajdeczko@intel.com
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Michal Wajdeczko authored
VF drivers can only use GuC-based TLB invalidation, as they don't have access to the related registers. However, VFs shouldn't need any explicit TLB invalidation before enabling CTB communication, as there will be an implicit GGTT TLB invalidation issued by the GuC itself as part of MMIO-based action handling. Signed-off-by:
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Michal Wajdeczko authored
VF drivers can't access any of gtidle control registers as this functionality is owned by the PF driver. Signed-off-by:
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Michal Wajdeczko authored
We don't support Observation Architecture on the VF device. Signed-off-by:
Ashutosh Dixit <ashutosh.dixit@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20240619214557.905-6-michal.wajdeczko@intel.com
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Michal Wajdeczko authored
We currently do not support changing the engine interrupt enable mask on the per-engine basis when using memory based interrupts. Signed-off-by:
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Michal Wajdeczko authored
The VF drivers can't apply any workarounds as they don't have access to related registers. Since xe_wa_apply_tile_workarounds() function is not using RTP yet, we have to add early return. Signed-off-by:
Matt Roper <matthew.d.roper@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20240619214557.905-4-michal.wajdeczko@intel.com
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Michal Wajdeczko authored
There are no RTP save-restore actions applicable for VFs on current platforms. If any future platform will require some, we will need to update the RTP framework to support VF_READY or VF_ONLY actions. In the meantime, just skip all actions if we are running as VF driver. Signed-off-by:
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Michal Wajdeczko authored
We already maintain several flags that control the availability of features on a given device. Disable features, like PCODE or GuC PC or GSC, that do not apply to a VF device. Signed-off-by:
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Sai Teja Pottumuttu authored
Wa_14019877138 is also needed for xe_lpgp graphics 12.74 Signed-off-by:
Sai Teja Pottumuttu <sai.teja.pottumuttu@intel.com> Reviewed-by:
Shekhar Chauhan <shekhar.chauhan@intel.com> Signed-off-by:
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Ashutosh Dixit authored
The OA ioctl's already have drm_dbg's which are sufficient to tell the user that OA is not supported on unsupported configurations (execlist mode and platform gen < 12). Having additional WARN_ON's for these during driver probe create unnecessary noise. Just remove these WARN_ON's. Suggested-by:
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José Roberto de Souza authored
When UMD ask config to be updated, xe_oa_config_locked() was calling xe_oa_emit_oa_config() that would use stream->oa_config but that is only changed to the next oa_config after xe_oa_emit_oa_config() finish. So it was setting the same config for all DRM_XE_PERF_IOCTL_CONFIG calls. Cc: Ashutosh Dixit <ashutosh.dixit@intel.com> Signed-off-by:
José Roberto de Souza <jose.souza@intel.com> Reviewed-by:
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Michal Wajdeczko authored
If oa->xe can be NULL then we shall not use it as a valid pointer. Fixes: cdf02fe1 ("drm/xe/oa/uapi: Add/remove OA config perf ops") Fixes: b6fd51c6 ("drm/xe/oa/uapi: Define and parse OA stream properties") Signed-off-by:
Rodrigo Vivi <rodrigo.vivi@intel.com> Reviewed-by:
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Michal Wajdeczko authored
Even though ARAT interrupts are enabled by default, we still want to keep the code that enables them. But instead doing that in the CTB enabling step, move this code to the upload step, where we already setup few other registers related to GuC. Signed-off-by:
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- 19 Jun, 2024 1 commit
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Michal Wajdeczko authored
We should honor requested uncached mode also at the TTM layer. Otherwise, we risk losing updates to the memory based interrupts source or status vectors, as those require uncached memory. Signed-off-by:
Thomas Hellström <thomas.hellstrom@linux.intel.com> Reviewed-by:
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- 18 Jun, 2024 23 commits
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Ashutosh Dixit authored
Enable Xe2+ overrun mode. For Xe2+, when overrun mode is enabled, there are no partial reports at the end of buffer, making the OA buffer effectively a non-power-of-2 size circular buffer whose size, circ_size, is a multiple of the report size. v2: Fix implementation of xe_oa_circ_diff/xe_oa_circ_incr (Umesh) Acked-by:
Umesh Nerlige Ramappa <umesh.nerlige.ramappa@intel.com> Signed-off-by:
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Ashutosh Dixit authored
Rename OA_TAKEN to xe_oa_circ_diff, since xe_oa_circ_diff better describes what the macro actually does. Also convert to function and add xe_oa_stream arg. These will be used in the following patch. Acked-by:
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Ashutosh Dixit authored
On PVC, a w/a resets RCS/CCS before it goes into RC6. This breaks OA since OA does not expect engine resets during its use. Fix it by disabling RC6. v2: Convert to gt oriented error/warn messages (Michal) Acked-by:
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Ashutosh Dixit authored
Add MMIO trigger support and allow-list required registers for MMIO trigger use case. Registers are whitelisted for the lifetime of the driver but MMIO trigger is enabled only for the duration of the stream. Bspec: 45925, 60340, 61228 Acked-by:
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Ashutosh Dixit authored
Allow the OA buffer to be mmap'd to userspace. This is needed for the MMIO trigger use case. Even otherwise, with whitelisted OA head/tail ptr registers, userspace can receive/interpret OA data from the mmap'd buffer without issuing read()'s on the OA stream fd. v2: Remove unmap_mapping_range from xe_oa_release (Thomas H) Use vm_flags_mod (Umesh) Acked-by: -
Ashutosh Dixit authored
Implement query for properties of OA units present on a device. v2: Clean up reserved/pad fields (Umesh) Follow the same scheme as other query structs v3: Skip reporting reserved engines attached to OA units v4: Expose oa_buf_size via DRM_XE_PERF_IOCTL_INFO (Umesh) v5: Don't expose capabilities as OR of properties (Umesh) v6: Add extensions to query output structs: drm_xe_oa_unit, drm_xe_query_oa_units and drm_xe_oa_stream_info v7: Change oa_units[] array to __u64 type Acked-by: -
Ashutosh Dixit authored
Similar to OAR, allow userspace to execute MI_REPORT_PERF_COUNT on compute engines of a specified exec queue. Acked-by:
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Ashutosh Dixit authored
Add OAR support to allow userspace to execute MI_REPORT_PERF_COUNT on render engines. Configuration batches are used to program the OAR unit, as well as modifying the render engine context image of a specified exec queue (to have correct register values when that context switches in). v2: Rename/refactor xe_oa_modify_self (Umesh) v3: Move IS_MI_LRI_CMD() into xe_oa.c (Michal) Acked-by:
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Ashutosh Dixit authored
Implement the OA stream read file_operation. Both blocking and non-blocking reads are supported. As part of read system call, the read copies OA perf data from the OA buffer to the user buffer, after appending packet headers for status and data packets. v2: Drop OA report headers, implement DRM_XE_PERF_IOCTL_STATUS (Umesh) v3: Introduce 'struct drm_xe_oa_stream_status' v4: Define oa_status register bitfields (Umesh) v5: Add extensions to 'struct drm_xe_oa_stream_status' v6: Minor cleanup, eliminate report32 variable v7: Use -EIO to signal to userspace to read OASTATUS using DRM_XE_PERF_IOCTL_STATUS, change previous sites returning -EIO to return -EINVAL Make drm_xe_oa_stream_status bits contiguous (Jose, Umesh) rmw oa_status bits (Umesh) Acked-by: -
Ashutosh Dixit authored
The OA stream open perf op returns an fd with its own file_operations for the newly initialized OA stream. These file_operations allow userspace to enable or disable the stream, as well as apply a different metric configuration for the OA stream. Userspace can also poll for data availability. OA stream initialization is completed in this commit by enabling the OA stream. When sampling is enabled this starts a hrtimer which periodically checks for data availablility. v2: Use stream properties for stream reconfiguration with DRM_XE_PERF_IOCTL_CONFIG v3: Hold runtime_pm reference across oa buffer alloc/free v4: Fix 32 bit build Acked-by: -
Ashutosh Dixit authored
Implement majority of OA stream initialization (as part of OA stream open) ioctl). OAG buffer is allocated for receiving perf counter samples from HW. OAG unit is initialized and the selected OA metric configuration is programmed into OAG unit HW using a command/batch buffer. Acked-by:
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Ashutosh Dixit authored
Properties for OA streams are specified by user space, when the stream is opened, as a chain of drm_xe_ext_set_property struct's. Parse and validate these stream properties. v2: Remove struct drm_xe_oa_open_param (Harish Chegondi) Drop DRM_XE_OA_PROPERTY_POLL_OA_PERIOD_US (Umesh) Eliminate comparison with xe_oa_max_sample_rate (Umesh) Drop 'struct drm_xe_oa_record_header' (Umesh) v3: s/DRM_XE_OA_PROPERTY_OA_EXPONENT/ \ DRM_XE_OA_PROPERTY_OA_PERIOD_EXPONENT/ (Jose) v4: Fix 32 bit build v5: Add non-static function kernel doc (Michal) Acked-by: -
Ashutosh Dixit authored
Introduce add/remove config perf ops for OA. OA configurations consist of a set of event/counter select register address/value pairs. The add_config perf op validates and stores such configurations and also exposes them in the metrics sysfs. These configurations will be programmed to OA unit HW when an OA stream using a configuration is opened. The OA stream can also switch to other stored configurations. v2: Start config id's from 1 and other minor review comments (Umesh) v3: Add 32 bit build v4: Add kernel doc for non-static functions (Michal) Acked-by:
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Ashutosh Dixit authored
Initialize OA unit data struct's for each gt during device probe. Also assign OA units for hardware engines. v2: Remove XE_OA_UNIT_OAG/XE_OA_UNIT_OAM_SAMEDIA_0 enum (Umesh) Change mtl_oa_base to 0x13000 (Umesh) v3: Switch to drmm_ functions and other cleanups (Michal) Acked-by: -
Ashutosh Dixit authored
Add and initialize supported OA data formats for various platforms (including Xe2). User can request OA data in any supported format. Bspec: 52198, 60942, 61101 v2: Start 'xe_oa_format_name' enum from 0 (Umesh) Fix error rewind with OA (Umesh) v3: Use graphics versions rather than absolute platform names v4: Add missing kernel doc for struct memebers and enum and other minor changes (Michal) Acked-by: -
Ashutosh Dixit authored
Normally only superuser/root can access perf counter data. However, superuser can set perf_stream_paranoid sysctl to 0 to allow non-privileged users to also access perf data. perf_stream_paranoid is introduced at the perf layer to allow different perf stream types to share this access mechanism. v2: Add kernel doc for non-static functions (Michal) Acked-by:
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Ashutosh Dixit authored
In Xe, the plan is to support multiple types of perf counter streams (OA is only one type of these streams). Rather than introduce NxM ioctls for these (N perf streams with M ioctl's per perf stream), we decide to multiplex these (N different stream types and the M ops for each of these stream types) through a single PERF ioctl. This multiplexing is the purpose of the PERF layer. In addition to PERF DRM ioctl's, another set of ioctl's on the PERF fd are defined. These are expected to be common to different PERF stream types and therefore defined at the PERF layer itself. v2: Add param_size to 'struct drm_xe_perf_param' (Umesh) v3: Rename 'enum drm_xe_perf_ops' to 'enum drm_xe_perf_ioctls' (Guy Zadicario) Add DRM_ prefix to ioctl names to indicate uapi names v4: Add 'enum drm_xe_perf_op' previously missed out (Guy Zadicario) v5: Squash the ops and PERF layer patches into a single patch (Umesh) Remove param_size from struct 'drm_xe_perf_param' (Umesh) v6: Add DRM_XE_PERF_IOCTL_STATUS v7: Add DRM_XE_PERF_IOCTL_INFO v8: Fix Copyright years, fix DRM_XE_PERF_TYPE_MAX, move '#include "xe_perf.h"' to xe_perf.c, add kernel doc (Michal) Acked-by:Guy Zadicario <gzadicario@habana.ai> Acked-by:
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Lucas De Marchi authored
A temporary fixup was made in commit 24d0d98a ("drm/xe/xe2lpm: Fixup Wa_14020756599") due to limitations in the RTP infra. Now that RTP has support for OR condition that change can be removed. RTP now also supports checking any GT, so use that instead of the more specific xe_rtp_match_when_media2000() used in that commit. Reviewed-by:
Lucas De Marchi <lucas.demarchi@intel.com> Signed-off-by:
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Lucas De Marchi authored
One surprising factor of GRAPHICS_VERSION()/MEDIA_VERSION() matching for people adding new WAs is that it implicitly checks that the graphics/media IP under check is of that specific type and not that the device contains a media/graphics IP of that version. Add a new *_ANY_GT() variant that can be used in that case. Signed-off-by:
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Lucas De Marchi authored
Some workarounds started to depend on different set of conditions where the action should be applied if any of them match. See e.g. commit 24d0d98a ("drm/xe/xe2lpm: Fixup Wa_14020756599"). Add XE_RTP_MATCH_OR that allows to implement a logical OR for the rules. Normal precedence applies: r1, r2, OR, r3 means (r1 AND r2) OR r3 The check is shortcut as soon as a set of conditions match. v2: Do not match on empty number of rules-other-than-OR evaluated Reviewed-by:
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Lucas De Marchi authored
Having at most 4 rules per entry is already reaching the maximum. Expand it to 6 to allow for more room. With the addition of OR condition for rules, this will very soon not be sufficient. Reviewed-by:
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Lucas De Marchi authored
If none of the rules match, there should be 0 entries in the sr xarray, so none of them should have a register matching. Reviewed-by:
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Michal Wajdeczko authored
On platforms where VFs are using memory based interrupts, we missed invalid access to no longer existing interrupt registers, as we keep them marked with XE_REG_OPTION_VF. To fix that just either setup memirq vectors in GuC or enable legacy interrupts. Fixes: aef4eb7c ("drm/xe/vf: Setup memory based interrupts in GuC") Signed-off-by:
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