- 10 Jun, 2024 4 commits
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Michal Wajdeczko authored
If possible, we should prefer xe_gt_err() over drm_err(). While at it, improve and fix some of the error messages. Also drop unnecessary "xe_gt_sysfs.h" include. Signed-off-by:
Michal Wajdeczko <michal.wajdeczko@intel.com> Cc: Vinay Belgaumkar <vinay.belgaumkar@intel.com> Reviewed-by:
Vinay Belgaumkar <vinay.belgaumkar@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20240609181931.1724-4-michal.wajdeczko@intel.com
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Michal Wajdeczko authored
We are converting xe_guc_pc to xe_guc_ct few times already. Add simple helper function to avoid code duplication. While at it, simplify other helper functions and fix order of local variables to match the guideline. Signed-off-by:
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Michal Wajdeczko authored
We already have a dedicated file for GuC SLPC ABI definitions. Move definition of the SETUP_PC_GUCRC action and related enum to that file, rename them to match format of other new ABI definitions and add simple kernel-doc. Signed-off-by:
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Michal Wajdeczko authored
The Local Memory (aka VRAM) is only available on DGFX platforms. We shouldn't attempt to provision VFs with LMEM or attempt to update the LMTT on non-DGFX platforms. Add missing asserts that would enforce that and fix release code that could crash on iGFX due to uninitialized LMTT. Fixes: c063cce7 ("drm/xe/pf: Update the LMTT when freeing VF GT config") Signed-off-by:
Rodrigo Vivi <rodrigo.vivi@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20240607153155.1592-1-michal.wajdeczko@intel.com
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- 07 Jun, 2024 6 commits
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Matthew Brost authored
Clean up laying violation of setting q->flags EXEC_QUEUE_FLAG_BANNED bit in GuC backend. Move banned to GuC owned bit and report banned status to upper layers via reset_status vfunc. This is a slight change in behavior as reset_status returns true if wedged or killed bits set too, but in all of these cases submission to queue is no longer allowed. Signed-off-by:
Matthew Brost <matthew.brost@intel.com> Reviewed-by:
Jonathan Cavitt <jonathan.cavitt@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20240604184700.1946918-1-matthew.brost@intel.comSigned-off-by:
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Himal Prasad Ghimiray authored
- Remove unused bit definitions. - Driver uses BIT(0) for waking/sleeping the domain and since the registers are masked respective mask bit BIT(16) needs to be set. Use defines for these bits and use them in domain initialization. v3 - Use defines within domain_init Cc: Rodrigo Vivi <rodrigo.vivi@intel.com> Cc: Badal Nilawar <badal.nilawar@intel.com> Suggested-by:
Himal Prasad Ghimiray <himal.prasad.ghimiray@intel.com> Reviewed-by:
Badal Nilawar <badal.nilawar@intel.com> Reviewed-by:
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Matthew Brost authored
Add helper function to implement VMA (user binding) page faults, remove unnecessary userptr.invalidate_link list del operation, retry on memory pressure, remove unnecessary xe_vma_userptr_check_repin after rebinding, remove unnecessary TLB invalidation, and always use vm->lock in write mode. Changes help facilitate SVM page faults. Signed-off-by:
Nirmoy Das <nirmoy.das@intel.com> Reviewed-by:
Jagmeet Randhawa <jagmeet.randhawa@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20240607015212.2190106-1-matthew.brost@intel.com
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Jani Nikula authored
The xe driver has never needed ACPI button. Selecting the kconfig is just copy-paste from i915, which no longer needs it either. Stop selecting ACPI_BUTTON. Cc: Ville Syrjälä <ville.syrjala@linux.intel.com> Closes: https://lore.kernel.org/r/ZmGsJsXhHcPV48XJ@intel.comReviewed-by:
Ville Syrjälä <ville.syrjala@linux.intel.com> Signed-off-by:
Jani Nikula <jani.nikula@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/1872adc6b20ce4c5ef55ba60a7233b31ace776fb.1717747542.git.jani.nikula@intel.com
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Michal Wajdeczko authored
During early initialization, in the xe_guc_min_load_for_hwconfig() function, we are successfully enabling CTB communication, but it will only allow us to send non-blocking H2G messages, as due to not yet enabled IRQs, including G2H IRQs, we will not notice any new G2H message sent by the GuC, including replies to our blocking H2G request messages. And those successful replies are mandatory for the VF drivers to continue normal operations. As attempt to workaround this driver initialization ordering issue, introduce special safe-mode CTB worker, that will periodically trigger G2H processing, like original IRQ handler, in case no MSI/MSIX IRQs were enabled on the driver yet. Once we detect that IRQ were enabled, we will stop this worker. Signed-off-by:
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Michal Wajdeczko authored
In the next patch we will want to perform the same steps that g2h worker function is doing but from the different worker. Suggested-by:
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- 06 Jun, 2024 8 commits
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Riana Tauro authored
disable c6 called in guc_pc_fini_hw is unreachable. GuC PC init returns earlier if skip_guc_pc is true and never registers the finish call thus making disable_c6 unreachable. move this call to gt idle. v2: rebase v3: add fixes tag (Himal) Fixes: 975e4a37 ("drm/xe: Manually setup C6 when skip_guc_pc is set") Signed-off-by:
Riana Tauro <riana.tauro@intel.com> Reviewed-by:
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Riana Tauro authored
The rc6 registers used in disable_c6 function belong to the GT forcewake domain. Hence change the forcewake assertion to check GT forcewake domain. v2: add fixes tag (Himal) Fixes: 975e4a37 ("drm/xe: Manually setup C6 when skip_guc_pc is set") Signed-off-by:
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Jonathan Cavitt authored
We currently have debugfs support that allows the userspace to initiate an asynchronous gt reset on command. However, userspace may also wish to wait for the completion of the gt reset before performing any additional work. To that end, add a version of the force_reset gt debugfs function that operates synchronously. Closes: https://gitlab.freedesktop.org/drm/xe/kernel/-/issues/1068Suggested-by:
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Matthew Brost authored
job->fence is not assigned until xe_sched_job_arm(), check for job->fence in xe_sched_job_seqno() so any usage of this function (trace points) do not result in NULL ptr dereference. Also check job->fence before assigning error in job trace points. Fixes: 0ac7a2c7 ("drm/xe: Don't initialize fences at xe_sched_job_create()") Cc: Thomas Hellström <thomas.hellstrom@linux.intel.com> Signed-off-by:
Lucas De Marchi <lucas.demarchi@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20240605055041.2082074-1-matthew.brost@intel.com
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Michal Wajdeczko authored
Only few steps from the GT restart phase are applicable for the VF drivers, as initialization of PAT, WOPCM, MOCS or CCS mode can be done only by the native or PF drivers. Use custom GT restart function if running in VF mode. Signed-off-by:
Piotr Piórkowski <piotr.piorkowski@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20240604212231.1416-5-michal.wajdeczko@intel.com
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Michal Wajdeczko authored
The VF drivers can't trigger real GuC firmware reset using GDRST register, but for the VF drivers it is sufficient to send VF_RESET message to reset any VF specific state maintained by the GuC. Use our existing VF bootstrap function as VF_RESET is part of it. Signed-off-by:
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Michal Wajdeczko authored
VF drivers can't modify WOPCM registers nor upload firmwares to GuC, HuC or GSC. Modify xe_uc initialization functions to skip those steps if running in the VF mode, or defer to a new custom helper function that would not include those steps. Signed-off-by:
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Michal Wajdeczko authored
Only GuC/HuC firmwares can be used by the VFs, don't claim support for any other firmware (like GSC) even if the driver can support it. Signed-off-by:
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- 05 Jun, 2024 8 commits
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Matthew Brost authored
Overmapping the identity VRAM mapping is triggering hardware bugs on certain platforms. Use 2M pages for the last unaligned (to 1G) VRAM chunk. v2: - Always use 2M pages for last chunk (Fei Yang) - break loop when 2M pages are used - Add assert for usable_size being 2M aligned v3: - Fix checkpatch Cc: Maarten Lankhorst <maarten.lankhorst@linux.intel.com> Cc: Fei Yang <fei.yang@intel.com> Signed-off-by:
Fei Yang <fei.yang@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20240603181824.1927675-1-matthew.brost@intel.com
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Andrzej Hajda authored
Tests show that user fence signalling requires kind of write barrier, otherwise not all writes performed by the workload will be available to userspace. It is already done for render and compute, we need it also for the rest: video, gsc, copy. Fixes: dd08ebf6 ("drm/xe: Introduce a new DRM driver for Intel GPUs") Signed-off-by:
Andrzej Hajda <andrzej.hajda@intel.com> Reviewed-by:
Thomas Hellström <thomas.hellstrom@linux.intel.com> Signed-off-by:
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Andrzej Hajda authored
This reverts commit 38007fa9. Signaling user-fence after seqno write does not seem to be good solution. Instead of changing order separate barrier should be put before user-fence, this will be done in separate patch. v2: added fixes tag in case reverted patch gets backported to stable Fixes: 38007fa9 ("drm/xe: flush gtt before signalling user fence on all engines") Signed-off-by:
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Thorsten Blum authored
The if condition !A || A && B can be simplified to !A || B. Fixes the following Coccinelle/coccicheck warning reported by excluded_middle.cocci: WARNING !A || A && B is equivalent to !A || B Compile-tested only. Signed-off-by:
Thorsten Blum <thorsten.blum@toblux.com> Reviewed-by:
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Jani Nikula authored
Since commit a61ddb43 ("drm: enable (most) W=1 warnings by default across the subsystem"), most of the extra warnings in the driver Makefile are redundant. Remove them. Note that -Wmissing-declarations and -Wmissing-prototypes are always enabled by default in scripts/Makefile.extrawarn. Acked-by:
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Nirmoy Das authored
Add missing lock that is protecting relay->incoming_actions. Cc: Michal Wajdeczko <michal.wajdeczko@intel.com> Reviewed-by:
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Tejas Upadhyay authored
For xe2_lpg render Wa_14020756599 is applied to all steppings. Reviewed-by:
Tejas Upadhyay <tejas.upadhyay@intel.com> Signed-off-by:
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Tejas Upadhyay authored
For xe2_lpm Wa_14020756599 is applied to all steppings and when RCS is present on graphics GT. V5(MattR): - Add more comments about new API V4: - Make it part of lrc wa - Check for RCS as rtp rule V3(MattR): - Rename rtp api name - Use MEDIA_VERx100 V2: - Remove engine filter video decode - Fix typo GRAPHICS/MEDIA/s - Himal Reviewed-by:
Matt Roper <matthew.d.roper@intel.com> Signed-off-by:
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- 31 May, 2024 3 commits
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Niranjana Vishwanathapura authored
Add kernel-doc to xe_lrc_create/destroy and xe_lrc_get/put interfaces. v2: Fix kernel-doc for xe_lrc_create(), drop Fixes tag. (Matt Brost, Michal Wajdeczko) Signed-off-by:Niranjana Vishwanathapura <niranjana.vishwanathapura@intel.com> Reviewed-by:
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Matthew Brost authored
Kernel VM do not have an Xe file. Include a check for Xe file in the VM before trying to get pid from VM's Xe file when taking a devcoredump. Fixes: b10d0c5e ("drm/xe: Add process name to devcoredump") Cc: Rodrigo Vivi <rodrigo.vivi@intel.com> Cc: José Roberto de Souza <jose.souza@intel.com> Cc: stable@vger.kernel.org Signed-off-by:
José Roberto de Souza <jose.souza@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20240530203341.1795181-1-matthew.brost@intel.com
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Michal Wajdeczko authored
The LMTT must be updated whenever we change the VF LMEM configuration. We missed that step when freeing the whole VF GT config, which could result in stale PTE in LMTT or LMTT PT object leaks. Fix that. Fixes: ac6598ae ("drm/xe/pf: Add support to configure SR-IOV VFs") Signed-off-by:
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- 30 May, 2024 10 commits
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Michal Wajdeczko authored
The initialization order of GT topology, MCR, PAT and GuC HWconfig as done today by native/PF driver, can't be followed as-is by the VF driver, since fuse registers used in GT topology discovery will be obtained by the VF driver from the GuC in HWconfig step. While native/PF drivers need to program the HW PAT table prior to loading the GuC, this requires only multicast writes support from the MCR code, which could be initialized separately from the full MCR support that requires the GT topology to setup steering data. Split MCR initialization into two steps to avoid introducing VF specific code paths. This also fixes duplicated spin_lock inits. Signed-off-by:
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Michal Wajdeczko authored
VF drivers will obtain VRAM configuration from the GuC as part of the VF self config. Use that configuration instead of trying to read inaccessible registers. Signed-off-by:
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Michal Wajdeczko authored
There is no point in mixing register access and VRAM code in the same file. Move and rename the VRAM probe function to a new file (there are no other changes other then new simple kernel-doc). Signed-off-by:
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Michal Wajdeczko authored
Rename static functions to align with our typical coding style. While at it, downgrade the existing kernel-doc for internal function to normal comment. Suggested-by:
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Michal Wajdeczko authored
We should keep all hardware definitions separated from the driver code. Move LMEM_BAR definition to new regs/xe_bars.h file and also add there GTTMMADR_BAR definition to avoid using magic 0 resource. Signed-off-by:
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Michal Wajdeczko authored
We should not define registers directly in the code while we have dedicated files for all register definitions. Move XEHP_MTCFG_ADDR to regs/xe_regs.h Signed-off-by:
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Daniele Ceraolo Spurio authored
This reverts commit cd506a33. The gt_remove function was explicitly added as part of the remove flow instead of using drmm/devm automatic cleanup due to it being illegal to remove a component after the driver has been detached from the pci device; the GSC proxy component is removed as part of gt_remove, so we need to do it in the pci cleanup flow. The function already has a comment above it to explain this. Note that the change to use the devm also caused an invalid pointer deref in the gsc_proxy unbind function, but I didn't bother to debug which pointer was bad since we shouldn't be calling the unbind that late anyway and this revert fixes it. Both issue were not seen in CI because the GSC loading is temporarily disabled due to a critical bug, which means we're not binding the component. Signed-off-by:
Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com> Cc: Matthew Auld <matthew.auld@intel.com> Cc: Andrzej Hajda <andrzej.hajda@intel.com> Cc: Rodrigo Vivi <rodrigo.vivi@intel.com> Reviewed-by:
Matthew Auld <matthew.auld@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20240528182354.1200424-1-daniele.ceraolospurio@intel.com
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Arnd Bergmann authored
Using snprintf() with a format string from task->comm is a bit dangerous since the string may be controlled by unprivileged userspace: drivers/gpu/drm/xe/xe_devcoredump.c: In function 'devcoredump_snapshot': drivers/gpu/drm/xe/xe_devcoredump.c:184:9: error: format not a string literal and no format arguments [-Werror=format-security] 184 | snprintf(ss->process_name, sizeof(ss->process_name), process_name); | ^~~~~~~~ In this case there is no reason for an snprintf(), so use a simpler string copy. Fixes: b10d0c5e ("drm/xe: Add process name to devcoredump") Signed-off-by:Arnd Bergmann <arnd@arndb.de> Reviewed-by:
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Niranjana Vishwanathapura authored
Decouple xe_lrc from xe_exec_queue and reference count xe_lrc. Removing hard coupling between xe_exec_queue and xe_lrc allows flexible design where the user interface xe_exec_queue can be destroyed independent of the hardware/firmware interface xe_lrc. v2: Fix lrc indexing in wq_item_append() Signed-off-by:
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Niranjana Vishwanathapura authored
Do not hold xef->exec_queue.lock mutex while parsing the xarray xef->exec_queue.xa in xe_file_close() as it is not needed and will cause an unwanted dependency between this lock and the vm->lock. This lock protects the exec queue lookup and reference taking which doesn't apply to this code path. When FD is closing, IOCTLs presumably can't be modifying the xarray. v2: Update commit text (Matt Brost) v3: Add more code comment (Rodrigo Vivi) v4: Further expand code comment (Rodirgo Vivi) Signed-off-by:
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- 29 May, 2024 1 commit
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Michal Wajdeczko authored
We don't have to use exact names of the enumerators as the potentially user-facing platform names. When constructing platform descriptor fields, use the unique platform tag and add the XE_ prefix only to the generated enum field. Signed-off-by:
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