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  1. 10 May, 2007 1 commit
  2. 09 May, 2007 1 commit
    • Roman Zippel's avatar
      rename thread_info to stack · f7e4217b
      Roman Zippel authored
      This finally renames the thread_info field in task structure to stack, so that
      the assumptions about this field are gone and archs have more freedom about
      placing the thread_info structure.
      
      Nonbroken archs which have a proper thread pointer can do the access to both
      current thread and task structure via a single pointer.
      
      It'll allow for a few more cleanups of the fork code, from which e.g.  ia64
      could benefit.
      Signed-off-by: default avatarRoman Zippel <zippel@linux-m68k.org>
      [akpm@linux-foundation.org: build fix]
      Cc: Richard Henderson <rth@twiddle.net>
      Cc: Ivan Kokshaysky <ink@jurassic.park.msu.ru>
      Cc: Russell King <rmk@arm.linux.org.uk>
      Cc: Ian Molton <spyro@f2s.com>
      Cc: Haavard Skinnemoen <hskinnemoen@atmel.com>
      Cc: Mikael Starvik <starvik@axis.com>
      Cc: David Howells <dhowells@redhat.com>
      Cc: Yoshinori Sato <ysato@users.sourceforge.jp>
      Cc: "Luck, Tony" <tony.luck@intel.com>
      Cc: Hirokazu Takata <takata@linux-m32r.org>
      Cc: Geert Uytterhoeven <geert@linux-m68k.org>
      Cc: Roman Zippel <zippel@linux-m68k.org>
      Cc: Greg Ungerer <gerg@uclinux.org>
      Cc: Ralf Baechle <ralf@linux-mips.org>
      Cc: Ralf Baechle <ralf@linux-mips.org>
      Cc: Paul Mackerras <paulus@samba.org>
      Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org>
      Cc: Heiko Carstens <heiko.carstens@de.ibm.com>
      Cc: Martin Schwidefsky <schwidefsky@de.ibm.com>
      Cc: Paul Mundt <lethal@linux-sh.org>
      Cc: Kazumoto Kojima <kkojima@rr.iij4u.or.jp>
      Cc: Richard Curnow <rc@rc0.org.uk>
      Cc: William Lee Irwin III <wli@holomorphy.com>
      Cc: "David S. Miller" <davem@davemloft.net>
      Cc: Jeff Dike <jdike@addtoit.com>
      Cc: Paolo 'Blaisorblade' Giarrusso <blaisorblade@yahoo.it>
      Cc: Miles Bader <uclinux-v850@lsi.nec.co.jp>
      Cc: Andi Kleen <ak@muc.de>
      Cc: Chris Zankel <chris@zankel.net>
      Signed-off-by: default avatarAndrew Morton <akpm@linux-foundation.org>
      Signed-off-by: default avatarLinus Torvalds <torvalds@linux-foundation.org>
      f7e4217b
  3. 08 May, 2007 2 commits
  4. 08 Mar, 2007 1 commit
  5. 12 Dec, 2006 1 commit
    • Horms's avatar
      [IA64] CONFIG_KEXEC/CONFIG_CRASH_DUMP permutations · 45a98fc6
      Horms authored
      Actually, on reflection I think that there is a good case for
      keeping the options separate. I am thinking particularly of people
      who want a very small crashdump kernel and thus don't want to compile
      in kexec.
      
      The patch below should fix things up so that all valid combinations of
      KEXEC, CRASH_DUMP and VMCORE compile cleanly - VMCORE depends on
      CRASH_DUMP which is why I said valid combinations. In a nutshell
      it just untangles unrelated code and switches around a few defines.
      
      Please note that it creats a new file, arch/ia64/kernel/crash_dump.c
      This is in keeping with the i386 implementation.
      Signed-off-by: default avatarSimon Horman <horms@verge.net.au>
      Signed-off-by: default avatarTony Luck <tony.luck@intel.com>
      45a98fc6
  6. 07 Dec, 2006 1 commit
    • Zou Nan hai's avatar
      [IA64] IA64 Kexec/kdump · a7956113
      Zou Nan hai authored
      Changes and updates.
      
      1. Remove fake rendz path and related code according to discuss with Khalid Aziz.
      2. fc.i offset fix in relocate_kernel.S.
      3. iospic shutdown code eoi and mask race fix from Fujitsu.
      4. Warm boot hook in machine_kexec to SN SAL code from Jack Steiner.
      5. Send slave to SAL slave loop patch from Jay Lan.
      6. Kdump on non-recoverable MCA event patch from Jay Lan
      7. Use CTL_UNNUMBERED in kdump_on_init sysctl.
      Signed-off-by: default avatarZou Nan hai <nanhai.zou@intel.com>
      Signed-off-by: default avatarTony Luck <tony.luck@intel.com>
      a7956113
  7. 05 Dec, 2006 1 commit
  8. 05 Oct, 2006 1 commit
    • David Howells's avatar
      IRQ: Maintain regs pointer globally rather than passing to IRQ handlers · 7d12e780
      David Howells authored
      Maintain a per-CPU global "struct pt_regs *" variable which can be used instead
      of passing regs around manually through all ~1800 interrupt handlers in the
      Linux kernel.
      
      The regs pointer is used in few places, but it potentially costs both stack
      space and code to pass it around.  On the FRV arch, removing the regs parameter
      from all the genirq function results in a 20% speed up of the IRQ exit path
      (ie: from leaving timer_interrupt() to leaving do_IRQ()).
      
      Where appropriate, an arch may override the generic storage facility and do
      something different with the variable.  On FRV, for instance, the address is
      maintained in GR28 at all times inside the kernel as part of general exception
      handling.
      
      Having looked over the code, it appears that the parameter may be handed down
      through up to twenty or so layers of functions.  Consider a USB character
      device attached to a USB hub, attached to a USB controller that posts its
      interrupts through a cascaded auxiliary interrupt controller.  A character
      device driver may want to pass regs to the sysrq handler through the input
      layer which adds another few layers of parameter passing.
      
      I've build this code with allyesconfig for x86_64 and i386.  I've runtested the
      main part of the code on FRV and i386, though I can't test most of the drivers.
      I've also done partial conversion for powerpc and MIPS - these at least compile
      with minimal configurations.
      
      This will affect all archs.  Mostly the changes should be relatively easy.
      Take do_IRQ(), store the regs pointer at the beginning, saving the old one:
      
      	struct pt_regs *old_regs = set_irq_regs(regs);
      
      And put the old one back at the end:
      
      	set_irq_regs(old_regs);
      
      Don't pass regs through to generic_handle_irq() or __do_IRQ().
      
      In timer_interrupt(), this sort of change will be necessary:
      
      	-	update_process_times(user_mode(regs));
      	-	profile_tick(CPU_PROFILING, regs);
      	+	update_process_times(user_mode(get_irq_regs()));
      	+	profile_tick(CPU_PROFILING);
      
      I'd like to move update_process_times()'s use of get_irq_regs() into itself,
      except that i386, alone of the archs, uses something other than user_mode().
      
      Some notes on the interrupt handling in the drivers:
      
       (*) input_dev() is now gone entirely.  The regs pointer is no longer stored in
           the input_dev struct.
      
       (*) finish_unlinks() in drivers/usb/host/ohci-q.c needs checking.  It does
           something different depending on whether it's been supplied with a regs
           pointer or not.
      
       (*) Various IRQ handler function pointers have been moved to type
           irq_handler_t.
      Signed-Off-By: default avatarDavid Howells <dhowells@redhat.com>
      (cherry picked from 1b16e7ac850969f38b375e511e3fa2f474a33867 commit)
      7d12e780
  9. 01 Oct, 2006 1 commit
  10. 26 Sep, 2006 2 commits
    • Hidetoshi Seto's avatar
      [IA64] CMC/CPE: Reverse the order of fetching log and checking poll threshold · ddb4f0df
      Hidetoshi Seto authored
      This patch reverses the order of fetching log from SAL and
      checking poll threshold. This will fix following trivial issues:
      
      - If SAL_GET_SATE_INFO is unbelievably slow (due to huge system
         or just its silly implementation) and if it takes more than
         1/5 sec, CMCI/CPEI will never switch to CMCP/CPEP.
      - Assuming terrible flood of interrupt (continuous corrected
         errors let all CPUs enter to handler at once and bind them
         in it), CPUs will be serialized by IA64_LOG_LOCK(*).
         Now we check the poll threshold after the lock and log fetch,
         so we need to call SAL_GET_STATE_INFO (num_online_cpus() + 4)
         times in the worst case.
         if we can check the threshold before the lock, we can shut up
         interrupts quickly without waiting preceding log fetches, and
         the number of times will be reduced to (num_online_cpus()) in
         the same situation.
      Signed-off-by: default avatarHidetoshi Seto <seto.hidetoshi@jp.fujitsu.com>
      Signed-off-by: default avatarTony Luck <tony.luck@intel.com>
      ddb4f0df
    • Hidetoshi Seto's avatar
      [IA64] printing support for MCA/INIT · 43ed3baf
      Hidetoshi Seto authored
      Printing message to console from MCA/INIT handler is useful,
      however doing oops_in_progress = 1 in them exactly makes
      something in kernel wrong. Especially it sounds ugly if
      system goes wrong after returning from recoverable MCA.
      
      This patch adds ia64_mca_printk() function that collects
      messages into temporary-not-so-large message buffer during
      in MCA/INIT environment and print them out later, after
      returning to normal context or when handlers determine to
      down the system.
      
      Also this print function is exported for use in extensional
      MCA handler. It would be useful to describe detail about
      recovery.
      
      NOTE:
      I don't think it is sane thing if temporary message buffer
      is enlarged enough to hold whole stack dumps from INIT, so
      buffering is disabled during stack dump from INIT-monarch
      (= default_monarch_init_process). please fix it in future.
      Signed-off-by: default avatarHidetoshi Seto <seto.hidetoshi@jp.fujitsu.com>
      Acked-by: default avatarRuss Anderson <rja@sgi.com>
      Signed-off-by: default avatarTony Luck <tony.luck@intel.com>
      43ed3baf
  11. 03 Jul, 2006 1 commit
  12. 02 Jul, 2006 1 commit
  13. 30 Jun, 2006 1 commit
  14. 29 Jun, 2006 1 commit
  15. 13 Apr, 2006 1 commit
  16. 08 Apr, 2006 1 commit
  17. 26 Mar, 2006 1 commit
  18. 24 Mar, 2006 1 commit
    • Russ Anderson's avatar
      [IA64] MCA recovery: kernel context recovery table · d2a28ad9
      Russ Anderson authored
      Memory errors encountered by user applications may surface
      when the CPU is running in kernel context.  The current code
      will not attempt recovery if the MCA surfaces in kernel
      context (privilage mode 0).  This patch adds a check for cases
      where the user initiated the load that surfaces in kernel
      interrupt code.
      
      An example is a user process lauching a load from memory
      and the data in memory had bad ECC.  Before the bad data
      gets to the CPU register, and interrupt comes in.  The
      code jumps to the IVT interrupt entry point and begins
      execution in kernel context.  The process of saving the
      user registers (SAVE_REST) causes the bad data to be loaded
      into a CPU register, triggering the MCA.  The MCA surfaces in
      kernel context, even though the load was initiated from
      user context.
      
      As suggested by David and Tony, this patch uses an exception
      table like approach, puting the tagged recovery addresses in
      a searchable table.  One difference from the exception table
      is that MCAs do not surface in precise places (such as with
      a TLB miss), so instead of tagging specific instructions,
      address ranges are registers.  A single macro is used to do
      the tagging, with the input parameter being the label
      of the starting address and the macro being the ending
      address.  This limits clutter in the code.
      
      This patch only tags one spot, the interrupt ivt entry.
      Testing showed that spot to be a "heavy hitter" with
      MCAs surfacing while saving user registers.  Other spots
      can be added as needed by adding a single macro.
      
      Signed-off-by: Russ Anderson (rja@sgi.com)
      Signed-off-by: default avatarTony Luck <tony.luck@intel.com>
      d2a28ad9
  19. 23 Mar, 2006 1 commit
  20. 08 Feb, 2006 3 commits
  21. 12 Jan, 2006 1 commit
  22. 05 Jan, 2006 1 commit
    • Ashok Raj's avatar
      [IA64] support for cpu0 removal · ff741906
      Ashok Raj authored
      here is the BSP removal support for IA64. Its pretty much the same thing that
      was released a while back, but has your feedback incorporated.
      
      - Removed CONFIG_BSP_REMOVE_WORKAROUND and associated cmdline param
      - Fixed compile issue with sn2/zx1 due to a undefined fix_b0_for_bsp
      - some formatting nits (whitespace etc)
      
      This has been tested on tiger and long back by alex on hp systems as well.
      Signed-off-by: default avatarAshok Raj <ashok.raj@intel.com>
      Signed-off-by: default avatarTony Luck <tony.luck@intel.com>
      ff741906
  23. 07 Nov, 2005 1 commit
    • Keith Owens's avatar
      [IA64] Extend notify_die() hooks for IA64 · 9138d581
      Keith Owens authored
      notify_die() added for MCA_{MONARCH,SLAVE,RENDEZVOUS}_{ENTER,PROCESS,LEAVE} and
      INIT_{MONARCH,SLAVE}_{ENTER,PROCESS,LEAVE}.  We need multiple
      notification points for these events because they can take many seconds
      to run which has nasty effects on the behaviour of the rest of the
      system.
      
      DIE_SS replaced by a generic DIE_FAULT which checks the vector number,
      to allow interception of faults other than SS.
      
      DIE_MACHINE_{HALT,RESTART} added to allow last minute close down
      processing, especially when the halt/restart routines are called from
      error handlers.
      
      DIE_OOPS added.
      
      The check for kprobe's break numbers has been moved from traps.c to
      kprobes.c, allowing DIE_BREAK to be used for any additional break
      numbers, i.e. it is no longer kprobes specific.
      
      Hooks for kernel debuggers and kernel dumpers added, ENTER and LEAVE.
      Both of these disable the system for long periods which impact on
      watchdogs and heartbeat systems in general.  More patches to come that
      use these events to reset watchdogs and heartbeats.
      
      unregister_die_notifier() added and both routines exported.  Requested
      by Dean Nelson.
      
      Lock removed from {un,}register_die_notifier.  notifier_chain_register()
      already takes a lock.  Also the generic notifier chain locking is being
      reworked to distinguish between callbacks that can block and those that
      cannot, the lock in {un,}register_die_notifier would interfere with
      that change.  http://marc.theaimsgroup.com/?l=linux-kernel&m=113018709002036&w=2
      
      Leading white space removed from arch/ia64/kernel/kprobes.c.
      
      Typo in mca.c in original version of this patch found & fixed by Dean
      Nelson.
      Signed-off-by: default avatarKeith Owens <kaos@sgi.com>
      Acked-by: default avatarDean Nelson <dcn@sgi.com>
      Acked-by: default avatarAnil Keshavamurthy <anil.s.keshavamurthy@intel.com>
      Signed-off-by: default avatarTony Luck <tony.luck@intel.com>
      9138d581
  24. 25 Oct, 2005 1 commit
  25. 06 Oct, 2005 1 commit
    • Bryan Sutula's avatar
      [IA64] Avoid kernel hang during CMC interrupt storm · 76e677e2
      Bryan Sutula authored
      I've noticed a kernel hang during a storm of CMC interrupts, which was
      tracked down to the continual execution of the interrupt handler.
      
      There's code in the CMC handler that's supposed to disable CMC
      interrupts and switch to polling mode when it sees a bunch of CMCs.
      Because disabling CMCs across all CPUs isn't safe in interrupt context,
      the disable is done with a schedule_work().  But with continual CMC
      interrupts, the schedule_work() never gets executed.
      
      The following patch immediately disables CMC interrupts for the current
      CPU.  This then allows (at least) one CPU to ignore CMC interrupts,
      execute the schedule_work() code, and disable CMC interrupts on the rest
      of the CPUs.
      Acked-by: default avatarKeith Owens <kaos@sgi.com>
      Signed-off-by: default avatarBryan Sutula <Bryan.Sutula@hp.com>
      Signed-off-by: default avatarTony Luck <tony.luck@intel.com>
      76e677e2
  26. 11 Sep, 2005 1 commit
    • Keith Owens's avatar
      [PATCH] MCA/INIT: use per cpu stacks · 7f613c7d
      Keith Owens authored
      The bulk of the change.  Use per cpu MCA/INIT stacks.  Change the SAL
      to OS state (sos) to be per process.  Do all the assembler work on the
      MCA/INIT stacks, leaving the original stack alone.  Pass per cpu state
      data to the C handlers for MCA and INIT, which also means changing the
      mca_drv interfaces slightly.  Lots of verification on whether the
      original stack is usable before converting it to a sleeping process.
      Signed-off-by: default avatarKeith Owens <kaos@sgi.com>
      Signed-off-by: default avatarTony Luck <tony.luck@intel.com>
      7f613c7d
  27. 10 Sep, 2005 1 commit
    • Ingo Molnar's avatar
      [PATCH] spinlock consolidation · fb1c8f93
      Ingo Molnar authored
      This patch (written by me and also containing many suggestions of Arjan van
      de Ven) does a major cleanup of the spinlock code.  It does the following
      things:
      
       - consolidates and enhances the spinlock/rwlock debugging code
      
       - simplifies the asm/spinlock.h files
      
       - encapsulates the raw spinlock type and moves generic spinlock
         features (such as ->break_lock) into the generic code.
      
       - cleans up the spinlock code hierarchy to get rid of the spaghetti.
      
      Most notably there's now only a single variant of the debugging code,
      located in lib/spinlock_debug.c.  (previously we had one SMP debugging
      variant per architecture, plus a separate generic one for UP builds)
      
      Also, i've enhanced the rwlock debugging facility, it will now track
      write-owners.  There is new spinlock-owner/CPU-tracking on SMP builds too.
      All locks have lockup detection now, which will work for both soft and hard
      spin/rwlock lockups.
      
      The arch-level include files now only contain the minimally necessary
      subset of the spinlock code - all the rest that can be generalized now
      lives in the generic headers:
      
       include/asm-i386/spinlock_types.h       |   16
       include/asm-x86_64/spinlock_types.h     |   16
      
      I have also split up the various spinlock variants into separate files,
      making it easier to see which does what. The new layout is:
      
         SMP                         |  UP
         ----------------------------|-----------------------------------
         asm/spinlock_types_smp.h    |  linux/spinlock_types_up.h
         linux/spinlock_types.h      |  linux/spinlock_types.h
         asm/spinlock_smp.h          |  linux/spinlock_up.h
         linux/spinlock_api_smp.h    |  linux/spinlock_api_up.h
         linux/spinlock.h            |  linux/spinlock.h
      
      /*
       * here's the role of the various spinlock/rwlock related include files:
       *
       * on SMP builds:
       *
       *  asm/spinlock_types.h: contains the raw_spinlock_t/raw_rwlock_t and the
       *                        initializers
       *
       *  linux/spinlock_types.h:
       *                        defines the generic type and initializers
       *
       *  asm/spinlock.h:       contains the __raw_spin_*()/etc. lowlevel
       *                        implementations, mostly inline assembly code
       *
       *   (also included on UP-debug builds:)
       *
       *  linux/spinlock_api_smp.h:
       *                        contains the prototypes for the _spin_*() APIs.
       *
       *  linux/spinlock.h:     builds the final spin_*() APIs.
       *
       * on UP builds:
       *
       *  linux/spinlock_type_up.h:
       *                        contains the generic, simplified UP spinlock type.
       *                        (which is an empty structure on non-debug builds)
       *
       *  linux/spinlock_types.h:
       *                        defines the generic type and initializers
       *
       *  linux/spinlock_up.h:
       *                        contains the __raw_spin_*()/etc. version of UP
       *                        builds. (which are NOPs on non-debug, non-preempt
       *                        builds)
       *
       *   (included on UP-non-debug builds:)
       *
       *  linux/spinlock_api_up.h:
       *                        builds the _spin_*() APIs.
       *
       *  linux/spinlock.h:     builds the final spin_*() APIs.
       */
      
      All SMP and UP architectures are converted by this patch.
      
      arm, i386, ia64, ppc, ppc64, s390/s390x, x64 was build-tested via
      crosscompilers.  m32r, mips, sh, sparc, have not been tested yet, but should
      be mostly fine.
      
      From: Grant Grundler <grundler@parisc-linux.org>
      
        Booted and lightly tested on a500-44 (64-bit, SMP kernel, dual CPU).
        Builds 32-bit SMP kernel (not booted or tested).  I did not try to build
        non-SMP kernels.  That should be trivial to fix up later if necessary.
      
        I converted bit ops atomic_hash lock to raw_spinlock_t.  Doing so avoids
        some ugly nesting of linux/*.h and asm/*.h files.  Those particular locks
        are well tested and contained entirely inside arch specific code.  I do NOT
        expect any new issues to arise with them.
      
       If someone does ever need to use debug/metrics with them, then they will
        need to unravel this hairball between spinlocks, atomic ops, and bit ops
        that exist only because parisc has exactly one atomic instruction: LDCW
        (load and clear word).
      
      From: "Luck, Tony" <tony.luck@intel.com>
      
         ia64 fix
      Signed-off-by: default avatarIngo Molnar <mingo@elte.hu>
      Signed-off-by: default avatarArjan van de Ven <arjanv@infradead.org>
      Signed-off-by: default avatarGrant Grundler <grundler@parisc-linux.org>
      Cc: Matthew Wilcox <willy@debian.org>
      Signed-off-by: default avatarHirokazu Takata <takata@linux-m32r.org>
      Signed-off-by: default avatarMikael Pettersson <mikpe@csd.uu.se>
      Signed-off-by: default avatarBenoit Boissinot <benoit.boissinot@ens-lyon.org>
      Signed-off-by: default avatarAndrew Morton <akpm@osdl.org>
      Signed-off-by: default avatarLinus Torvalds <torvalds@osdl.org>
      fb1c8f93
  28. 12 Jul, 2005 1 commit
  29. 01 Jun, 2005 1 commit
  30. 17 May, 2005 1 commit
    • Russ Anderson's avatar
      [IA64-SGI] cpe interrupts are not being enabled. · bb68c12b
      Russ Anderson authored
      acpi_request_vector() is called in ia64_mca_init() to get the cpe_vector.
      The problem is that acpi_request_vector() looks in platform_intr_list[] to 
      get the vector, but platform_intr_list[] is not initialized with a valid
      vector until later (in sn_setup()).  Without a valid vector the code
      defaults to polling mode.
      
      This patch moves the call to acpi_request_vector() from ia64_mca_init()
      to ia64_mca_late_init(), which is after platform_intr_list[] is initialized.
      
      Signed-off-by: Russ Anderson (rja@sgi.com)
      Signed-off-by: default avatarTony Luck <tony.luck@intel.com>
      bb68c12b
  31. 16 Apr, 2005 1 commit
    • Linus Torvalds's avatar
      Linux-2.6.12-rc2 · 1da177e4
      Linus Torvalds authored
      Initial git repository build. I'm not bothering with the full history,
      even though we have it. We can create a separate "historical" git
      archive of that later if we want to, and in the meantime it's about
      3.2GB when imported into git - space that would just make the early
      git days unnecessarily complicated, when we don't have a lot of good
      infrastructure for it.
      
      Let it rip!
      1da177e4