- 09 Nov, 2018 19 commits
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Paul Burton authored
We currently have 2 commonly used methods for switching ISA within assembly code, then restoring the original ISA. 1) Using a pair of .set push & .set pop directives. For example: .set push .set mips32r2 <some_insn> .set pop 2) Using .set mips0 to restore the ISA originally specified on the command line. For example: .set mips32r2 <some_insn> .set mips0 Unfortunately method 2 does not work with nanoMIPS toolchains, where the assembler rejects the .set mips0 directive like so: Error: cannot change ISA from nanoMIPS to mips0 In preparation for supporting nanoMIPS builds, switch all instances of method 2 in generic non-platform-specific code to use push & pop as in method 1 instead. The .set push & .set pop is arguably cleaner anyway, and if nothing else it's good to consistently use one method. Signed-off-by: Paul Burton <paul.burton@mips.com> Patchwork: https://patchwork.linux-mips.org/patch/21037/ Cc: linux-mips@linux-mips.org
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Paul Burton authored
Allow the user to configure the kernel to omit support for floating point, by setting CONFIG_MIPS_FP_SUPPORT=n. In an attempt to avoid problems for users who don't understand the impact of this, only expose the option when CONFIG_EXPERT=y. When CONFIG_MIPS_FP_SUPPORT=n all support for FPU hardware, FPU emulation & FP context will be removed from the kernel. If a userland program attempts to execute a floating point instruction it will receive a SIGILL. Setting CONFIG_MIPS_FP_SUPPORT=n shaves around 112KB from a 64r6el_defconfig build using GCC 8.1.0. This also helps prepare us for supporting the nanoMIPS ISA, for which floating point support has not been finalized. Signed-off-by: Paul Burton <paul.burton@mips.com> Patchwork: https://patchwork.linux-mips.org/patch/21014/ Cc: linux-mips@linux-mips.org
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Paul Burton authored
When CONFIG_MIPS_FP_SUPPORT=n we don't support floating point & so don't need to preserve floating point context for tasks. Remove that context from struct task_struct. Signed-off-by: Paul Burton <paul.burton@mips.com> Patchwork: https://patchwork.linux-mips.org/patch/21013/ Cc: linux-mips@linux-mips.org
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Paul Burton authored
When CONFIG_MIPS_FP_SUPPORT=n we don't support floating point, so there's no point compiling in our FPU emulator. Avoid doing so, providing stub versions of dsemul cleanup functions that are called from signal & task handling code. Signed-off-by: Paul Burton <paul.burton@mips.com> Patchwork: https://patchwork.linux-mips.org/patch/21012/ Cc: linux-mips@linux-mips.org
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Paul Burton authored
When CONFIG_MIPS_FP_SUPPORT=n we don't support floating point, so we don't need to worry about floating point exceptions pending in the Floating point Control & Status Register (FCSR) during switch_to(). Stub out the __sanitize_fcr31() macro in this case. Signed-off-by: Paul Burton <paul.burton@mips.com> Patchwork: https://patchwork.linux-mips.org/patch/21010/ Cc: linux-mips@linux-mips.org
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Paul Burton authored
When CONFIG_MIPS_FP_SUPPORT=n we don't support floating point, so we can avoid needless checks of ELF headers specifying the FP ABI or NaN encoding to use. Deselect CONFIG_ARCH_BINFMT_ELF_STATE in this case to avoid the need for our arch_elf_pt_proc() & arch_check_elf() functions, and stub out the mips_set_personality_nan() & mips_set_personality_fp() functions such that SET_PERSONALITY() doesn't need to worry about any of this. Signed-off-by: Paul Burton <paul.burton@mips.com> Patchwork: https://patchwork.linux-mips.org/patch/21011/ Cc: linux-mips@linux-mips.org
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Paul Burton authored
When CONFIG_MIPS_FP_SUPPORT=n we don't support floating point, so there's no need to save & restore floating point context around signals. This prepares us for the removal of FP context from struct task_struct later. Since MSA context is a superset of FP context support for it similarly needs to be removed when MSA/FP support is disabled. Signed-off-by: Paul Burton <paul.burton@mips.com> Patchwork: https://patchwork.linux-mips.org/patch/21009/ Cc: linux-mips@linux-mips.org
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Paul Burton authored
When CONFIG_MIPS_FP_SUPPORT=n we don't support floating point, so remove the related ptrace support. Besides removing code which should not be needed, this prepares us for the removal of FPU state in struct task_struct which this code requires. Signed-off-by: Paul Burton <paul.burton@mips.com> Patchwork: https://patchwork.linux-mips.org/patch/21008/ Cc: linux-mips@linux-mips.org
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Paul Burton authored
When CONFIG_MIPS_FP_SUPPORT=n we don't support floating point, so remove support for floating point instructions from emulate_load_store_insn() & emulate_load_store_microMIPS(). This code should not be needed & relies upon access to FPU state in struct task_struct which will later be removed. Similarly & for the same reasons, when CONFIG_CPU_HAS_MSA=n remove support for MSA instructions. Since MSA support depends upon FP support this is implied when CONFIG_MIPS_FP_SUPPORT=n. Signed-off-by: Paul Burton <paul.burton@mips.com> Patchwork: https://patchwork.linux-mips.org/patch/21020/ Cc: linux-mips@linux-mips.org
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Paul Burton authored
When CONFIG_MIPS_FP_SUPPORT=n we don't support floating point, so remove the floating point branch support from __compute_return_epc_for_insn() & __mm_isBranchInstr(). This code should never be needed & more importantly relies upon FPU state in struct task_struct which will later be removed. Signed-off-by: Paul Burton <paul.burton@mips.com> Patchwork: https://patchwork.linux-mips.org/patch/21017/ Cc: linux-mips@linux-mips.org
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Paul Burton authored
When CONFIG_MIPS_FP_SUPPORT=n we don't support floating point, so we'll never need to enable the FPU. Avoid doing so on a Co-Processor Unusable exception (do_cpu), and remove the Floating Point Exception handler (do_fpe) which should never be executed when the FPU is disabled. Signed-off-by: Paul Burton <paul.burton@mips.com> Patchwork: https://patchwork.linux-mips.org/patch/21007/ Cc: linux-mips@linux-mips.org
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Paul Burton authored
When CONFIG_MIPS_FP_SUPPORT=n we don't support floating point so there's no point in attempting to detect an FPU. Avoid doing so. Signed-off-by: Paul Burton <paul.burton@mips.com> Patchwork: https://patchwork.linux-mips.org/patch/21021/ Cc: linux-mips@linux-mips.org
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Paul Burton authored
Provide stub versions of functions in asm/fpu.h when CONFIG_MIPS_FP_SUPPORT=n. Two approaches are taken to the functions provided: - Functions which can safely be called when FP is not enabled provide stubs which return an error where appropriate or are simple no-ops. - Functions which should only ever be called in cases where cpu_has_fpu is true or the FPU was successfully enabled are declared extern & annotated with __compiletime_error() to detect cases in which they are called incorrectly. Signed-off-by: Paul Burton <paul.burton@mips.com> Patchwork: https://patchwork.linux-mips.org/patch/21006/ Cc: linux-mips@linux-mips.org
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Paul Burton authored
When CONFIG_MIPS_FP_SUPPORT=n we don't support floating point, so there's no point in detecting presence of an FPU. Hardcode cpu_has_fpu=0 such that we optimize out code that makes use of the FPU. Signed-off-by: Paul Burton <paul.burton@mips.com> Patchwork: https://patchwork.linux-mips.org/patch/21005/ Cc: linux-mips@linux-mips.org
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Paul Burton authored
Introduce a Kconfig variable that will indicate whether to include support for floating point in the kernel. For now this is always enabled, and will be made configurable in a later patch. Signed-off-by: Paul Burton <paul.burton@mips.com> Patchwork: https://patchwork.linux-mips.org/patch/21016/ Cc: linux-mips@linux-mips.org
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Paul Burton authored
Introduce a CONFIG_CPU_R2300_FPU Kconfig symbol mirroring the existing CONFIG_CPU_R4K_FPU, and use it to determine whether to build r4k_fpu.S. This removes the duplicate R3000 & TX39XX cases in arch/mips/kernel/Makefile and prepares us for the possibility of disabling FP support later. Signed-off-by: Paul Burton <paul.burton@mips.com> Patchwork: https://patchwork.linux-mips.org/patch/21004/ Cc: linux-mips@linux-mips.org
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Paul Burton authored
asm/fpu.h contains forward declarations of struct sigcontext & struct sigcontext32 which appear to have been unused since commit 137f6f3e ("MIPS: Cleanup signal code initialization"). Remove the dead code. Signed-off-by: Paul Burton <paul.burton@mips.com> Patchwork: https://patchwork.linux-mips.org/patch/21015/ Cc: linux-mips@linux-mips.org
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Paul Burton authored
Emulated floating point instructions don't ensure that the PF_USED_MATH flag is set for the task. This results in a couple of inconsistencies: - ptrace will return the default initial state of FP registers rather than the values actually stored in struct thread_struct, hiding state that has been updated by emulated floating point instructions. - If a task migrates to a CPU with an FPU after having emulated floating point instructions then its floating point register state will be reset to the default ~0 bit pattern, losing state from the emulated instructions. Fix this by calling init_fp_ctx() from fpu_emulator_cop1Handler() to consistently initialize FP state if it was previously uninitialized, setting the PF_USED_MATH flag in the process. All callers of fpu_emulator_cop1Handler() either call lose_fpu(1) before it in order to save any live FPU registers to struct thread_struct, or in the case of do_cpu() already know that the task does not own an FPU so lose_fpu(1) would be a no-op. Since we know that saving FP context will be unnecessary in the case where FP context was just initialized we move this call into fpu_emulator_cop1Handler() too, providing consistency & avoiding needless duplication. Calls to own_fpu(1) are common after return from fpu_emulator_cop1Handler() too, but this would not be a no-op in the do_cpu() case so these are left as-is. A potential future improvement could be to have fpu_emulator_cop1Handler() restore FPU state automatically only if it saved it, though this may not be optimal if some callers are better off without their current calls to own_fpu(1). One potential example of this could be mipsr2_decoder() which as-is could end up saving & restoring FP context repeatedly & unnecessarily if emulating multiple FP instructions. Signed-off-by: Paul Burton <paul.burton@mips.com> Patchwork: https://patchwork.linux-mips.org/patch/21003/ Cc: linux-mips@linux-mips.org
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Paul Burton authored
MIPS has up until now had 3 different ways for a task's floating point context to be initialized: - If the task's first use of FP involves it gaining ownership of an FPU then _init_fpu() is used to initialize the FPU's registers such that they all contain ~0, and the FPU registers will be stored to struct thread_info later (eg. when context switching). - If the task first uses FP on a CPU without an associated FPU then fpu_emulator_init_fpu() initializes the task's floating point register state in struct thread_info such that all floating point register contain the bit pattern 0x7ff800007ff80000, different to the _init_fpu() behaviour. - If a task's floating point context is first accessed via ptrace then init_fp_ctx() initializes the floating point register state in struct thread_info to ~0, giving equivalent state to _init_fpu(). The _init_fpu() path has 2 separate implementations - one for r2k/r3k style systems & one for r4k style systems. The _init_fpu() path also requires that we be careful to clear & restore the value of the Config5.FRE bit on modern systems in order to avoid inadvertently triggering floating point exceptions. None of this code is in a performance critical hot path - it runs only the first time a task uses floating point. As such it doesn't seem to warrant the complications of maintaining the _init_fpu() path. Remove _init_fpu() & fpu_emulator_init_fpu(), instead using init_fp_ctx() consistently to initialize floating point register state in struct thread_info. Upon a task's first use of floating point this will typically mean that we initialize state in memory & then load it into FPU registers using _restore_fp() just as we would on a context switch. For other paths such as __compute_return_epc_for_insn() or mipsr2_decoder() this results in a significant simplification of the work to be done. Signed-off-by: Paul Burton <paul.burton@mips.com> Patchwork: https://patchwork.linux-mips.org/patch/21002/ Cc: linux-mips@linux-mips.org
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- 08 Nov, 2018 5 commits
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Paul Burton authored
The BMIPS5xxx core_init function contains a call to an init_fpu function inside an #ifdef whose condition never evaluates true. Remove the dead code. FPU initialization happens later, primarily when a userland program attempts to use it. Signed-off-by: Paul Burton <paul.burton@mips.com> Patchwork: https://patchwork.linux-mips.org/patch/21018/ Cc: linux-mips@linux-mips.org
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Paul Burton authored
From MIPSr6 onwards FP64 support is mandatory, and so CONFIG_MIPS_O32_FP64_SUPPORT is always selected for configurations which support O32 binaries. Hide the useless unchangeable prompt in these cases. Signed-off-by: Paul Burton <paul.burton@mips.com> Patchwork: https://patchwork.linux-mips.org/patch/21019/ Cc: linux-mips@linux-mips.org
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Paul Burton authored
If we built the kernel targeting the microMIPS ISA then the very fact that the kernel is running implies that the CPU supports microMIPS. Thus we can hardcode cpu_has_mmips to 1 allowing the compiler greater scope for optimisation due to the compile-time constant. Signed-off-by: Paul Burton <paul.burton@mips.com> Patchwork: https://patchwork.linux-mips.org/patch/21022/ Cc: linux-mips@linux-mips.org
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Paul Burton authored
The GCC_OFF_SMALL_ASM macro defines the constraint to use for instructions needing "small offsets", typically the LL or SC instructions. Historically these had 16 bit offsets, but microMIPS & MIPS32/MIPS64r6 onwards reduced the width of the offset field. GCC 4.9 & higher supports a ZC constraint which matches the offset requirements of the LL & SC instructions. Where supported we can use the ZC constraint regardless of ISA, and it will handle the requirements of the ISA correctly. As such we require 3 cases: - GCC 4.9 & higher can use ZC. - GCC older than 4.9 must use the older R constraint, which does not take into account microMIPS or MIPSr6. - microMIPS builds therefore require GCC 4.9 or higher. MIPSr6 support was only introduced in newer compilers anyway so it can be ignored here. The current code complicates this a little by specifically having MIPSr6 bypass the GCC version check, and using the R constraint for pre-MIPSr6 builds even if the compiler supports ZC which would be equivalent. Simplify this such that the code straightforwardly implements the 3 cases outlined above. For non-GCC compilers we presume that ZC is safe to use. In practice the only non-GCC compiler of interest is clang and it has supported the ZC constraint since version 3.7.0. It seems safe enough to presume that nobody will expect to built a working kernel using a clang version older than that, and if they do then they'll have bigger problems. As such we don't check the clang version number & just presume ZC is usable when the compiler is not GCC. Signed-off-by: Paul Burton <paul.burton@mips.com> Patchwork: https://patchwork.linux-mips.org/patch/20999/ Cc: linux-mips@linux-mips.org
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Paul Burton authored
asm/compiler.h defined GCC_IMM_ASM & GCC_REG_ACCUM macros, both of which are defined differently for GCC pre-3.4 or GCC 3.4 & higher. We only support building with GCC 4.6 & higher since commit cafa0010 ("Raise the minimum required gcc version to 4.6"), which makes the pre-3.4 definition dead code. Rather than leave the macro definitions around, inline the GCC 3.4 & higher definitions into the single file that uses them & remove the macros entirely. Signed-off-by: Paul Burton <paul.burton@mips.com> Patchwork: https://patchwork.linux-mips.org/patch/21000/ Cc: linux-mips@linux-mips.org
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- 06 Nov, 2018 4 commits
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Maciej W. Rozycki authored
This supports computers based on the R4000SC processor: * DECstation 5000/150 and DECsystem 5000/150, * Personal DECstation 5000/50, Personal DECsystem 5000/50, and computers based on the R4400SC processor: * DECstation 5000/260 and DECsystem 5000/260, * DECsystem 5900/260, in the 64-bit mode. Signed-off-by: Maciej W. Rozycki <macro@linux-mips.org> Signed-off-by: Paul Burton <paul.burton@mips.com> Patchwork: https://patchwork.linux-mips.org/patch/20986/ Cc: Ralf Baechle <ralf@linux-mips.org>
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Maciej W. Rozycki authored
This supports computers based on the R4000SC processor: * DECstation 5000/150 and DECsystem 5000/150, * Personal DECstation 5000/50, Personal DECsystem 5000/50, and computers based on the R4400SC processor: * DECstation 5000/260 and DECsystem 5000/260, * DECsystem 5900/260, in the 32-bit mode. Signed-off-by: Maciej W. Rozycki <macro@linux-mips.org> Signed-off-by: Paul Burton <paul.burton@mips.com> Patchwork: https://patchwork.linux-mips.org/patch/20985/ Cc: Ralf Baechle <ralf@linux-mips.org>
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Maciej W. Rozycki authored
Regenerate the R3k DECstation defconfig, in particular including more relevant drivers. Signed-off-by: Maciej W. Rozycki <macro@linux-mips.org> Signed-off-by: Paul Burton <paul.burton@mips.com> Patchwork: https://patchwork.linux-mips.org/patch/20984/ Cc: Ralf Baechle <ralf@linux-mips.org>
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Yangtao Li authored
Use DEFINE_SHOW_ATTRIBUTE macro to simplify the code. Signed-off-by: Yangtao Li <tiny.windzz@gmail.com> Signed-off-by: Paul Burton <paul.burton@mips.com> Patchwork: https://patchwork.linux-mips.org/patch/20991/ Cc: ralf@linux-mips.org Cc: jhogan@kernel.org Cc: linux-mips@linux-mips.org Cc: linux-kernel@vger.kernel.org
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- 05 Nov, 2018 2 commits
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Hassan Naveed authored
Allows the users of ptrace to access memory mapped by the ptraced process using the same cache coherency attributes as the original process. For example while using gdb with ioremap_prot() incorporated, both gdb and the process being traced will have same cache coherency attributes. Signed-off-by: Hassan Naveed <hnaveed@wavecomp.com> Signed-off-by: Paul Burton <paul.burton@mips.com> Patchwork: https://patchwork.linux-mips.org/patch/20955/ Cc: <linux-mips@linux-mips.org>
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Yangtao Li authored
Use DEFINE_SHOW_ATTRIBUTE macro to simplify the code. Signed-off-by: Yangtao Li <tiny.windzz@gmail.com> Signed-off-by: Paul Burton <paul.burton@mips.com> Patchwork: https://patchwork.linux-mips.org/patch/20988/ Cc: ralf@linux-mips.org Cc: jhogan@kernel.org Cc: linux-mips@linux-mips.org Cc: linux-kernel@vger.kernel.org
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- 04 Nov, 2018 9 commits
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Linus Torvalds authored
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git://git.infradead.org/linux-ubifsLinus Torvalds authored
Pull UBIFS updates from Richard Weinberger: - Full filesystem authentication feature, UBIFS is now able to have the whole filesystem structure authenticated plus user data encrypted and authenticated. - Minor cleanups * tag 'tags/upstream-4.20-rc1' of git://git.infradead.org/linux-ubifs: (26 commits) ubifs: Remove unneeded semicolon Documentation: ubifs: Add authentication whitepaper ubifs: Enable authentication support ubifs: Do not update inode size in-place in authenticated mode ubifs: Add hashes and HMACs to default filesystem ubifs: authentication: Authenticate super block node ubifs: Create hash for default LPT ubfis: authentication: Authenticate master node ubifs: authentication: Authenticate LPT ubifs: Authenticate replayed journal ubifs: Add auth nodes to garbage collector journal head ubifs: Add authentication nodes to journal ubifs: authentication: Add hashes to index nodes ubifs: Add hashes to the tree node cache ubifs: Create functions to embed a HMAC in a node ubifs: Add helper functions for authentication support ubifs: Add separate functions to init/crc a node ubifs: Format changes for authentication support ubifs: Store read superblock node ubifs: Drop write_node ...
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git://git.linux-nfs.org/projects/trondmy/linux-nfsLinus Torvalds authored
Pull NFS client bugfixes from Trond Myklebust: "Highlights include: Bugfix: - Fix build issues on architectures that don't provide 64-bit cmpxchg Cleanups: - Fix a spelling mistake" * tag 'nfs-for-4.20-2' of git://git.linux-nfs.org/projects/trondmy/linux-nfs: NFS: fix spelling mistake, EACCESS -> EACCES SUNRPC: Use atomic(64)_t for seq_send(64)
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git://git.kernel.org/pub/scm/linux/kernel/git/tip/tipLinus Torvalds authored
Pull more timer updates from Thomas Gleixner: "A set of commits for the new C-SKY architecture timers" * 'timers-urgent-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip: dt-bindings: timer: gx6605s SOC timer clocksource/drivers/c-sky: Add gx6605s SOC system timer dt-bindings: timer: C-SKY Multi-processor timer clocksource/drivers/c-sky: Add C-SKY SMP timer
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git://github.com/jonmason/ntbLinus Torvalds authored
Pull NTB updates from Jon Mason: "Fairly minor changes and bug fixes: NTB IDT thermal changes and hook into hwmon, ntb_netdev clean-up of private struct, and a few bug fixes" * tag 'ntb-4.20' of git://github.com/jonmason/ntb: ntb: idt: Alter the driver info comments ntb: idt: Discard temperature sensor IRQ handler ntb: idt: Add basic hwmon sysfs interface ntb: idt: Alter temperature read method ntb_netdev: Simplify remove with client device drvdata NTB: transport: Try harder to alloc an aligned MW buffer ntb: ntb_transport: Mark expected switch fall-throughs ntb: idt: Set PCIe bus address to BARLIMITx NTB: ntb_hw_idt: replace IS_ERR_OR_NULL with regular NULL checks ntb: intel: fix return value for ndev_vec_mask() ntb_netdev: fix sleep time mismatch
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git://git.kernel.org/pub/scm/linux/kernel/git/tip/tipLinus Torvalds authored
Pull scheduler fixes from Ingo Molnar: "A memory (under-)allocation fix and a comment fix" * 'sched-urgent-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip: sched/topology: Fix off by one bug sched/rt: Update comment in pick_next_task_rt()
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git://git.kernel.org/pub/scm/linux/kernel/git/tip/tipLinus Torvalds authored
Pull x86 fixes from Ingo Molnar: "A number of fixes and some late updates: - make in_compat_syscall() behavior on x86-32 similar to other platforms, this touches a number of generic files but is not intended to impact non-x86 platforms. - objtool fixes - PAT preemption fix - paravirt fixes/cleanups - cpufeatures updates for new instructions - earlyprintk quirk - make microcode version in sysfs world-readable (it is already world-readable in procfs) - minor cleanups and fixes" * 'x86-urgent-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip: compat: Cleanup in_compat_syscall() callers x86/compat: Adjust in_compat_syscall() to generic code under !COMPAT objtool: Support GCC 9 cold subfunction naming scheme x86/numa_emulation: Fix uniform-split numa emulation x86/paravirt: Remove unused _paravirt_ident_32 x86/mm/pat: Disable preemption around __flush_tlb_all() x86/paravirt: Remove GPL from pv_ops export x86/traps: Use format string with panic() call x86: Clean up 'sizeof x' => 'sizeof(x)' x86/cpufeatures: Enumerate MOVDIR64B instruction x86/cpufeatures: Enumerate MOVDIRI instruction x86/earlyprintk: Add a force option for pciserial device objtool: Support per-function rodata sections x86/microcode: Make revision and processor flags world-readable
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git://git.kernel.org/pub/scm/linux/kernel/git/tip/tipLinus Torvalds authored
Pull perf updates and fixes from Ingo Molnar: "These are almost all tooling updates: 'perf top', 'perf trace' and 'perf script' fixes and updates, an UAPI header sync with the merge window versions, license marker updates, much improved Sparc support from David Miller, and a number of fixes" * 'perf-urgent-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip: (66 commits) perf intel-pt/bts: Calculate cpumode for synthesized samples perf intel-pt: Insert callchain context into synthesized callchains perf tools: Don't clone maps from parent when synthesizing forks perf top: Start display thread earlier tools headers uapi: Update linux/if_link.h header copy tools headers uapi: Update linux/netlink.h header copy tools headers: Sync the various kvm.h header copies tools include uapi: Update linux/mmap.h copy perf trace beauty: Use the mmap flags table generated from headers perf beauty: Wire up the mmap flags table generator to the Makefile perf beauty: Add a generator for MAP_ mmap's flag constants tools include uapi: Update asound.h copy tools arch uapi: Update asm-generic/unistd.h and arm64 unistd.h copies tools include uapi: Update linux/fs.h copy perf callchain: Honour the ordering of PERF_CONTEXT_{USER,KERNEL,etc} perf cs-etm: Correct CPU mode for samples perf unwind: Take pgoff into account when reporting elf to libdwfl perf top: Do not use overwrite mode by default perf top: Allow disabling the overwrite mode perf trace: Beautify mount's first pathname arg ...
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git://git.kernel.org/pub/scm/linux/kernel/git/tip/tipLinus Torvalds authored
Pull irq fixes from Ingo Molnar: "An irqchip driver fix and a memory (over-)allocation fix" * 'irq-urgent-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip: irqchip/irq-mvebu-sei: Fix a NULL vs IS_ERR() bug in probe function irq/matrix: Fix memory overallocation
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- 03 Nov, 2018 1 commit
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Peter Zijlstra authored
With the addition of the NUMA identity level, we increased @level by one and will run off the end of the array in the distance sort loop. Fixed: 051f3ca0 ("sched/topology: Introduce NUMA identity node sched domain") Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org> Cc: Linus Torvalds <torvalds@linux-foundation.org> Cc: Peter Zijlstra <peterz@infradead.org> Cc: Thomas Gleixner <tglx@linutronix.de> Cc: linux-kernel@vger.kernel.org Signed-off-by: Ingo Molnar <mingo@kernel.org>
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