- 25 Oct, 2019 20 commits
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Aric Cyr authored
Signed-off-by:
Aric Cyr <aric.cyr@amd.com> Acked-by:
Leo Li <sunpeng.li@amd.com> Signed-off-by:
Alex Deucher <alexander.deucher@amd.com>
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Dmytro Laktyushkin authored
Commit hints are unnecessary after front end programming redesign. Signed-off-by:
Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com> Reviewed-by:
Eric Bernstein <Eric.Bernstein@amd.com> Acked-by:
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Jordan Lazare authored
[Why] For loop below the assert already checks for the number of instances to create. ASSERT is meaningless and causing spam. [How] dd Signed-off-by:
Jordan Lazare <Jordan.Lazare@amd.com> Reviewed-by:
Harry Wentland <Harry.Wentland@amd.com> Acked-by:
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Aidan Yang authored
[why] Optimized gamma22 assumes fixed point distribution which is not true for eetf true. [how] Use long calculation for eetf. Signed-off-by:
Aidan Yang <Aidan.Yang@amd.com> Reviewed-by:
Krunoslav Kovac <Krunoslav.Kovac@amd.com> Acked-by:
Reza Amini <Reza.Amini@amd.com> Signed-off-by:
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Yongqiang Sun authored
[Why] System hang during S0i3 if DP only connected due to clk is disabled when doing link training. During S0i3, clk is disabled while the clk state is updated when ini_hw called, and at the moment clk is still disabled which indicating a wrong state for next time trying to enable clk. [How] Add an unknown state and initialize it during int_hw, make sure enable clk command be sent to smu. Signed-off-by:
Yongqiang Sun <yongqiang.sun@amd.com> Reviewed-by:
Eric Yang <eric.yang2@amd.com> Acked-by:
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Jun Lei authored
[why] Hard to determine if pipe combine is done with MPC or ODM [how] Add new visual confirm type, this will mark each MPCC tree with a different color Signed-off-by:
Jun Lei <Jun.Lei@amd.com> Reviewed-by:
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Jun Lei authored
Signed-off-by:
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Wayne Lin authored
[Why] While setting hdmi_vic, hv_frame.vic is not initialized and might assign a wrong value to hdmi_vic. Cause to send out VSIF with abnormal value. [How] Initialize hv_frame and avi_frame Signed-off-by:
Wayne Lin <Wayne.Lin@amd.com> Reviewed-by:
Nicholas Kazlauskas <nicholas.kazlauskas@amd.com> Signed-off-by:
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Evan Quan authored
To fit the latest SMU firmware. Signed-off-by:
Evan Quan <evan.quan@amd.com> Reviewed-by:
Kenneth Feng <kenneth.feng@amd.com> Signed-off-by:
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Colin Ian King authored
There is a spelling mistake in a DRM_ERROR error message. Fix it. Signed-off-by:
Colin Ian King <colin.king@canonical.com> Signed-off-by:
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Nicholas Kazlauskas authored
[Why] We're leaking memory by not freeing the gamma used to calculate the transfer function for legacy gamma. [How] Release the gamma after we're done with it. Signed-off-by:
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Xiaojie Yuan authored
Signed-off-by:
Xiaojie Yuan <xiaojie.yuan@amd.com> Reviewed-by:
Feifei Xu <Feifei.Xu@amd.com> Signed-off-by:
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Xiaojie Yuan authored
Signed-off-by:
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Zhan liu authored
[Why] This patch is for fixing Navi14 HDMI display pink screen issue. [How] Call stream->link->link_enc->funcs->setup twice. This is setting the DIG_MODE to the correct value after having been overridden by the call to transmitter control. Signed-off-by:
Zhan Liu <zhan.liu@amd.com> Reviewed-by:
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Alex Deucher authored
To avoid walking past the end of the arrays since the PP_SMU defines don't match the renoir defines. Reviewed-by:
Prike Liang <Prike.Liang@amd.com> Signed-off-by:
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Pelloux-prayer, Pierre-eric authored
amdgpu_vm_prt_fini uses "vm->root.base.bo" so it must still be valid when we call it. Fixes: b65709a9 ("drm/amdgpu: reserve the root PD while freeing PASIDs") Signed-off-by:
Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com> Reviewed-by:
Christian König <christian.koenig@amd.com> Signed-off-by:
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Dan Carpenter authored
Smatch complains that we need to initialized "*cap" otherwise it can lead to an uninitialized variable bug in the caller. This seems like a reasonable warning and it doesn't hurt to silence it at least. drivers/gpu/drm/amd/amdgpu/vi.c:767 vi_asic_reset_method() error: uninitialized symbol 'baco_reset'. Fixes: 425db255 ("drm/amdgpu: expose BACO interfaces to upper level from PP") Signed-off-by:
Dan Carpenter <dan.carpenter@oracle.com> Signed-off-by:
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Alex Deucher authored
They are not used outside of the file they are defined in. Reviewed-by:
James Zhu <James.Zhu@amd.com> Acked-by:
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Alex Deucher authored
We need to allocate a large enough buffer for the feedback buffer, otherwise the IB test can overwrite other memory. Reviewed-by:
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chen gong authored
Add PSP TA firmware declaration for raven raven2 picasso Signed-off-by:
chen gong <curry.gong@amd.com> Reviewed-by:
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- 17 Oct, 2019 20 commits
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Kevin Wang authored
the trace event print string format error. (use integer type to handle string) before: amdgpu_test_kev-1556 [002] 138.508781: amdgpu_cs_ioctl: sched_job=8, timeline=gfx_0.0.0, context=177, seqno=1, ring_name=ffff94d01c207bf0, num_ibs=2 after: amdgpu_test_kev-1506 [004] 370.703783: amdgpu_cs_ioctl: sched_job=12, timeline=gfx_0.0.0, context=234, seqno=2, ring_name=gfx_0.0.0, num_ibs=1 change trace event list: 1.amdgpu_cs_ioctl 2.amdgpu_sched_run_job 3.amdgpu_ib_pipe_sync Signed-off-by:
Kevin Wang <kevin1.wang@amd.com> Reviewed-by:
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Tianci.Yin authored
add memory training implementation code to save resume time. Reviewed-by:
Luben Tuikov <luben.tuikov@amd.com> Signed-off-by:
Tianci.Yin <tianci.yin@amd.com> Signed-off-by:
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Tianci.Yin authored
memory training using specific fixed vram segment, reserve these segments before anyone may allocate it. Reviewed-by:
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Tianci.Yin authored
add interface for memory training. Reviewed-by:
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Tianci.Yin authored
parse firmware to get memory training capability and fb location. Reviewed-by:
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Tianci.Yin authored
add new vram_reserve_block structure and atomfirmware_internal_constants enumeration Reviewed-by:
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Tianci.Yin authored
introduce psp_v11_0_is_sos_alive func for common use. Reviewed-by:
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Tianci.Yin authored
add a generic helper function for accessing framebuffer via MMIO Reviewed-by:
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Tianci.Yin authored
update amdgpu_discovery to get IP revision. Reviewed-by:
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Prike Liang authored
implement get_power_profile_mode for getting power profile mode status. Signed-off-by:
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Alex Deucher authored
We need to allocate a large enough buffer for the session info, otherwise the IB test can overwrite other memory. - Session info is 128K according to mesa - Use the same session info for create and destroy Bug: https://bugzilla.kernel.org/show_bug.cgi?id=204241Acked-by:
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Alex Deucher authored
We need to allocate a large enough buffer for the session info, otherwise the IB test can overwrite other memory. v2: - session info is 128K according to mesa - use the same session info for create and destroy Bug: https://bugzilla.kernel.org/show_bug.cgi?id=204241Acked-by: -
Alex Deucher authored
We need to allocate a large enough buffer for the session info, otherwise the IB test can overwrite other memory. v2: - session info is 128K according to mesa - use the same session info for create and destroy Bug: https://bugzilla.kernel.org/show_bug.cgi?id=204241Acked-by: -
Alex Deucher authored
Add proper config check. Reviewed-by:
Mikita Lipski <mikita.lipski@amd.com> Signed-off-by:
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YueHaibing authored
Fix sparse warning: drivers/gpu/drm/amd/amdgpu/../display/dc/core/dc_link.c:746:6: warning: symbol 'dc_link_detect_helper' was not declared. Should it be static? Reported-by:
Hulk Robot <hulkci@huawei.com> Signed-off-by:
YueHaibing <yuehaibing@huawei.com> Signed-off-by:
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Bhawanpreet Lakha authored
Signed-off-by:
Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com> Reviewed-by:
Roman Li <Roman.Li@amd.com> Signed-off-by:
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Bhawanpreet Lakha authored
This patch adds handling of dp is usb-c, it is not tested but is needed to support dp over usb-c Signed-off-by:
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Bhawanpreet Lakha authored
Use requested_dispclk_khz / 1000 directly Signed-off-by:
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Lewis Huang authored
[Why] SMU fixed this issue after version 0x370c00 [How] enable smu send message to set dcfclk after smu version 0x370c00 Signed-off-by:
Lewis Huang <Lewis.Huang@amd.com> Acked-by:
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joseph gravenor authored
[why] Should always MP0_BASE for any register definition from MP per-IP header files. I belive the reason the linux version of MP1_BASE works is The 0th element of the 0th table of that is identical to the corrisponding value of MP0_BASE in the renoir offset header file. The reason we should only use MP0_BASE is There is only one set of per-IP headers MP that includes all register definitions related to SMU IP block. This IP includes MP0, MP1, MP2 and an ecryption engine that can be used only by MP0. As a result all register definitions from MP file should be based only on MP0_BASE data. [How] Change MP1_BASE to MP0_BASE Signed-off-by:
joseph gravenor <joseph.gravenor@amd.com> Acked-by:
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