- 25 Aug, 2016 8 commits
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Rex Zhu authored
Signed-off-by:
Rex Zhu <Rex.Zhu@amd.com> Reviewed-by:
Alex Deucher <alexander.deucher@amd.com> Signed-off-by:
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Rex Zhu authored
sub_vendor_id in cgs interface. Signed-off-by:
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Rex Zhu authored
fix issue that encode test failed on the second time when vce dpm enabled on tonga. Signed-off-by:
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Rex Zhu authored
fix issue after vce encode, the eclk stay high. Signed-off-by:
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Rex Zhu authored
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Alex Deucher authored
Not of much use at the moment (we don't really use the second ring either), but may be useful later. Reviewed-by:
JimQu <Jim.Qu@amd.com> Reviewed-by:
Christian König <christian.koenig@amd.com> Signed-off-by:
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Alex Deucher authored
Rather than using a hardcoded value. This allows different versions to expose more or less rings. No functional change. Reviewed-by:
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Alex Deucher authored
The old names were dragged over from radeon. The new ones better match the naming conventions used in the driver. No functional change. Signed-off-by:
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- 24 Aug, 2016 9 commits
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Christian König authored
Try to be clean here, even when it's a noop on x86. Signed-off-by:
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Christian König authored
Also use the firmware size from the header instead of calculating it. Signed-off-by:
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Rex Zhu authored
Reviewed-by:
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Alex Deucher authored
Replace packet2's with packet0 writes to UVD_NO_OP. The value written to UVD_NO_OP does not matter. Reviewed-by:
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Alex Deucher authored
Replace packet2's with packet0 writes to UVD_NO_OP. The value written to UVD_NO_OP does not matter. Reviewed-by:
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Alex Deucher authored
Writes to this register are the preferred way to do NOPs. Bump the driver version as well. Reviewed-by:
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Alex Deucher authored
Writes to this register are the preferred way to do NOPs. Bump the driver version as well. Reviewed-by:
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Alex Deucher authored
The VCE rings only require single dword alignment. Signed-off-by: -
Alex Deucher authored
According to the hw team, it should be 16, not 8. Cc: Peter Fang <peter.fang@amd.com> Signed-off-by:
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- 23 Aug, 2016 8 commits
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Tom St Denis authored
If the ring isn't ready lets print out which ring name to help debugging. Signed-off-by:
Tom St Denis <tom.stdenis@amd.com> Reviewed-by:
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Heinrich Schuchardt authored
In an if block for (running == 0) running cannot be non-zero. v2: agd: remove unused variable Reviewed-by:
Heinrich Schuchardt <xypron.glpk@gmx.de> Signed-off-by:
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Heinrich Schuchardt authored
In an if block for (running == 0) running cannot be non-zero. v2: agd: remove unused variable Reviewed-by:
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Heinrich Schuchardt authored
if (a == NULL || a->b == NULL) leads to a NULL pointer dereference if a == NULL. Reviewed-by:
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Heinrich Schuchardt authored
if (a == NULL || a->b == NULL) leads to a NULL pointer dereference if a == NULL. Reviewed-by:
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Heinrich Schuchardt authored
In an if block for (running == 0) running cannot be non-zero. v2: agd: remove unused variable Reviewed-by:
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Heinrich Schuchardt authored
In an if block for (running == 0) running cannot be non-zero. v2: agd: remove unused variable Reviewed-by:
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Alexandre Demers authored
Fixed indentation for readability. Reviewed-by:
Edward O'Callaghan <funfunctor@folklore1984.net> Signed-off-by:
Alexandre Demers <alexandre.f.demers@gmail.com> Signed-off-by:
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- 22 Aug, 2016 13 commits
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Alexandre Demers authored
We were using the same mask twice. Looking at radeon, it seems we should be using HDMI_AVI_INFO_CONT instead as the second mask. Being there, fix typos in comments and improved readability. I haven't looked at other DCEs, the mask may also be wrong for them. Reviewed-by:
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Christian König authored
Make it more obvious what we are doing here. Signed-off-by:
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Christian König authored
AMDGPU_GEM_CREATE_NO_CPU_ACCESS and AMDGPU_GEM_CREATE_CPU_ACCESS_REQUIRED are obviously mutual exclusive. So stop adding a dummy entry without effect when both are specified. Signed-off-by:
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Christian König authored
Make it more clear what this function does. No intendet functional change. Signed-off-by:
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Christian König authored
Adding a BO can make it the insertion point for larger sizes as well. v2: add a comment about the guard structure. Signed-off-by:
Felix Kuehling <felix.kuehling@amd.com> Signed-off-by:
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Tom St Denis authored
Clean up whitespace and formatting. Signed-off-by:
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Marek Olšák authored
For profiling. v2: really bump the minor version Signed-off-by:
Marek Olšák <marek.olsak@amd.com> Reviewed-by:
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Chunming Zhou authored
V2: 1. don't directly submit to many jobs at the same time. 2. delete unrelated printk. Signed-off-by:
Chunming Zhou <David1.Zhou@amd.com> Reviewed-by:
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Chunming Zhou authored
V2: 1. use mutex instead of spinlock for shadow list, since its process could sleep. 2. move list_del to bo destroy phase. Signed-off-by:
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Chunming Zhou authored
V2: move shadow parameter to amdgpu_pte_update_params. Signed-off-by:
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Chunming Zhou authored
V2: Checking if shadow is valid. Signed-off-by:
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Chunming Zhou authored
Use shadow flag to judge which direction to sync. V2: Don't need bo pin, so remove it. V3: 1. Split to two functions, one is backup_to_shadow, another is restore_from_shadow. 2. Clean up previous shadow direction difinitions. Signed-off-by:
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Chunming Zhou authored
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- 19 Aug, 2016 2 commits
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Chunming Zhou authored
V2: add checking if need backup in amdgpu_bo_create. Signed-off-by:
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jimqu authored
Phenomenon: software hang when device resume back, read UVD fence is 0xffffffff and read pcie pid is 0xffff. The issue is caused by VCE reset when update cg setting. according to HW programming guide, adjust update VCE cg sequence. The patch apply to VCE2.0. Signed-off-by:
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