- 05 Sep, 2015 40 commits
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Keerthy authored
Configure the clock source to external clock if available. External clock is preferred as it can be ticking during suspend. Signed-off-by:
Keerthy <j-keerthy@ti.com> Acked-by:
Tony Lindgren <tony@atomide.com> Signed-off-by:
Alexandre Belloni <alexandre.belloni@free-electrons.com>
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Keerthy authored
The rtc can be clocked by an internal 32K clock. Adding the support to enable the same. Signed-off-by:
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Keerthy authored
rtc can either be supplied from internal 32k clock or external crystal generated 32k clock. Internal clock is SOC specific and the external clock is board dependent. Adding the corresponding nodes. Signed-off-by:
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Joonyoung Shim authored
According to datasheet, the S2MPS13X and S2MPS14X should update write buffer via setting WUDR bit to high after ctrl register is written. If not, ALARM interrupt of rtc-s5m doesn't happen first time when i use tools/testing/selftests/timers/rtctest.c test program and hour format is used to 12 hour mode in Odroid-XU3 board. One more issue is the RTC doesn't keep time on Odroid-XU3 board when i turn on board after power off even if RTC battery is connected. It can be solved as setting WUDR & RUDR bits to high at the same time after RTC_CTRL register is written. It's same with condition of only writing ALARM registers, so this is for only S2MPS14 and we should set WUDR & A_UDR bits to high on S2MPS13. I can't find any reasonable description about this like fix from datasheet, but can find similar codes from rtc driver source of hardkernel kernel and vendor kernel. Signed-off-by:
Joonyoung Shim <jy0922.shim@samsung.com> Cc: <stable@vger.kernel.org> # v3.16 Reviewed-by:
Krzysztof Kozlowski <k.kozlowski@samsung.com> Tested-by:
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Suneel Garapati authored
Add support for RTC controller found on Xilinx Zynq Ultrascale+ MPSoC platform. Signed-off-by:
Suneel Garapati <suneel.garapati@xilinx.com> Acked-by:
Moritz Fischer <moritz.fischer@ettus.com> Signed-off-by:
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Suneel Garapati authored
adds file for description on device node bindings for RTC found on Xilinx Zynq Ultrascale+ MPSoC. Signed-off-by:
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Bibek Basu authored
The RTC month value is 1-indexed, but the kernel assumes it is 0-indexed. This may result in the RTC not rolling over correctly. Signed-off-by:
Bibek Basu <bbasu@nvidia.com> Signed-off-by:
Felix Janda <felix.janda@posteo.de> Signed-off-by:
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Rob Herring authored
With the SA1100 and PXA RTC drivers be mutually exclusive and no longer sharing hardware, PXA27x/PXA3xx platforms must use the PXA RTC driver as the SA1100 platform device is no longer registered. This change should be almost transparent to userspace. Former users of pxa-rtc should be aware that 2 RTCs will be available on their kernels, rtc0 being sa1100-rtc and rtc1 being pxa-rtc. Any userspace relying on the fact that rtc0 was pxa-rtc should be fixed. As a consequence: - the first reboot after the switch will have the wrong time, - on dual boot platform where the other OS programs some logic into the sa1100 rtc IP, a lack of fix in userspace, ie. a kernel changing sa1100-rtc thinking it is pxa-rtc could have dire consequence, such as wiping the other OS data partition. (Thanks to Robert Jarmik for help on the above commit text.) Signed-off-by:
Rob Herring <robh@kernel.org> Acked-by:
Robert Jarzmik <robert.jarzmik@free.fr> Cc: Daniel Mack <daniel@zonque.org> Cc: Haojian Zhuang <haojian.zhuang@gmail.com> Cc: Sergey Lapin <slapin@ossfans.org> Cc: Russell King <linux@arm.linux.org.uk> Cc: Mike Rapoport <mike@compulab.co.il> Cc: Philipp Zabel <philipp.zabel@gmail.com> Signed-off-by:
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Rob Herring authored
Now that register definitions have been moved to the driver, regs-rtc.h is no longer used and can be removed. Signed-off-by:
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Rob Herring authored
Now that register definitions have been moved to the driver, we can remove them from machine specific code. Signed-off-by:
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Rob Herring authored
SA1100 and PXA differ only in register offsets which are currently hardcoded in a machine specific header. Some arm64 platforms (PXA1928) have this RTC block as well (and not the PXA270 variant). Convert the driver to use ioremap and set the register offsets dynamically. Since we are touching all the register accesses, convert them all to readl_relaxed/writel_relaxed. Signed-off-by:
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Rob Herring authored
The drivers for the SA1100 and PXA RTCs are now mutually exclusive, so add the memory resource for the sa1100-rtc device. Since the memory resource is already present in the pxa_rtc_resources, that makes sa1100_rtc_resources and pxa_rtc_resources equivalent, so use pxa_rtc_resources for both devices and remove the duplicate sa1100_rtc_resources. Signed-off-by:
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Rob Herring authored
Currently, the rtc-sa1100 and rtc-pxa drivers co-exist as rtc-pxa has a superset of functionality. Having 2 drivers sharing the same memory resource is not allowed by the driver model if resources are properly declared. This problem was avoided by not adding memory resources to the SA1100 RTC driver, but that prevents clean-up of the SA1100 driver. This commit converts the PXA RTC to use the exported SA1100 RTC functions. Now the sa1100-rtc and pxa-rtc devices are mutually exclusive, so we must remove the sa1100-rtc from pxa27x and pxa3xx. Signed-off-by:
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Rob Herring authored
Factor out the RTC initialization from the platform device specific parts in order to share the RTC device ops with other drivers. Specifically, it will be shared with rtc-pxa driver. Signed-off-by:
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Wang Dongsheng authored
If ds3232 work on some platform that is not implementing irq_set_wake, ds3232 will get a WARNING trace in resume. So fix ds3232->suspended state to false when irq_set_irq_wake return error. WARNING: CPU: 0 PID: 729 at kernel/irq/manage.c:604 irq_set_irq_wake+0x4b/0x8c() Unbalanced IRQ 201 wake disable Modules linked in: CPU: 0 PID: 729 Comm: sh Not tainted 3.12.19-rt30+ #25 [<800107d9>] (unwind_backtrace+0x1/0x88) from [<8000e4ef>] (show_stack+0xb/0xc) [<8000e4ef>] (show_stack+0xb/0xc) from [<802b5fa9>] (dump_stack+0x4d/0x60) [<802b5fa9>] (dump_stack+0x4d/0x60) from [<800186dd>] (warn_slowpath_common+0x45/0x64) [<800186dd>] (warn_slowpath_common+0x45/0x64) from [<80018717>] (warn_slowpath_fmt+0x1b/0x24) [<80018717>] (warn_slowpath_fmt+0x1b/0x24) from [<8003a8d3>] (irq_set_irq_wake+0x4b/0x8c) [<8003a8d3>] (irq_set_irq_wake+0x4b/0x8c) from [<80204fcb>] (ds3232_resume+0x2d/0x36) [<80204fcb>] (ds3232_resume+0x2d/0x36) from [<801954c7>] (dpm_run_callback.isra.13+0xb/0x28) [<801954c7>] (dpm_run_callback.isra.13+0xb/0x28) from [<80195b1b>] (device_resume+0x7b/0xa2) [<80195b1b>] (device_resume+0x7b/0xa2) from [<80195f0f>] (dpm_resume+0xbb/0x19c) [<80195f0f>] (dpm_resume+0xbb/0x19c) from [<801960d9>] (dpm_resume_end+0x9/0x12) [<801960d9>] (dpm_resume_end+0x9/0x12) from [<80037e1d>] (suspend_devices_and_enter+0x17d/0x1d0) [<80037e1d>] (suspend_devices_and_enter+0x17d/0x1d0) from [<80037ee1>] (pm_suspend+0x71/0x128) [<80037ee1>] (pm_suspend+0x71/0x128) from [<80037449>] (state_store+0x6d/0x80) [<80037449>] (state_store+0x6d/0x80) from [<800af4d5>] (sysfs_write_file+0x9f/0xde) [<800af4d5>] (sysfs_write_file+0x9f/0xde) from [<8007a437>] (vfs_write+0x7b/0x104) [<8007a437>] (vfs_write+0x7b/0x104) from [<8007a7f7>] (SyS_write+0x27/0x48) [<8007a7f7>] (SyS_write+0x27/0x48) from [<8000c121>] (ret_fast_syscall+0x1/0x44) Signed-off-by:
Wang Dongsheng <dongsheng.wang@freescale.com> Signed-off-by:
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Joonyoung Shim authored
It's unnecessary the code that assigns info->rtc_clk to NULL in s3c_rtc_remove. Signed-off-by:
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Joonyoung Shim authored
It's missed to call clk_unprepare() about info->rtc_src_clk in s3c_rtc_remove and to call clk_disable_unprepare about info->rtc_clk in error routine of s3c_rtc_probe. Signed-off-by:
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Joonyoung Shim authored
The clock enable/disable codes for alarm have been removed from commit 24e14554 ("drivers/rtc/rtc-s3c.c: delete duplicate clock control") and the clocks are disabled even if alarm is set, so alarm interrupt can't happen. The s3c_rtc_setaie function can be called several times with 'enabled' argument having same value, so it needs to check whether clocks are enabled or not. Signed-off-by:
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Alexandre Belloni authored
Definitions from linux/platform_data/atmel.h are not used, remove the include. Signed-off-by: -
Alexandre Belloni authored
This driver is using device tree but is not including of.h Signed-off-by: -
Nadav Haklai authored
According to the Armada38x functional errata FE-3124064, writing to the RTC TIME register may fail. As a workaround, after writing to RTC TIME register, issue a dummy write of 0x0 twice to the RTC Status register. This is the updated implementation of the Errata that eliminates the need of the long 100ms delay during the RTC set time procedure. [gregory.clement@free-electrons.com]: removed the mutex and use the spinlock again Signed-off-by:
Nadav Haklai <nadavh@marvell.com> Reviewed-by:
Neta Zur Hershkovits <neta@marvell.com> Signed-off-by:
Gregory CLEMENT <gregory.clement@free-electrons.com> Signed-off-by:
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Alexandre Belloni authored
Check time validity when reading time as this is when we need to know. Signed-off-by: -
Alexandre Belloni authored
RX8025_BIT_CTRL2_CTFG was set to 0 only when it was already 0. Signed-off-by: -
Alexandre Belloni authored
irq_freq is already initialized to 1 in rtc_device_register() Signed-off-by: -
Alexandre Belloni authored
Wait for the user to set the time to reset the validity bits. Until then, the time may be invalid. Signed-off-by: -
Alexandre Belloni authored
rx8025_init_client is modifying ctrl[0] and writing it to RX8025_REG_CTRL2 but ctrl[0] is actually RX8025_REG_CTRL1. Signed-off-by: -
Alexandre Belloni authored
Instead of bailing out, disable alarms and continue when devm_request_threaded_irq() fails. This allows to still provide some functionality. Signed-off-by: -
Alexandre Belloni authored
Remove useless error messages, at that point, the user already knows something went wrong but will not be able to do anything about it anyway. It is also highly unlikely that some registers are readable/writable but not some other ones. Also, transform rx8025_read_reg to be more resemblant to i2c_smbus_read_byte_data() Signed-off-by: -
Alexandre Belloni authored
Stop setting the time to epoch when it is invalid. The proper way to handle that is to return an error when it is invalid instead of returning an incorrect value. Signed-off-by: -
Alexandre Belloni authored
The datasheet specifies that transfer mode must be 0 for write and either 0x4 (simplified read) or 0 (standard read). 0x8 is not specified, use standard mode. Signed-off-by: -
Alexandre Belloni authored
The hardware is only capable of handling dates between 2000 and 2099, enforce that. Signed-off-by: -
Alexandre Belloni authored
Use BIT() instead of hand coding. Signed-off-by: -
Alexandre Belloni authored
It is useless to print a message when probe fails as the user is already aware that it failed. Signed-off-by: -
Alexandre Belloni authored
Use devm_request_threaded_irq() so it is not necessary to call free_irq() explicitly. Signed-off-by: -
Alexandre Belloni authored
The driver currently emulates the concept of threaded IRQ using a workqueue, switch to threaded IRQ instead. Signed-off-by: -
Alexandre Belloni authored
Remove the useless includes and order the remaining ones alphabetically. Signed-off-by: -
Vladimir Zapolskiy authored
The change removes redundant sysfs binary file boundary checks, since this task is already done on caller side in fs/sysfs/file.c Signed-off-by:
Vladimir Zapolskiy <vz@mleia.com> Signed-off-by:
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Vladimir Zapolskiy authored
The change removes redundant sysfs binary file boundary checks, since this task is already done on caller side in fs/sysfs/file.c Signed-off-by:
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Vladimir Zapolskiy authored
The change removes redundant sysfs binary file boundary checks, since this task is already done on caller side in fs/sysfs/file.c Signed-off-by:
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Vladimir Zapolskiy authored
The change removes redundant sysfs binary file boundary checks, since this task is already done on caller side in fs/sysfs/file.c Spinlock acquisition/release is moved out of the loop body to get atomic states of NVRAM reading and writing operations. Signed-off-by:
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