1. 27 Apr, 2002 3 commits
    • Dirk Uffmann's avatar
      [PATCH] 1130/1: Remove support for prefetchable PCI memory on ARM Integrator · 3b32b128
      Dirk Uffmann authored
      Since prefetchable memory is not beeing allocated correctly behind PCI-to-PCI bridges, this is a work-around to make it possible to uses devices located behind PCI-bridges. E.g. the Matrox G450 now works since prefetchable PCI memory is completly disabled.
      
      I saw some very promissing patches from Russel some where around december on the mailing list that bring the behaviour of /driver/pci/setup-bus.c in line with prefetchable memory support for devices on PCI bus 00. This patch was adding a member for prefetchable memory regions to 
      	struct pbus_set_ranges_data
      	{
      	        int found_vga;
      	        unsigned long io_start, io_end;
      	        unsigned long mem_start, mem_end;
      	};
      used in through-bridge resource allocations. 
      
      Russel, do you think your patch could solve the problem more elegant?
      
      In addition, I changed some comments and introduced defines from platform.h instead of hard-code values.
      3b32b128
    • Dirk Uffmann's avatar
      [PATCH] 1127/1: static PCI memory mapping for ARM Integrator reduced · 81f4a085
      Dirk Uffmann authored
      ARM Integrator: static memory mapping of PCI register configuration space
      
      The statically allocated address range for the internal registers of the V3 PCI-bridge chip has been choosen too big. There are only 64k of registers space in this chip.
      
      Additionally, some of the entries in platform.h describing the PCI memory mapping do not match the comments in platform specific mm.c file.
      81f4a085
    • Dirk Uffmann's avatar
      [PATCH] 1126/1: Kernel decompression in head.S does not work for ARM 9xx architectures · a42f491a
      Dirk Uffmann authored
      The Kernel decompression hangs after decompression on an ARM Integrator
      equipped with an ARM920T. There has been no dedicated Cache support for 
      ARM9 architectures. 
      
      The CPU-ID mask used should allow all ARM920 revisions to be detected. 
      If ARM922 or ARM925 support the same cache methods it might be: 
      .word   0xff00ff00, allowing all 92x models and revisions to be detected.
      
      
      
      
      This time hopefully with TABs instead of white spaces...
      a42f491a
  2. 16 Apr, 2002 1 commit
  3. 15 Apr, 2002 4 commits
    • Jens Axboe's avatar
      [PATCH] 2.5.8 IDE 35 · 0c686811
      Jens Axboe authored
      - Expand configure help options a bit
      - Fix xconfig bug
      - Decrease queue depth if a command takes too long to complete
      - Test master/slave stuff. It works, but one device can heavily starve
         another. This is the simple approach right now, means that one device
         will wait until the other is completely idle before starting any
         commands This is not necessary since we can have queued commands on
         both devices at the same time. TODO.
      - Add proc output for oldest command, just for testing.
      - pci_dev compile fixes.
      - Make sure ide-disk doesn't BUG if TCQ is not used, basically this was
         fixed by off-loading the using_tcq setting to ide-tcq.
      - Remove warning about 'queued feature set not supported'
      - Abstract ide_tcq_wait_dataphase() into a function
      0c686811
    • Martin Dalecki's avatar
      [PATCH] 2.5.8 IDE 34 · 21aecbc3
      Martin Dalecki authored
      - Synchronize with 2.5.8.
      
      - Eliminate the cdrom_log_sense() function.
      
      - Pass a struct request to cdrom_analyze_sense_data() since this is the entity
         this function is working on. This shows nicely that this function is broken.
      
      - Use CDROM_PACKET_SIZE where appropriate.
      
      - Kill the obfuscating cmd_buf and cmd_len local variables from
         cdrom_transfer_packet_command(). This made it obvious that the parameters of
         this function where not adequate - to say the least. Fix this.
      
      - Pass a packed command array directly to cdrom_queue_packed_command().  This
         is reducing the number of places where we have to deal with the c member of
         struct packet_command.
      
      - Never pass NULL as sense to cdrom_lockdoor().
      
      - Eliminate cdrom_do_block_pc().
      
      - Eliminate the c member of struct packet_command. Pass them through struct
         request cmd member.
      
      - Don't enable TCQ unconditionally if there is a TCQ queue depth defined.
      
      - Fix small think in ide_cmd_ioctl() rewrite. (My appologies to everyone who
         has to use hdparm to setup his system...)
      
      - Fix compilation without PCI support.
      21aecbc3
    • Linus Torvalds's avatar
      Merge master.kernel.org:ingo/linux-2.5 · e9dc26cd
      Linus Torvalds authored
      into penguin.transmeta.com:/home/penguin/torvalds/repositories/kernel/linux
      e9dc26cd
    • Ingo Molnar's avatar
      the IRQ balancing feature is based on the following requirements: · cf6f7853
      Ingo Molnar authored
      - irq handlers should be cache-affine to a large degree, without the
        explicit use of /proc/irq/*/smp_affinity.
      
      - idle CPUs should be preferred over busy CPUs when directing IRQs towards
        them.
      
      - the distribution of IRQs should be random, to avoid all IRQs going to
        the same CPU, and to avoid 'heavy' IRQs from loading certain CPUs
        unfairly over CPUs that handle 'light' IRQs. The IRQ system has no
        knowledge about how 'heavy' an IRQ handler is in terms of CPU cycles.
      
      here is the design and implementation:
      
      - we make per-irq decisions about where the IRQ will go to next. Right
        now it's a fastpath and a slowpath, the real stuff happens in the slow
        path. The fastpath is very lightweight.
      
      - [ i decided not to measure IRQ handler overhead via RDTSC - it ends up
          being very messy, and if we want to be 100% fair then we also need to
          measure softirq overhead, and since there is no 1:1 relationship
          between softirq load and hardirq load, it's impossible to do
          correctly. So the IRQ balancer achieves fairness via randomness. ]
      
      - we stay affine in the micro timescale, and we are loading the CPUs
        fairly in the macro timescale. The IO-APIC's lowest priority
        distribution method rotated IRQs between CPUs once per IRQ, which was
        the worst possible solution for good cache-affinity.
      
      - to achieve fairness and to avoid lock-step situations some real
        randomness is needed. The IRQs will wander in the allowed CPU group
        randomly, in a brownean motion fashion. This is what the 'move()'
        function accomplishes. The IRQ moves one step forward or one step
        backwards in the allowed CPU mask. [ Note that this achieves a level of
        NUMA affinity as well, nearby CPUs are more likely to be NUMA-affine. ]
      
      - the irq balancer has some knowledge about 'how idle' a single CPU is.
        The idle task updates the idle_timestamp. Since this update is in the
        idle-to-be codepath, it does not increase the latency of idle-wakeup,
        the overhead should be zero in all cases that matter. The idle-balancing
        happens the following way: when searching for the next target CPU after
        a 'IRQ tick' has expired, we first search 'idle enough' CPUs in the
        allowed set. If this does not succeed then we search all CPUs.
      
      - the patch is fully compatible with the /proc/irq/*/smp_affinity
        interface as well, everything works as expected.
      
      note that the current implementation can be expressed equivalently in
      terms of timer-interrupt-driven IRQ redirection. But i wanted to get some
      real feedback before removing the possibility to do finer grained
      decisions - and the per-IRQ overhead is very small anyway.
      cf6f7853
  4. 14 Apr, 2002 13 commits
  5. 12 Apr, 2002 4 commits
    • Martin Dalecki's avatar
      [PATCH] 2.5.8-pre3 IDE 32 · 6a0b3e79
      Martin Dalecki authored
      - Don't provide symbolic links in /proc/ide - they are redundant data.
      
      - Try to use a more reasonable default capacity value in ata_capacity().
      
      - Fix ata_put() ata_get() usage in ide_check_media_change().
      
      - Small readability fixes to the option parsing code.
      
      - Apply Vojtech Pavliks /proc PIIX output fix.
      
      - Replace all occurrences of ide_wait_taskfile() with ide_raw_taskfile().  One
         duplicated code path fewer.
      6a0b3e79
    • Linus Torvalds's avatar
      Kernel version update · 78cb05eb
      Linus Torvalds authored
      78cb05eb
    • Jes Sorensen's avatar
      [PATCH] qla1280.c update · edb3acf2
      Jes Sorensen authored
      Included is the latest version of the code. Indenting it properly
      actually reduced the size of the files by another 10K or so.
      edb3acf2
    • Linus Torvalds's avatar
      Update defconfig for IDE TCQ configs · 3a917e20
      Linus Torvalds authored
      3a917e20
  6. 11 Apr, 2002 2 commits
  7. 09 Apr, 2002 1 commit
  8. 10 Apr, 2002 12 commits