- 17 Mar, 2011 3 commits
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Wolfram Sang authored
It can be worked around using a GPIO which will be done for i.MX later. Signed-off-by:
Wolfram Sang <w.sang@pengutronix.de> Acked-by:
Anton Vorontsov <cbouatmailru@gmail.com> Tested-by:
Marc Reilly <marc@cpdesign.com.au> Tested-by:
Eric Benard <eric@eukrea.com> Signed-off-by:
Chris Ball <cjb@laptop.org>
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Wolfram Sang authored
Signed-off-by:
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Linus Walleij authored
dma_unmap_sg() already flushes the cache, I don't get what this code is doing here. Signed-off-by:
Linus Walleij <linus.walleij@linaro.org> Signed-off-by:
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- 16 Mar, 2011 3 commits
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Guennadi Liakhovetski authored
To support MMC aggressive clock gating the driver has to stop the interface clock when the .set_ios() method is called with .clock == 0. Signed-off-by:
Guennadi Liakhovetski <g.liakhovetski@gmx.de> Signed-off-by:
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Philip Rakity authored
Some TOSHIBA MMC cards only support sector addressing even though the size is < 2GB. According to JEDEC Spec JESD84-A441-1 the ocr register (bits 30, 29) determine byte/sector mode. Use them. Signed-off-by:
Philip Rakity <prakity@marvell.com> Signed-off-by:
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Philip Rakity authored
sdio_reset sends a CMD52 to reset the sdio card. This is highly recommended for sdio cards being reinitialized. Since we do not know if the card is being reinitialized we just send the command. SD/eMMC cards are supposed to ignore the CMD before the CMD0. Document why we are doing this. Signed-off-by:
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- 15 Mar, 2011 34 commits
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Jaehoon Chung authored
This patch adds DDR mode support to dw_mmc. If we set any bit in UHS_REG bit[16:31], the card of that slot is supported for DDR mode. For example, if UHS_REG[16] is set, card number 0 is DDR mode. Signed-off-by:
Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by:
Kyungmin Park <kyungmin.park@samsung.com> Acked-by:
Will Newton <will.newton@imgtec.com> Signed-off-by:
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Chris Ball authored
drivers/mmc/host/via-sdmmc.c: In function ‘via_reset_pcictrl’: drivers/mmc/host/via-sdmmc.c:805:8: warning: variable ‘addrbase’ set but not used [-Wunused-but-set-variable] Signed-off-by:
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Chris Ball authored
Fixes: drivers/mmc/host/cb710-mmc.c: In function ‘cb710_wait_while_busy’: drivers/mmc/host/cb710-mmc.c:182:6: warning: variable ‘err’ set but not used [-Wunused-but-set-variable] Signed-off-by:
Michał Mirosław <mirq-linux@rere.qmqm.pl> Acked-by:
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Chris Ball authored
drivers/mmc/host/sdhci-pci.c: In function ‘sdhci_pci_probe_slot’: drivers/mmc/host/sdhci-pci.c:913:18: warning: variable ‘addr’ set but not used [-Wunused-but-set-variable] Signed-off-by:
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Shawn Guo authored
This adds the mmc host driver for Freescale MXS-based SoC i.MX23/28. The driver calls into mxs-dma via generic dmaengine api for both pio and data transfer. Thanks Chris Ball for the indentation patch. Signed-off-by:
Shawn Guo <shawn.guo@freescale.com> Reviewed-by:
Arnd Bergmann <arnd@arndb.de> Tested-by:
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Wolfram Sang authored
Signed-off-by:
Olof Johansson <olof@lixom.net> Signed-off-by:
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Sascha Hauer authored
This switches the mxcmmc driver to use the dmaengine API. Unlike the old one this one is always present in the tree, even if no DMA is implemented, hence we can remove all the #ifdefs in from the driver. The driver automatically switches to PIO mode if no DMA support or no suitable channel is available. Signed-off-by:
Sascha Hauer <s.hauer@pengutronix.de> Acked-by:
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Jaehoon Chung authored
This patch adds support for 8-bit buswidth. dw_mmc can use 8-bit buswidth and set to CTYPE_8BIT in card-type register. Signed-off-by:
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Jaehoon Chung authored
If we need some quirks, maybe add quirks in future But now, quirks value set to integer..later we should be confused.. So I think that need bit-shift control. And If we need not any quirks, we didn't set anything.. (Need not DW_MCI_QUIRK_NONE) Signed-off-by:
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Linus Walleij authored
Use the new dmaengine helper functions, and drop the error check on the returned cookier from the dmaengine - we recently established that this is really not allowed to fail. Signed-off-by:
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Linus Walleij authored
This variable doesn't seem to be used for anything after the other patches so just drop it. Signed-off-by:
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Linus Walleij authored
According to the DMA-API you shall unmap the sglists with the same sglist length as passed into the mapping function, not the returned value from the mapping function. Signed-off-by:
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Linus Walleij authored
As established for the MMCI, it is proper to map the DMA buffers on the DMA engine which is the one actually performing the DMA. Signed-off-by:
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Linus Walleij authored
Use the new dmaengine helper functions, and drop the error check on the returned cookier from the dmaengine - we recently established that this is really not allowed to fail. Signed-off-by:
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Linus Walleij authored
The host_sglen is now actually used to keep track of whether DMA is active or not, so rename and retype it to bool. Signed-off-by:
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Linus Walleij authored
According to the DMA-API you shall unmap the sglists with the same sglist length as passed into the mapping function, not the returned value from the mapping function. Signed-off-by:
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Linus Walleij authored
As established for the MMCI, it is proper to map the DMA buffers on the DMA engine which is the one actually performing the DMA. Signed-off-by:
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Linus Walleij authored
Use the new dmaengine helpers to make the code more readable. Signed-off-by:
Nicolas Ferre <nicolas.ferre@atmel.com> Signed-off-by:
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Linus Walleij authored
Fixes the following: - It is perfectly legal for the dma_map_sg() to return fewer entries than were passed in. - Supply the returned numer of (possibly coalesced) entries to the device_pre_slave_sg() function. - Use the proper original sg_len when unmapping the sglist in the error path. Signed-off-by:
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Linus Walleij authored
As established for the MMCI, it is proper to map the DMA buffers on the DMA engine which is the one actually performing the DMA. Signed-off-by:
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Manoj Iyer authored
Signed-off-by:
Manoj Iyer <manoj.iyer@canonical.com> Cc: <stable@kernel.org> Signed-off-by:
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Mark Brown authored
So we know the implementation and prototypes agree with each other. Signed-off-by:
Mark Brown <broonie@opensource.wolfsonmicro.com> Reviewed-by:
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Will Newton authored
The test file is created under debugfs, not sysfs. Also remove the unnecessary default n. Signed-off-by:
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Will Newton authored
Setting this bit in the clock enable register will stop the clock when the card is in the IDLE state. Signed-off-by:
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Will Newton authored
We need to run the card detect tasklet at the end of slot initialisation as it is possible that a card has been inserted prior to boot, so we don't see an insertion interrupt and now the card is sitting there inserted but with no power to it. Signed-off-by:
Neil Jones <neil.jones@imgtec.com> Signed-off-by:
Matt Fleming <matt@console-pimps.org> Signed-off-by:
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Fabio Estevam authored
Currently MMC_MXC driver can be selected by all i.MX devices. Restrict its use only for the appropriate processors. Signed-off-by:
Fabio Estevam <fabio.estevam@freescale.com> Acked-by:
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Simon Horman authored
Reviewed-by:
Simon Horman <horms@verge.net.au> Signed-off-by:
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Adrian Hunter authored
Add two large sequential I/O performance tests: 35. Large sequential read into scattered pages 36. Large sequential write from scattered pages The tests measure transfer times for 10MiB, 100MiB, 1000MiB. Signed-off-by:Adrian Hunter <adrian.hunter@nokia.com> Signed-off-by:
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Adrian Hunter authored
Existing performance tests measure single or sequential I/O speed. Add two random I/O tests: 33. Random read performance by transfer size 34. Random write performance by transfer size Signed-off-by: -
Adrian Hunter authored
The test area size was set to the preferred erase size but for comparison purposes it is better if it is the same size for different devices. Make it a multiple of preferred erase size that is greater than or equal to 4MiB. Signed-off-by:
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Pierre Tardy authored
This sdio card supports having its sdio clock shutdown. It is also not using the SDIO IRQ, but rather uses a side gpio irq. Signed-off-by:
Pierre Tardy <tardyp@gmail.com> Signed-off-by:
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Pierre Tardy authored
Some sdio card are not following sdio standard, and do not work when the sdio bus's clock is gated. To keep functionnality for all legacy driver, we turn this quirk on for every sdio card. Drivers needs to disable the quirk manually when someone verifies that their supported card works with clock gating. Signed-off-by:
Ohad Ben-Cohen <ohad@wizery.com> Signed-off-by:
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Pierre Tardy authored
Some cards have quirks valid for every platforms using current platform quirk hooks leads to a lot of code and debug duplication. So we inspire a bit from what exists in PCI subsystem and do our own per vendorid/deviceid quirk. We still drop the complexity of the pci quirk system (with special section tables, and so on). That can be added later if needed. Signed-off-by:
Pierre Tardy <pierre.tardy@intel.com> Acked-by:
Linus Walleij <linus.walleij@stericsson.com> Acked-by:
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Pierre Tardy authored
Since mmc clock gating can also be used as a power gating tip, it's better to put the led blinking after having ungated the clock. Signed-off-by:
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