- 23 Feb, 2024 40 commits
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Alexander Sverdlin authored
Fix link error: ld.bfd: drivers/mfd/twl-core.o: in function `twl_probe': git/drivers/mfd/twl-core.c:846: undefined reference to `devm_mfd_add_devices' Cc: <stable@vger.kernel.org> Fixes: 63416320 ("mfd: twl-core: Add a clock subdevice for the TWL6032") Signed-off-by:
Alexander Sverdlin <alexander.sverdlin@siemens.com> Reviewed-by:
Andreas Kemnade <andreas@kemnade.info> Link: https://lore.kernel.org/r/20240221143021.3542736-1-alexander.sverdlin@siemens.comSigned-off-by:
Lee Jones <lee@kernel.org>
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Ricardo B. Marliere authored
Since commit aed65af1 ("drivers: make device_type const"), the driver core can properly handle constant struct device_type. Move the mfd_dev_type variable to be a constant structure as well, placing it into read-only memory which can not be modified at runtime. Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org> Signed-off-by:
Ricardo B. Marliere <ricardo@marliere.net> Link: https://lore.kernel.org/r/20240219-device_cleanup-mfd-v1-1-e4eef5ed2da8@marliere.netSigned-off-by:
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Ondrej Jirman authored
Process rise event last, to avoid stuck keys when multiple interrupts are coalesced. This can happen typically when resuming from suspend via power key press and holding the power button for a bit too short, so that RISE an FALL IRQ flags are set before any interrupt routine has a chance to run. Input subsystem will interpret it as holding down a power key for a long time, which leads to unintended initiation of shutdown UI on some OSes. Signed-off-by:
Ondrej Jirman <megi@xff.cz> Link: https://lore.kernel.org/r/20240217195615.1767907-1-megi@xff.czSigned-off-by:
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Andreas Kemnade authored
Instead of only accepting the ti specific properties accept also the standard property. For uniformity, search in the parent node for the tag. The code for powering off is also isolated from the rest in this file. So it is a pure Linux design decision to put it here. Signed-off-by:
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Andreas Kemnade authored
If the system-power-controller property is there, enable power off. Implementation is based on a Linux v3.0 vendor kernel. Signed-off-by:
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Andreas Kemnade authored
Add system-power-controller property because these chips can power off the device. Signed-off-by:
Conor Dooley <conor.dooley@microchip.com> Link: https://lore.kernel.org/r/20240217082007.3238948-2-andreas@kemnade.infoSigned-off-by:
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Peter Griffin authored
of_parse_phandle() returns a device_node with refcount incremented, which the callee needs to call of_node_put() on when done. We should only call of_node_put() when the property argument is provided though as otherwise nothing has taken a reference on the node. Fixes: f36e789a ("mfd: altera-sysmgr: Add SOCFPGA System Manager") Signed-off-by:
Peter Griffin <peter.griffin@linaro.org> Link: https://lore.kernel.org/r/20240220115012.471689-4-peter.griffin@linaro.orgSigned-off-by:
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Peter Griffin authored
The kernel coding style does not require 'extern' in function prototypes in .h files, so remove them as they are not needed. To avoid checkpatch warnings such as CHECK: Lines should not end with a '(' +struct regmap *syscon_regmap_lookup_by_phandle( The indentation is also updated. No functional changes in this patch. Signed-off-by: -
Peter Griffin authored
of_parse_phandle() returns a device_node with refcount incremented, which the callee needs to call of_node_put() on when done. We should only call of_node_put() when the property argument is provided though as otherwise nothing has taken a reference on the node. Fixes: 45330bb4 ("mfd: syscon: Allow property as NULL in syscon_regmap_lookup_by_phandle") Signed-off-by:
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Geert Uytterhoeven authored
Use the FIELD_GET() helper, instead of defining a custom macro implementing the same operation. Signed-off-by:
Geert Uytterhoeven <geert+renesas@glider.be> Reviewed-by:
Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Link: https://lore.kernel.org/r/ef7d5fc3d867338520392417cdf2b67ba19aecde.1708002264.git.geert+renesas@glider.beSigned-off-by:
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Bo Liu authored
The maple tree register cache is based on a much more modern data structure than the rbtree cache and makes optimisation choices which are probably more appropriate for modern systems than those made by the rbtree cache. Signed-off-by:
Bo Liu <liubo03@inspur.com> Link: https://lore.kernel.org/r/20240206071314.8721-19-liubo03@inspur.comSigned-off-by:
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Bo Liu authored
The maple tree register cache is based on a much more modern data structure than the rbtree cache and makes optimisation choices which are probably more appropriate for modern systems than those made by the rbtree cache. Signed-off-by:
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Bo Liu authored
The maple tree register cache is based on a much more modern data structure than the rbtree cache and makes optimisation choices which are probably more appropriate for modern systems than those made by the rbtree cache. Signed-off-by:
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Bo Liu authored
The maple tree register cache is based on a much more modern data structure than the rbtree cache and makes optimisation choices which are probably more appropriate for modern systems than those made by the rbtree cache. Signed-off-by:
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Bo Liu authored
The maple tree register cache is based on a much more modern data structure than the rbtree cache and makes optimisation choices which are probably more appropriate for modern systems than those made by the rbtree cache. Signed-off-by:
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Bo Liu authored
The maple tree register cache is based on a much more modern data structure than the rbtree cache and makes optimisation choices which are probably more appropriate for modern systems than those made by the rbtree cache. Signed-off-by:
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Bo Liu authored
The maple tree register cache is based on a much more modern data structure than the rbtree cache and makes optimisation choices which are probably more appropriate for modern systems than those made by the rbtree cache. Signed-off-by:
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Bo Liu authored
The maple tree register cache is based on a much more modern data structure than the rbtree cache and makes optimisation choices which are probably more appropriate for modern systems than those made by the rbtree cache. Signed-off-by:
Matti Vaittinen <mazziesaccount@gmail.com> Link: https://lore.kernel.org/r/20240206071314.8721-12-liubo03@inspur.comSigned-off-by:
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Bo Liu authored
The maple tree register cache is based on a much more modern data structure than the rbtree cache and makes optimisation choices which are probably more appropriate for modern systems than those made by the rbtree cache. Signed-off-by:
Charles Keepax <ckeepax@opensource.cirrus.com> Link: https://lore.kernel.org/r/20240206071314.8721-11-liubo03@inspur.comSigned-off-by:
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Bo Liu authored
The maple tree register cache is based on a much more modern data structure than the rbtree cache and makes optimisation choices which are probably more appropriate for modern systems than those made by the rbtree cache. Signed-off-by:
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Bo Liu authored
The maple tree register cache is based on a much more modern data structure than the rbtree cache and makes optimisation choices which are probably more appropriate for modern systems than those made by the rbtree cache. Signed-off-by:
Neil Armstrong <neil.armstrong@linaro.org> Link: https://lore.kernel.org/r/20240206071314.8721-9-liubo03@inspur.comSigned-off-by:
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Bo Liu authored
The maple tree register cache is based on a much more modern data structure than the rbtree cache and makes optimisation choices which are probably more appropriate for modern systems than those made by the rbtree cache. Signed-off-by:
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Bo Liu authored
The maple tree register cache is based on a much more modern data structure than the rbtree cache and makes optimisation choices which are probably more appropriate for modern systems than those made by the rbtree cache. Signed-off-by:
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Bo Liu authored
The maple tree register cache is based on a much more modern data structure than the rbtree cache and makes optimisation choices which are probably more appropriate for modern systems than those made by the rbtree cache. Signed-off-by:
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Bo Liu authored
The maple tree register cache is based on a much more modern data structure than the rbtree cache and makes optimisation choices which are probably more appropriate for modern systems than those made by the rbtree cache. Signed-off-by:
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Bo Liu authored
The maple tree register cache is based on a much more modern data structure than the rbtree cache and makes optimisation choices which are probably more appropriate for modern systems than those made by the rbtree cache. Signed-off-by:
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Bo Liu authored
The maple tree register cache is based on a much more modern data structure than the rbtree cache and makes optimisation choices which are probably more appropriate for modern systems than those made by the rbtree cache. Signed-off-by:
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Bo Liu authored
The maple tree register cache is based on a much more modern data structure than the rbtree cache and makes optimisation choices which are probably more appropriate for modern systems than those made by the rbtree cache. Signed-off-by:
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Ricardo B. Marliere authored
Now that the driver core can properly handle constant struct bus_type, move the mcp_bus_type variable to be a constant structure as well, placing it into read-only memory which can not be modified at runtime. Suggested-by:
Greg Kroah-Hartman <gregkh@linuxfoundation.org> Signed-off-by:
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Charles Keepax authored
Including some missing headers. Suggested-by:
Andy Shevchenko <andy.shevchenko@gmail.com> Signed-off-by:
Mark Brown <broonie@kernel.org> Link: https://lore.kernel.org/r/20240129152557.3221212-1-ckeepax@opensource.cirrus.comSigned-off-by:
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Andrew Davis authored
Add TI SERDES control registers compatible. This is a region found in the TI AM65 CTRL_MMR0 register space[0]. Each instance is used to control a SERDES clock and lane select mux. [0] https://www.ti.com/lit/pdf/spruid7Signed-off-by:
Andrew Davis <afd@ti.com> Acked-by:
Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20240205174736.27749-1-afd@ti.comSigned-off-by:
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Siddharth Vadapalli authored
The PCIE_CTRL registers within the CTRL_MMR space of TI's J784S4 SoC are used to configure the link speed, lane count and mode of operation of the respective PCIe instance. Add compatible for allowing the PCIe driver to obtain a regmap for the PCIE_CTRL register within the System Controller device-tree node in order to configure the PCIe instance accordingly. The Technical Reference Manual for J784S4 SoC with details of the PCIE_CTRL registers is available at: https://www.ti.com/lit/zip/spruj52Signed-off-by:
Siddharth Vadapalli <s-vadapalli@ti.com> Acked-by:
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Dharma Balasubiramani authored
Convert the atmel,hlcdc binding to DT schema format. Align clocks and clock-names properties to clearly indicate that the LCD controller expects lvds_pll_clk when interfaced with the lvds display. This alignment with the specific hardware requirements ensures accurate device tree configuration for systems utilizing the HLCDC IP. Signed-off-by:
Dharma Balasubiramani <dharma.b@microchip.com> Reviewed-by:
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Charles Keepax authored
As it devm_pm_runtime_enable() can fail due to memory allocations, it is best to handle the error. Suggested-by:
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Charles Keepax authored
Use of dev_err_probe() was missed in the i2c and sdw parts of the code, update the missing parts. Suggested-by:
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Charles Keepax authored
Make the defines a little clearer by adding time based postfixes. Suggested-by:
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Charles Keepax authored
__xxx is the preferred type for firmware interfaces. Suggested-by:
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Charles Keepax authored
Use more forward declarations, move header guards to cover other includes, and rely less on including headers through other headers. Suggested-by:
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Maciej Strozek authored
Current code executes only once despite the while loop, so remove the loop. Also msleep(1) will likely result in a larger sleep, so increase its value for clarity while keeping the same behaviour. Signed-off-by:
Maciej Strozek <mstrozek@opensource.cirrus.com> Reviewed-by:
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Simon Horman authored
Although it does not seem to have any untoward side-effects, the use of ';' to separate to assignments seems more appropriate than ','. Flagged by clang-17 -Wcomma No functional change intended. Compile tested only. Signed-off-by:
Simon Horman <horms@kernel.org> Link: https://lore.kernel.org/r/20240123-rave-sp-comma-v1-1-84e9b15ba205@kernel.orgSigned-off-by:
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