- 13 Jul, 2022 26 commits
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Guenter Roeck authored
MAX6642 is a reduced version of LM90 with no low limits and no conversion rate register. Its alert functionality is broken, similar to many other chips supported by the lm90 driver. After this change, the stand-alone max6642 driver is only needed if the lm90 driver is disabled. Make it dependent on SENSORS_LM90=n to show that it is not needed if the lm90 driver is enabled. A devicetree node is not added for this chip since it is quite unlikely that such an old chip will ever be used in a devicetree based system. It can be added later if needed. Signed-off-by: Guenter Roeck <linux@roeck-us.net>
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Guenter Roeck authored
A flag indicating support for setting the conversion rate doesn't cost much and will enable us to add support for MAX6642 to the lm90 driver. Signed-off-by: Guenter Roeck <linux@roeck-us.net>
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Guenter Roeck authored
A flag indicating support for minimum temperature limits doesn't cost much and will enable us to add support for MAX6642 to the lm90 driver. Signed-off-by: Guenter Roeck <linux@roeck-us.net>
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Guenter Roeck authored
MAX6690 is all but identical to MAX6654. Revision 1 of its datasheet lists the same chip ID as MAX6654, and a chip labeled MAX6654 was found to have the chip ID listed as MAX6690 chip ID in Revision 2 of its datasheet. A devicetree node is not added for this chip since it is quite unlikely that such an old chip will ever be used in a devicetree based system. It can be added later if needed. Signed-off-by: Guenter Roeck <linux@roeck-us.net>
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Guenter Roeck authored
ADT7461A and NCT1008 support the undocumented manufacturer and chip ID registers at 0x3e and 0x3f, and return 0x61 as chip ID. ADM1032 and ADT7461 do not support those registers but return 0 when reading them. Use this information to improve the accuracy of the chip detection code. Signed-off-by: Guenter Roeck <linux@roeck-us.net>
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Guenter Roeck authored
ADT7481, ADT7482, and ADT7483 are similar to ADT7461, but support two external temperature sensors, similar to MAX6695/6696. They support an extended temperature range similar to ADT7461. Registers for the second external channel can be accessed directly or by using the same method as used by MAX6695/6696. For simplicity, the access method implemented for MAX6695/6696 is used. The chips support PEC (packet error checking). Set the PEC feature flag and let the user decide if it should be enabled or not (it is by default disabled). Even though it is only documented for ADT7483, all three chips support a secondary manufacturer ID register at 0x3e and a chip ID register at 0x3f. Use the contents of those registers register for improved chip detection accuracy. Add the same check to the ADT7461A detection code since this chip also supports the same (undocumented) registers. Devicetree nodes are not added for the added chips since it is quite unlikely that such old chips will ever be used in a devicetree based system. They can be added later if needed. Reviewed-by: Slawomir Stepien <sst@poczta.fm> Signed-off-by: Guenter Roeck <linux@roeck-us.net>
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Guenter Roeck authored
Unlike MAX6646/MAX6647/MAX6649, MAX6648 and MAX6692 only support a temperature range of 0..127 degrees C. Separate support for the two sets of chips to be able to support maximum temperature ranges correctly for all chips. Introduce new feature flag to indicate temperature support up to 255 degrees C. Since the chips are almost identical except for the supported temperature range, automatic chip detection is limited. Effectively this means that MAX6648 may be mis-detected as MAX6649 when auto-detected, but there is nothing we can do about that. Devicetree nodes are not added for the added chips since it is quite unlikely that such old chips will ever be used in a devicetree based system. They can be added later if needed. Signed-off-by: Guenter Roeck <linux@roeck-us.net>
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Guenter Roeck authored
We don't want to support the obsolete 'alarms' attribute for new chips supported by this driver. Add flag to indicate 'alarms' attribute support and use it for existing chips. This flag will not be set for additional chips supported by this driver in the future. Signed-off-by: Guenter Roeck <linux@roeck-us.net>
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Guenter Roeck authored
When support for G781 was added, chips with ID 0x01 were found at I2C addresses 0x4c and 0x4d. The G781 datasheet (version 1.3 from October 2003) says that the device ID for G781-1 is 0x03, not 0x01. Also, the datasheet states that the chip at I2C address is G781 and the chip at I2C address 0x4d is G781-1. A G781-1 at I2C address 0x4d was now found to have a chip ID of 0x03 as suggested by the datasheet. Accept both 0x01 and 0x03 chip IDs at both addresses to ensure that all variants of G781 are detected properly. While at it, improve chip detection accuracy by reading two additional registers and ensuring that only expected bits are set in those registers. Signed-off-by: Guenter Roeck <linux@roeck-us.net>
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Guenter Roeck authored
The NCT1008 datasheet, Revision 3, states that its chip revision is 0x57. This matches the ADT7461A chip revision, and NCT1008 is therefore detected as ADT7461A. In revision 6 of the datasheet, the chip revision register is no longer documented. Multiple samples of NCT1008 were found to report a chip revision of 0x54. As it turns out, one of the patches submitted to add NCT1008 support to the lm90 driver already included a check for chip revision 0x54. Unfortunately, that patch never made it into the kernel. Remedy the situation and explicitly detect chips with revision 0x54 as NCT1008. Signed-off-by: Guenter Roeck <linux@roeck-us.net>
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Guenter Roeck authored
The detect function is getting larger and larger and difficult to understand or review. Split it into per-manufacturer detect functions to improve readability. Signed-off-by: Guenter Roeck <linux@roeck-us.net>
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Guenter Roeck authored
Since temperature conversion functions are now unified, there is no need to keep "the chip supports a configurable extended temperature range" and "the chip has extended temperature range enabled" flags separate. Use a single flag instead to reflect both. Signed-off-by: Guenter Roeck <linux@roeck-us.net>
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Guenter Roeck authored
While most LM90 compatible chips support a temperature sensor resolution of 11 bit, this is not the case for all chips. ADT7461 only supports a resolution of 10 bit, and TMP451/TMP461 support a resolution of 12 bit. Add support for various temperature sensor resolutions. To do this, model all temperature sensors as 16 bit sensors, and use unified temperature conversion functions which take the sensor resolution as parameter. While enhancing functionality, this has the positive side effect of reducing code size by about 5%. Signed-off-by: Guenter Roeck <linux@roeck-us.net>
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Guenter Roeck authored
When reading 16-bit volatile registers, the code uses a trick to determine if a temperature is consistent: It reads the high part of the register twice. If the values are the same, the code assumes that the reading is consistent. If the value differs, the code re-reads the second register as well and assumes that it now has correct values. This is only necessary for volatile registers. Add a parameter to lm90_read16() to indicate if the register is volatile to avoid the extra overhead for non-volatile registers. Signed-off-by: Guenter Roeck <linux@roeck-us.net>
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Guenter Roeck authored
ADT7461 and TMP451 temperature sensors support extended temperature ranges. If standard temperature range is selected, the temperature range is unsigned and limited to 0 .. 127 degrees C. For TMP461, the standard temperature range is -128000 ... 127000 degrees C. Distinguish between the two chips by introducing a feature flag indicating if the standard temperature range is signed or unsigned. Use the same flag for MAX6646/ MAX6647 as well since those chips also support unsigned temperatures. Note that while the datasheet for ADT7461 suggests that the default temperature range is unsigned, tests with a real chip suggest that this is not the case: If the temperature offset is set to a value << 0, the temperature register does report negative values. Tests with real chips show that MAX6680/MAX6681 and SA56004 report temperatures of 128 degrees C and higher as negative temperatures. Add respective comments to the code. Also use clamp_val() and DIV_ROUND_CLOSEST where appropriate in calculations. Signed-off-by: Guenter Roeck <linux@roeck-us.net>
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Guenter Roeck authored
Experiments show that ADT7461A and NCT1008 support PEC, even though it is not documented. Enable support for it in the driver. Since ADT7461 only supports partial PEC, this means that the configuration for ADT7461A needs to be separated from ADT7461. Signed-off-by: Guenter Roeck <linux@roeck-us.net>
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Guenter Roeck authored
Revision 0 of the ADT7461 datasheet suggests that the chip supports PEC (packet error checking). This information is gone in later versions of the datasheet. Experiments show that PEC support on ADT7461 is similar to PEC support in ADM1032, ie it is only supported for read operations. Add support for it to the driver. Signed-off-by: Guenter Roeck <linux@roeck-us.net>
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Guenter Roeck authored
PEC (packet error checking) support for ADM1032 is currently only enabled if the chip was auto-detected, but not if a chip is instantiated explicitly. Always enable PEC support by introducing a chip feature flag indicating partial PEC support. Also, for consistency, disable PEC support by default to match existing functionality if the chip was not auto- detected. At the same time, introduce generic support for PEC with a separate feature flag. This will be used when support for chips with full PEC functionality is added. Signed-off-by: Guenter Roeck <linux@roeck-us.net>
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Guenter Roeck authored
The register write address either matches the read address, or it is the read address plus 6. Simplify the code and resolve the write address programmatically instead of having two defines for each register. Signed-off-by: Guenter Roeck <linux@roeck-us.net>
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Guenter Roeck authored
Handling bit shifts necessary to extract status bits during compile time reduces code and data size by almost 5% when building for x86_64. Signed-off-by: Guenter Roeck <linux@roeck-us.net>
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Guenter Roeck authored
Use BIT macro instead of shift operation to improve readability. No functional change. Signed-off-by: Guenter Roeck <linux@roeck-us.net>
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Guenter Roeck authored
Reorder chip enumeration in alphabetical order to make it easier to see which chips are supported, and to clarify where to add support new chip types. No functional change. Signed-off-by: Guenter Roeck <linux@roeck-us.net>
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Guenter Roeck authored
Reorder include files in alphabetical order to reduce the chance of duplicates and to make it clear where new include files should be added. Drop the unnecessary include of linux/sysfs.h. Include linux/device.h instead because that is what is actually used. No functional change. Signed-off-by: Guenter Roeck <linux@roeck-us.net>
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Guenter Roeck authored
Many chips supported by this driver clear status registers after it is read and update it in the next measurement cycle. Normally this falls under the radar because all registers are only read once per measurement cycle. However, there is an exception: Status registers are always read during interrupt and laert handling. This can result in invalid status reports if userspace reads an alarm attribute immediately afterwards. Rework alarm/status handling by keeping a shadow register with 'current' alarms, and by ensuring that the register is either only updated once per measurement cycle or not cleared. A second problem is related to alert handling: Alert handling is disabled for chips with broken alert after an alert was reported, but only re-enabled if attributes are read by the user. This means that alert conditions may appear and disappear unnoticed. Remedy the situation by introducing a worker to periodically read the status register(s) while alert handling is disabled, and re-enable alerts after the alert condition clears. Yet another problem is that sysfs and udev events are currently only reported to userspace if an alarm is raised, but not if an alarm condition clears. Use the new worker to detect that situation and also generate sysfs and udev events in that case. Signed-off-by: Guenter Roeck <linux@roeck-us.net>
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Guenter Roeck authored
So far the driver only generated sysfs and udev events for minimum and maximum alarms. Also generate events for critical and emergency alarms. Signed-off-by: Guenter Roeck <linux@roeck-us.net>
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Guenter Roeck authored
Enabling and disabling PEC for PMBus devices is currently only supported with a debugfs attribute, which requires debugfs to be enabled and is thus less than perfect. Take the lm90 driver as example and add a 'pec' attribute to the I2C device if both the I2C adapter and the PMBus device support it. Remove the now obsolete 'pec' attribute from debugfs. Cc: Andrew Jeffery <andrew@aj.id.au> Signed-off-by: Guenter Roeck <linux@roeck-us.net>
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- 03 Jul, 2022 4 commits
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Linus Torvalds authored
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Linus Torvalds authored
Looking at the conditional lock acquire functions in the kernel due to the new sparse support (see commit 4a557a5d "sparse: introduce conditional lock acquire function attribute"), it became obvious that the lockref code has a couple of them, but they don't match the usual naming convention for the other ones, and their return value logic is also reversed. In the other very similar places, the naming pattern is '*_and_lock()' (eg 'atomic_put_and_lock()' and 'refcount_dec_and_lock()'), and the function returns true when the lock is taken. The lockref code is superficially very similar to the refcount code, only with the special "atomic wrt the embedded lock" semantics. But instead of the '*_and_lock()' naming it uses '*_or_lock()'. And instead of returning true in case it took the lock, it returns true if it *didn't* take the lock. Now, arguably the reflock code is quite logical: it really is a "either decrement _or_ lock" kind of situation - and the return value is about whether the operation succeeded without any special care needed. So despite the similarities, the differences do make some sense, and maybe it's not worth trying to unify the different conditional locking primitives in this area. But while looking at this all, it did become obvious that the 'lockref_get_or_lock()' function hasn't actually had any users for almost a decade. The only user it ever had was the shortlived 'd_rcu_to_refcount()' function, and it got removed and replaced with 'lockref_get_not_dead()' back in 2013 in commits 0d98439e ("vfs: use lockred 'dead' flag to mark unrecoverably dead dentries") and e5c832d5 ("vfs: fix dentry RCU to refcounting possibly sleeping dput()") In fact, that single use was removed less than a week after the whole function was introduced in commit b3abd802 ("lockref: add 'lockref_get_or_lock() helper") so this function has been around for a decade, but only had a user for six days. Let's just put this mis-designed and unused function out of its misery. We can think about the naming and semantic oddities of the remaining 'lockref_put_or_lock()' later, but at least that function has users. And while the naming is different and the return value doesn't match, that function matches the whole '{atomic,refcount}_dec_and_test()' pattern much better (ie the magic happens when the count goes down to zero, not when it is incremented from zero). Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
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Linus Torvalds authored
The kernel tends to try to avoid conditional locking semantics because it makes it harder to think about and statically check locking rules, but we do have a few fundamental locking primitives that take locks conditionally - most obviously the 'trylock' functions. That has always been a problem for 'sparse' checking for locking imbalance, and we've had a special '__cond_lock()' macro that we've used to let sparse know how the locking works: # define __cond_lock(x,c) ((c) ? ({ __acquire(x); 1; }) : 0) so that you can then use this to tell sparse that (for example) the spinlock trylock macro ends up acquiring the lock when it succeeds, but not when it fails: #define raw_spin_trylock(lock) __cond_lock(lock, _raw_spin_trylock(lock)) and then sparse can follow along the locking rules when you have code like if (!spin_trylock(&dentry->d_lock)) return LRU_SKIP; .. sparse sees that the lock is held here.. spin_unlock(&dentry->d_lock); and sparse ends up happy about the lock contexts. However, this '__cond_lock()' use does result in very ugly header files, and requires you to basically wrap the real function with that macro that uses '__cond_lock'. Which has made PeterZ NAK things that try to fix sparse warnings over the years [1]. To solve this, there is now a very experimental patch to sparse that basically does the exact same thing as '__cond_lock()' did, but using a function attribute instead. That seems to make PeterZ happy [2]. Note that this does not replace existing use of '__cond_lock()', but only exposes the new proposed attribute and uses it for the previously unannotated 'refcount_dec_and_lock()' family of functions. For existing sparse installations, this will make no difference (a negative output context was ignored), but if you have the experimental sparse patch it will make sparse now understand code that uses those functions, the same way '__cond_lock()' makes sparse understand the very similar 'atomic_dec_and_lock()' uses that have the old '__cond_lock()' annotations. Note that in some cases this will silence existing context imbalance warnings. But in other cases it may end up exposing new sparse warnings for code that sparse just didn't see the locking for at all before. This is a trial, in other words. I'd expect that if it ends up being successful, and new sparse releases end up having this new attribute, we'll migrate the old-style '__cond_lock()' users to use the new-style '__cond_acquires' function attribute. The actual experimental sparse patch was posted in [3]. Link: https://lore.kernel.org/all/20130930134434.GC12926@twins.programming.kicks-ass.net/ [1] Link: https://lore.kernel.org/all/Yr60tWxN4P568x3W@worktop.programming.kicks-ass.net/ [2] Link: https://lore.kernel.org/all/CAHk-=wjZfO9hGqJ2_hGQG3U_XzSh9_XaXze=HgPdvJbgrvASfA@mail.gmail.com/ [3] Acked-by: Peter Zijlstra <peterz@infradead.org> Cc: Alexander Aring <aahringo@redhat.com> Cc: Luc Van Oostenryck <luc.vanoostenryck@gmail.com> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
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git://git.kernel.org/pub/scm/fs/xfs/xfs-linuxLinus Torvalds authored
Pull xfs fixes from Darrick Wong: "This fixes some stalling problems and corrects the last of the problems (I hope) observed during testing of the new atomic xattr update feature. - Fix statfs blocking on background inode gc workers - Fix some broken inode lock assertion code - Fix xattr leaf buffer leaks when cancelling a deferred xattr update operation - Clean up xattr recovery to make it easier to understand. - Fix xattr leaf block verifiers tripping over empty blocks. - Remove complicated and error prone xattr leaf block bholding mess. - Fix a bug where an rt extent crossing EOF was treated as "posteof" blocks and cleaned unnecessarily. - Fix a UAF when log shutdown races with unmount" * tag 'xfs-5.19-fixes-4' of git://git.kernel.org/pub/scm/fs/xfs/xfs-linux: xfs: prevent a UAF when log IO errors race with unmount xfs: dont treat rt extents beyond EOF as eofblocks to be cleared xfs: don't hold xattr leaf buffers across transaction rolls xfs: empty xattr leaf header blocks are not corruption xfs: clean up the end of xfs_attri_item_recover xfs: always free xattri_leaf_bp when cancelling a deferred op xfs: use invalidate_lock to check the state of mmap_lock xfs: factor out the common lock flags assert xfs: introduce xfs_inodegc_push() xfs: bound maximum wait time for inodegc work
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- 02 Jul, 2022 8 commits
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git://git.kernel.org/pub/scm/linux/kernel/git/cel/linuxLinus Torvalds authored
Pull nfsd fixes from Chuck Lever: "Notable regression fixes: - Fix NFSD crash during NFSv4.2 READ_PLUS operation - Fix incorrect status code returned by COMMIT operation" * tag 'nfsd-5.19-2' of git://git.kernel.org/pub/scm/linux/kernel/git/cel/linux: SUNRPC: Fix READ_PLUS crasher NFSD: restore EINVAL error translation in nfsd_commit()
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git://git.kernel.org/pub/scm/linux/kernel/git/deller/parisc-linuxLinus Torvalds authored
Pull parisc architecture fixes from Helge Deller: "Two important fixes for bugs in code which was added in 5.18: - Fix userspace signal failures on 32-bit kernel due to a bug in vDSO - Fix 32-bit load-word unalignment exception handler which returned wrong values" * tag 'for-5.19/parisc-4' of git://git.kernel.org/pub/scm/linux/kernel/git/deller/parisc-linux: parisc: Fix vDSO signal breakage on 32-bit kernel parisc/unaligned: Fix emulate_ldw() breakage
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Helge Deller authored
Addition of vDSO support for parisc in kernel v5.18 suddenly broke glibc signal testcases on a 32-bit kernel. The trampoline code (sigtramp.S) which is mapped into userspace includes an offset to the context data on the stack, which is used by gdb and glibc to get access to registers. In a 32-bit kernel we used by mistake the offset into the compat context (which is valid on a 64-bit kernel only) instead of the offset into the "native" 32-bit context. Reported-by: John David Anglin <dave.anglin@bell.net> Tested-by: John David Anglin <dave.anglin@bell.net> Fixes: df24e178 ("parisc: Add vDSO support") CC: stable@vger.kernel.org # 5.18 Signed-off-by: Helge Deller <deller@gmx.de>
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Linus Torvalds authored
Merge tag 'perf-tools-fixes-for-v5.19-2022-07-02' of git://git.kernel.org/pub/scm/linux/kernel/git/acme/linux Pull perf tools fixes from Arnaldo Carvalho de Melo: - BPF program info linear (BPIL) data is accessed assuming 64-bit alignment resulting in undefined behavior as the data is just byte aligned. Fix it, Found using -fsanitize=undefined. - Fix 'perf offcpu' build on old kernels wrt task_struct's state/__state field. - Fix perf_event_attr.sample_type setting on the 'offcpu-time' event synthesized by the 'perf offcpu' tool. - Don't bail out when synthesizing PERF_RECORD_ events for pre-existing threads when one goes away while parsing its procfs entries. - Don't sort the task scan result from /proc, its not needed and introduces bugs when the main thread isn't the first one to be processed. - Fix uninitialized 'offset' variable on aarch64 in the unwind code. - Sync KVM headers with the kernel sources. * tag 'perf-tools-fixes-for-v5.19-2022-07-02' of git://git.kernel.org/pub/scm/linux/kernel/git/acme/linux: perf synthetic-events: Ignore dead threads during event synthesis perf synthetic-events: Don't sort the task scan result from /proc perf unwind: Fix unitialized 'offset' variable on aarch64 tools headers UAPI: Sync linux/kvm.h with the kernel sources perf bpf: 8 byte align bpil data tools kvm headers arm64: Update KVM headers from the kernel sources perf offcpu: Accept allowed sample types only perf offcpu: Fix build failure on old kernels
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git://git.kernel.org/pub/scm/linux/kernel/git/powerpc/linuxLinus Torvalds authored
Pull powerpc fixes from Michael Ellerman: - Fix BPF uapi confusion about the correct type of bpf_user_pt_regs_t. - Fix virt_addr_valid() when memory is hotplugged above the boot-time high_memory value. - Fix a bug in 64-bit Book3E map_kernel_page() which would incorrectly allocate a PMD page at PUD level. - Fix a couple of minor issues found since we enabled KASAN for 64-bit Book3S. Thanks to Aneesh Kumar K.V, Cédric Le Goater, Christophe Leroy, Kefeng Wang, Liam Howlett, Nathan Lynch, and Naveen N. Rao. * tag 'powerpc-5.19-4' of git://git.kernel.org/pub/scm/linux/kernel/git/powerpc/linux: powerpc/memhotplug: Add add_pages override for PPC powerpc/bpf: Fix use of user_pt_regs in uapi powerpc/prom_init: Fix kernel config grep powerpc/book3e: Fix PUD allocation size in map_kernel_page() powerpc/xive/spapr: correct bitmap allocation size
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Namhyung Kim authored
When it synthesize various task events, it scans the list of task first and then accesses later. There's a window threads can die between the two and proc entries may not be available. Instead of bailing out, we can ignore that thread and move on. Signed-off-by: Namhyung Kim <namhyung@kernel.org> Acked-by: Ian Rogers <irogers@google.com> Cc: Jiri Olsa <jolsa@kernel.org> Cc: Peter Zijlstra <peterz@infradead.org> Link: http://lore.kernel.org/lkml/20220701205458.985106-2-namhyung@kernel.orgSigned-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
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Namhyung Kim authored
It should not sort the result as procfs already returns a proper ordering of tasks. Actually sorting the order caused problems that it doesn't guararantee to process the main thread first. Signed-off-by: Namhyung Kim <namhyung@kernel.org> Acked-by: Ian Rogers <irogers@google.com> Cc: Jiri Olsa <jolsa@kernel.org> Cc: Peter Zijlstra <peterz@infradead.org> Link: http://lore.kernel.org/lkml/20220701205458.985106-1-namhyung@kernel.orgSigned-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
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Ivan Babrou authored
Commit dc2cf4ca ("perf unwind: Fix segbase for ld.lld linked objects") uncovered the following issue on aarch64: util/unwind-libunwind-local.c: In function 'find_proc_info': util/unwind-libunwind-local.c:386:28: error: 'offset' may be used uninitialized in this function [-Werror=maybe-uninitialized] 386 | if (ofs > 0) { | ^ util/unwind-libunwind-local.c:199:22: note: 'offset' was declared here 199 | u64 address, offset; | ^~~~~~ util/unwind-libunwind-local.c:371:20: error: 'offset' may be used uninitialized in this function [-Werror=maybe-uninitialized] 371 | if (ofs <= 0) { | ^ util/unwind-libunwind-local.c:199:22: note: 'offset' was declared here 199 | u64 address, offset; | ^~~~~~ util/unwind-libunwind-local.c:363:20: error: 'offset' may be used uninitialized in this function [-Werror=maybe-uninitialized] 363 | if (ofs <= 0) { | ^ util/unwind-libunwind-local.c:199:22: note: 'offset' was declared here 199 | u64 address, offset; | ^~~~~~ In file included from util/libunwind/arm64.c:37: Fixes: dc2cf4ca ("perf unwind: Fix segbase for ld.lld linked objects") Signed-off-by: Ivan Babrou <ivan@cloudflare.com> Cc: Alexander Shishkin <alexander.shishkin@linux.intel.com> Cc: Fangrui Song <maskray@google.com> Cc: Ian Rogers <irogers@google.com> Cc: James Clark <james.clark@arm.com> Cc: Jiri Olsa <jolsa@kernel.org> Cc: kernel-team@cloudflare.com Cc: Mark Rutland <mark.rutland@arm.com> Cc: Namhyung Kim <namhyung@kernel.org> Cc: Peter Zijlstra <peterz@infradead.org> Link: http://lore.kernel.org/lkml/20220701182046.12589-1-ivan@cloudflare.comSigned-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
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- 01 Jul, 2022 2 commits
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git://git.kernel.org/pub/scm/linux/kernel/git/nvdimm/nvdimmLinus Torvalds authored
Pull libnvdimm fix from Vishal Verma: - Fix a bug in the libnvdimm 'BTT' (Block Translation Table) driver where accounting for poison blocks to be cleared was off by one, causing a failure to clear the the last badblock in an nvdimm region. * tag 'libnvdimm-fixes-5.19-rc5' of git://git.kernel.org/pub/scm/linux/kernel/git/nvdimm/nvdimm: nvdimm: Fix badblocks clear off-by-one error
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git://git.kernel.org/pub/scm/linux/kernel/git/rafael/linux-pmLinus Torvalds authored
Pull thermal control fix from Rafael Wysocki: "Add a new CPU ID to the list of supported processors in the intel_tcc_cooling driver (Sumeet Pawnikar)" * tag 'thermal-5.19-rc5' of git://git.kernel.org/pub/scm/linux/kernel/git/rafael/linux-pm: thermal: intel_tcc_cooling: Add TCC cooling support for RaptorLake
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