- 08 Jun, 2021 40 commits
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Vladimir Oltean authored
The SJA1110 is basically an SJA1105 with more ports, some integrated PHYs (100base-T1 and 100base-TX) and an embedded microcontroller which can be disabled, and the switch core can be controlled by a host running Linux, over SPI. This patch contains: - the static and dynamic config packing functions, for the tables that are common with SJA1105 - one more static config tables which is "unique" to the SJA1110 (actually it is a rehash of stuff that was placed somewhere else in SJA1105): the PCP Remapping Table - a reset and clock configuration procedure for the SJA1110 switch. This resets just the switch subsystem, and gates off the clock which powers on the embedded microcontroller. - an RGMII delay configuration procedure for SJA1110, which is very similar to SJA1105, but different enough for us to be unable to reuse it (this is a pattern that repeats itself) - some adaptations to dynamic config table entries which are no longer programmed in the same way. For example, to delete a VLAN, you used to write an entry through the dynamic reconfiguration interface with the desired VLAN ID, and with the VALIDENT bit set to false. Now, the VLAN table entries contain a TYPE_ENTRY field, which must be set to zero (in a backwards-incompatible way) in order for the entry to be deleted, or to some other entry for the VLAN to match "inner tagged" or "outer tagged" packets. - a similar thing for the static config: the xMII Mode Parameters Table encoding for SGMII and MII (the latter just when attached to a 100base-TX PHY) just isn't what it used to be in SJA1105. They are identical, except there is an extra "special" bit which needs to be set. Set it. Signed-off-by:
Vladimir Oltean <vladimir.oltean@nxp.com> Signed-off-by:
David S. Miller <davem@davemloft.net>
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Vladimir Oltean authored
There are 4 variations of the SJA1110 switch which have a different set of MII protocols supported per port. Document the compatible strings. Also, the SJA1110 optionally supports 2 internal MDIO buses for 2 different types of Ethernet PHYs. Document a container node called "mdios" which has 2 subnodes "mdio@0" and "mdio@1", identifiable via compatible string, under which the driver finds the internal PHYs. Cc: Rob Herring <robh+dt@kernel.org> Cc: devicetree@vger.kernel.org Signed-off-by:
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David S. Miller authored
Sergey Ryazanov says: ==================== net: WWAN subsystem improvements While working on WWAN netdev creation support, I notice a few things that could be done to make the wwan subsystem more developer and user friendly. This series implements them. The series begins with a WWAN HW simulator designed simplify testing and make the WWAN subsystem available for a wider audience. The next two patches are intended to make the code a bit more clearer. This is followed by a few patches to make the port device naming more user-friendly. The series is finishes with a set of changes that allow the WWAN AT port to be used with terminal emulation software. All changes were tested with the HW simulator that was introduced in this series, as well as with a Huawei E3372 LTE modem (a CDC-NCM device), which I finally found on my desk. ==================== Signed-off-by: -
Sergey Ryazanov authored
Purge the rx queue as soon as a user closes the port, just after the port stop callback invocation. This is to prevent feeding a user that will open the port next time with outdated and possibly unrelated data. While at it also remove the odd skb_queue_purge() call in the port device destroy callback. The queue will be purged just before the callback is ivoncated in the wwan_remove_port() function. Signed-off-by:
Sergey Ryazanov <ryazanov.s.a@gmail.com> Signed-off-by:
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Sergey Ryazanov authored
It is not unreasonable to assume that users will use terminal emulation software to communicate directly with a WWAN device over the AT port. But terminal emulators will refuse to work with a device that does not support terminal IOCTLs (e.g. TCGETS, TCSETS, TIOCMSET, etc.). To make it possible to interact with the WWAN AT port using a terminal emulator, implement a minimal set of terminal IOCTLs. The implementation is rather stub, no passed data are actually used to control a port behaviour. An obtained configuration is kept inside the port structure and returned back by a request. The latter is done to fool a program that will test the configuration status by comparing the readed back data from the device with earlier configured ones. Tested with fresh versions of minicom and picocom terminal apps. MBIM, QMI and other ports for binary protocols can hardly be considered a terminal device, so terminal IOCTLs are only implemented for the AT port. Signed-off-by:
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Sergey Ryazanov authored
It is quite common for a userpace program to fetch the buffered amount of data in the rx queue to avoid the read block. Implement the TIOCINQ ioctl to make the migration to the WWAN port usage smooth. Despite the fact that the read call will return no more data than the size of a first skb in the queue, TIOCINQ returns the entire amount of buffered data (sum of all queued skbs). This is done to prevent the breaking of programs that optimize reading, avoiding it if the buffered amount of data is too small. Signed-off-by:
Loic Poulain <loic.poulain@linaro.org> Signed-off-by:
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Sergey Ryazanov authored
Currently, we limit the total ports number to 256. It is quite common for PBX or SMS gateway to be equipped with a lot of modems. In now days, a modem could have 2-4 control ports or even more, what only accelerates the ports exhausing rate. To avoid facing the port number limitation issue reports, increase the limit up the maximum number of minors (i.e. up to 1 << MINORBITS). Signed-off-by:
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Sergey Ryazanov authored
At the moment, the port name is allocated based on the parent device name, port id and the port type. Where the port id specifies nothing but the ports registration order and is only used to make the port name unique. Most likely, to configure a WWAN device, the user will look for a port of a specific type (e.g. AT port or MBIM port, etc.). The current naming scheme can make it difficult to find a port of a specific type. Consider a WWAN device that has 3 ports: AT port, MBIM port, and another one AT port. With the global port index, the port names will be: * wwan0p1at * wwan0p2mbim * wwan0p3at To find the MBIM port, user should know in advance the device ports composition (i.e. the user should know that the MBIM port is the 2nd one) or carefully examine the whole ports list. It is not unusual for USB modems to have a different composition, even if they are build on a same chipset. Moreover, some modems able to change the ports composition based on the user's configuration. All this makes port names fully unpredictable. To make naming more user-friendly, remove the global port id and enumerate ports by its type. E.g.: * wwan0p1at -> wwan0at0 * wwan0p2mbim -> wwan0mbim0 * wwan0p3at -> wwan0at1 With this naming scheme, the first AT port name will always be wwanXat0, the first MBIM port name will always be wwanXmbim0, etc. Signed-off-by:
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Sergey Ryazanov authored
Usually a device name is spelled in lowercase, let us follow this practice in the WWAN subsystem as well. The bottom line is that such name is easier to type. To keep the device type attribute contents more natural (i.e., spell abbreviations in uppercase), while making the device name lowercase, turn the port type strings array to an array of structure that contains both the port type name and the device name suffix. Signed-off-by:
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Sergey Ryazanov authored
This array is indexed by port type. Make it self-descriptive by using the port type enum values as indices in the array initializer. Signed-off-by:
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Sergey Ryazanov authored
It is quite unusual when some value can not be equal to a defined range max value. Also most subsystems defines FOO_TYPE_MAX as a maximum valid value. So turn the WAN_PORT_MAX meaning from the number of supported port types to the maximum valid port type. Signed-off-by:
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Sergey Ryazanov authored
wwan_hwsim creates and removes simulated control ports on module loading and unloading. It would be helpful to be able to create/remove devices and ports at run-time to trigger wwan port (un-)register actions without module reloading. Some simulator objects (e.g. ports) do not have the underling device and it is not possible to fully manage the simulator via sysfs. wwan_hsim intend for developers, so implement it as a self-contained debugfs based management interface. Signed-off-by:
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Sergey Ryazanov authored
This driver simulates a set of WWAN device with a set of AT control ports. It can be used to test WWAN kernel framework as well as user space tools. Signed-off-by:
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David S. Miller authored
Michael Sit Wei Hong says: ==================== Enable 2.5Gbps speed for stmmac Intel mGbE supports 2.5Gbps link speed by overclocking the clock rate by 2.5 times to support 2.5Gbps link speed. In this mode, the serdes/PHY operates at a serial baud rate of 3.125 Gbps and the PCS data path and GMII interface of the MAC operate at 312.5 MHz instead of 125 MHz. This is configured in the BIOS during boot up. The kernel driver is not able access to modify the clock rate for 1Gbps/2.5G mode on the fly. The way to determine the current 1G/2.5G mode is by reading a dedicated adhoc register through mdio bus. Changes: v5 -> v6 patch 1/3 - Check if mdio_bus_data is populated to prevent NULL pointer dereferencing when accesing mdio_bus_data member v4 -> v5 patch 1/3 - Rebase to latest code changes after Vladimir's code is merged and fix build warnings v3 -> v4 patch 1/3 - Rebase to latest code and Initialize 'found' to 0 to avoid build warning patch 2/3 - Fix indentation issue from v3 v2 -> v3 patch 1/3 -New patch added to restructure the code. enabling reading the dedicated adhoc register to determine link speed mode. patch 2/3 -Restructure for 2.5G speed to use 2500BaseX configuration as the PHY interface. patch 3/3 -Restructure to read serdes registers to set max_speed and configure to use 2500BaseX in 2.5G speeds. v1 -> v2 patch 1/2 -Remove MAC supported link speed masking patch 2/2 -Add supported link speed masking in the PCS iperf3 and ping for 2.5Gbps and regression test on 10M/100M/1000Mbps is done to prevent regresson issues. ==================== Signed-off-by: -
Voon Weifeng authored
The Intel mGbE supports 2.5Gbps link speed by increasing the clock rate by 2.5 times of the original rate. In this mode, the serdes/PHY operates at a serial baud rate of 3.125 Gbps and the PCS data path and GMII interface of the MAC operate at 312.5 MHz instead of 125 MHz. For Intel mGbE, the overclocking of 2.5 times clock rate to support 2.5G is only able to be configured in the BIOS during boot time. Kernel driver has no access to modify the clock rate for 1Gbps/2.5G mode. The way to determined the current 1G/2.5G mode is by reading a dedicated adhoc register through mdio bus. In short, after the system boot up, it is either in 1G mode or 2.5G mode which not able to be changed on the fly. Compared to 1G mode, the 2.5G mode selects the 2500BASEX as PHY interface and disables the xpcs_an_inband. This is to cater for some PHYs that only supports 2500BASEX PHY interface with no autonegotiation. v2: remove MAC supported link speed masking v3: Restructure to introduce intel_speed_mode_2500() to read serdes registers for max speed supported and select the appropritate configuration. Use max_speed to determine the supported link speed mask. Signed-off-by:Voon Weifeng <weifeng.voon@intel.com> Signed-off-by:
Michael Sit Wei Hong <michael.wei.hong.sit@intel.com> Reviewed-by:
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Voon Weifeng authored
XPCS IP supports 2500BASEX as PHY interface. It is configured as autonegotiation disable to cater for PHYs that does not supports 2500BASEX autonegotiation. v2: Add supported link speed masking. v3: Restructure to introduce xpcs_config_2500basex() used to configure the xpcs for 2.5G speeds. Added 2500BASEX specific information for configuration. v4: Fix indentation error Signed-off-by: -
Voon Weifeng authored
This patch is a preparation patch for the enabling of Intel mGbE 2.5Gbps link speed. The Intel mGbR link speed configuration (1G/2.5G) is depends on a mdio ADHOC register which can be configured in the bios menu. As PHY interface might be different for 1G and 2.5G, the mdio bus need be ready to check the link speed and select the PHY interface before probing the xPCS. Signed-off-by:
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git://git.open-mesh.org/linux-mergeDavid S. Miller authored
Simon Wunderlich says: ==================== pull request for net-next: batman-adv 2021-06-08 here is a feature/cleanup pull request of batman-adv to go into net-next. Please pull or let me know of any problem! This feature/cleanup patchset includes the following patches: - bump version strings, by Simon Wunderlich - consistently send iface index/name in genlmsg, by Sven Eckelmann - improve broadcast queueing, by Linus Lüssing (2 patches) - add support for routable IPv4 multicast with bridged setups, by Linus Lüssing - remove repeated declarations, by Shaokun Zhang - fix spelling mistakes, by Zheng Yongjun - clean up hard interface handling after dropping sysfs support, by Sven Eckelmann (4 patches) ==================== Signed-off-by: -
Geert Uytterhoeven authored
The help text for the symbol controlling support for the NVM Express over Fabrics TCP offload common layer suggests to not enable this support when unsure. Hence drop the "default m", which actually means "default y" if CONFIG_MODULES is not enabled. Fixes: f0e8cb61 ("nvme-tcp-offload: Add nvme-tcp-offload - NVMeTCP HW offload ULP") Signed-off-by:
Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by:
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David S. Miller authored
Peng Li says: ==================== net: farsync: clean up some code style issues This patchset clean up some code style issues. ==================== Signed-off-by: -
Peng Li authored
According to the chackpatch.pl, comparison to NULL could be written "fst_card_array[i]". Signed-off-by:
Peng Li <lipeng321@huawei.com> Signed-off-by:
Guangbin Huang <huangguangbin2@huawei.com> Signed-off-by:
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Peng Li authored
Void function return statements are not generally useful. Signed-off-by:
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Peng Li authored
Alignment should match open parenthesis. Signed-off-by:
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Peng Li authored
Unnecessary parentheses around 'port->hwif == X21'. Signed-off-by:
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Peng Li authored
According to the chackpatch.pl, space prohibited between function name and open parenthesis '(', no space is necessary after a cast. Signed-off-by: -
Peng Li authored
This patch removes redundant braces {}, to fix the checkpatch.pl warning: "braces {} are not necessary for single statement blocks". Signed-off-by: -
Peng Li authored
Add spaces required around that '=' and '*'. Signed-off-by:
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Peng Li authored
Macros with complex values should be enclosed in parentheses. space required after that ',' . Signed-off-by:
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Peng Li authored
Code indent should use tabs where possible. Signed-off-by:
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Peng Li authored
This patch removes trailing whitespaces. Signed-off-by:
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Peng Li authored
Networking block comments don't use an empty /* line, use /* Comment... Block comments use * on subsequent lines. Block comments use a trailing */ on a separate line. This patch fixes the comments style issues. Signed-off-by:
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Peng Li authored
Should not initialise statics to 0. Signed-off-by:
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Peng Li authored
Should not use assignment in if condition. Signed-off-by:
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Peng Li authored
Fix the checkpatch error as "foo * bar" should be "foo *bar". Signed-off-by:
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Peng Li authored
This patch fixes the checkpatch error about missing a blank line after declarations. Signed-off-by:
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Peng Li authored
This patch removes some redundant blank lines. Signed-off-by:
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David S. Miller authored
Joakim Zhang says: ==================== net: phy: add dt property for realtek phy Add dt property for realtek phy. --- ChangeLogs: V1->V2: * store the desired PHYCR1/2 register value in "priv" rather than using "quirks", per Russell King suggestion, as well as can cover the bootloader setting. * change the behavior of ALDPS mode, default is disabled, add dt property for users to enable it. * fix dt binding yaml build issues. ==================== Signed-off-by: -
Joakim Zhang authored
PHY will delay about 11.5ms to generate RXC clock when switching from power down to normal operation. Read/write registers would also cause RXC become unstable and stop for a while during this process. Realtek engineer suggests 15ms or more delay can workaround this issue. Signed-off-by:
Joakim Zhang <qiangqing.zhang@nxp.com> Signed-off-by:
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Joakim Zhang authored
If enable Advance Link Down Power Saving (ALDPS) mode, it will change crystal/clock behavior, which cause RXC clock stop for dozens to hundreds of miliseconds. This is comfirmed by Realtek engineer. For some MACs, it needs RXC clock to support RX logic, after this patch, PHY can generate continuous RXC clock during auto-negotiation. ALDPS default is disabled after hardware reset, it's more reasonable to add a property to enable this feature, since ALDPS would introduce side effect. This patch adds dt property "realtek,aldps-enable" to enable ALDPS mode per users' requirement. Jisheng Zhang enables this feature, changes the default behavior. Since mine patch breaks the rule that new implementation should not break existing design, so Cc'ed let him know to see if it can be accepted. Cc: Jisheng Zhang <Jisheng.Zhang@synaptics.com> Signed-off-by:
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Joakim Zhang authored
CLKOUT is enabled by default after PHY hardware reset, this patch adds "realtek,clkout-disable" property for user to disable CLKOUT clock to save PHY power. Per RTL8211F guide, a PHY reset should be issued after setting these bits in PHYCR2 register. After this patch, CLKOUT clock output to be disabled. Signed-off-by:
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