- 22 Sep, 2020 29 commits
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Stanley.Yang authored
GCEA/MMHUB EA error should not result to DF freeze, this is fixed in next generation, but for some reasons the GCEA/MMHUB EA error will result to DF freeze in previous generation, diver should avoid to indicate GCEA/MMHUB EA error as hw fatal error in kernel message by read GCEA/MMHUB err status registers. Changed from V1: make query_ras_error_status function more general make read mmhub er status register more friendly Changed from V2: move ras error status query function into do_recovery workqueue Changed from V3: remove useless code from V2, print GCEA error status instance number Signed-off-by:
Stanley.Yang <Stanley.Yang@amd.com> Reviewed-by:
Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by:
Alex Deucher <alexander.deucher@amd.com>
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Sudheesh Mavila authored
SMU10_UMD_PSTATE_PEAK_FCLK value should not be used to set the DPM. Suggested-by:
Evan Quan <evan.quan@amd.com> Reviewed-by:
Evan Quan <evan.quan@amd.com> Signed-off-by:
Sudheesh Mavila <sudheesh.mavila@amd.com> Signed-off-by:
Alex Deucher <alexander.deucher@amd.com>
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Evan Quan authored
Different mclk dpm policy will be applied based on the VRAM width. Signed-off-by:
Evan Quan <evan.quan@amd.com> Signed-off-by:
Alex Deucher <alexander.deucher@amd.com>
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Liu Shixin authored
Simplify the return expression. Signed-off-by:
Liu Shixin <liushixin2@huawei.com> Signed-off-by:
Alex Deucher <alexander.deucher@amd.com>
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Liu Shixin authored
Simplify the return expression. Signed-off-by:
Liu Shixin <liushixin2@huawei.com> Signed-off-by:
Alex Deucher <alexander.deucher@amd.com>
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Qinglang Miao authored
Simplify the return expression. Signed-off-by:
Qinglang Miao <miaoqinglang@huawei.com> Signed-off-by:
Alex Deucher <alexander.deucher@amd.com>
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Qinglang Miao authored
Simplify the return expression. Signed-off-by:
Qinglang Miao <miaoqinglang@huawei.com> Signed-off-by:
Alex Deucher <alexander.deucher@amd.com>
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Lewis Huang authored
[Why] Update clock only when non-seamless boot stream exists creates regression on multiple scenerios. [How] Update clock in two conditions 1. Non-seamless boot stream exist. 2. Stream_count = 0 Fixes: 598c13b2 ("drm/amd/display: update clock when non-seamless boot stream exist") Signed-off-by:
Lewis Huang <Lewis.Huang@amd.com> Reviewed-by:
Martin Leung <Martin.Leung@amd.com> Acked-by:
Qingqing Zhuo <Qingqing.zhuo@amd.com> Signed-off-by:
Alex Deucher <alexander.deucher@amd.com> Cc: <stable@vger.kernel.org>
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Aric Cyr authored
Signed-off-by:
Aric Cyr <aric.cyr@amd.com> Acked-by:
Qingqing Zhuo <qingqing.zhuo@amd.com> Signed-off-by:
Alex Deucher <alexander.deucher@amd.com>
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Anthony Koo authored
[Header Changes] - Add new SCRATCH0 status bits for detecting restore state Signed-off-by:
Anthony Koo <Anthony.Koo@amd.com> Reviewed-by:
Aric Cyr <Aric.Cyr@amd.com> Acked-by:
Qingqing Zhuo <qingqing.zhuo@amd.com> Signed-off-by:
Alex Deucher <alexander.deucher@amd.com>
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Chris Park authored
[Why] HDMI requires fallback to TMDS by redetection in order to switch PHY settings. This avoids black out when link training fail during mode setting, link quality update, disable driver sequence. [How] Allow driver to redetect HDMI displays based on retraining or fallback mechanism. Signed-off-by:
Chris Park <Chris.Park@amd.com> Reviewed-by:
Aric Cyr <Aric.Cyr@amd.com> Acked-by:
Qingqing Zhuo <qingqing.zhuo@amd.com> Signed-off-by:
Alex Deucher <alexander.deucher@amd.com>
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Taimur Hassan authored
[Why] When running a game/benchmark with v-sync disabled, disabling a plane (which is v-sync) can cause an underflow. This is due to flips that are pending before pipe locking being applied after locks are released and pipes have been re-arranged or disconnected. This can potentially apply a flip on the incorrect pipe. [How] Check that any pending flips are cleared before locking any pipes to ensure flips are applied on the correct pipes. Signed-off-by:
Taimur Hassan <syed.hassan@amd.com> Reviewed-by:
Aric Cyr <Aric.Cyr@amd.com> Acked-by:
Qingqing Zhuo <qingqing.zhuo@amd.com> Signed-off-by:
Alex Deucher <alexander.deucher@amd.com>
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Wyatt Wood authored
[Why] For DMUB implementation of PSR, the 'wait' parameter, used to determine if driver should wait for PSR enable/disable, is not implemented correctly. [How] Implement wait for PSR enable/disable. Signed-off-by:
Wyatt Wood <wyatt.wood@amd.com> Reviewed-by:
Anthony Koo <Anthony.Koo@amd.com> Acked-by:
Qingqing Zhuo <qingqing.zhuo@amd.com> Signed-off-by:
Alex Deucher <alexander.deucher@amd.com>
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Wenjing Liu authored
[why] Regression is caused by previous change with attempt to correct the extended cr aux rd interval delay due to mis interpretation of the DP specs. The change turns out not working well with certain RXs. So we decided to keep the cr aux rd interval logic as before. Signed-off-by:
Wenjing Liu <wenjing.liu@amd.com> Reviewed-by:
George Shen <George.Shen@amd.com> Acked-by:
Qingqing Zhuo <qingqing.zhuo@amd.com> Signed-off-by:
Alex Deucher <alexander.deucher@amd.com>
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Gary Li authored
[WHY] In DCN10 when a panel with YCbCr420 capability is connected via USB-C to HDMI active dongle, no YCbCr420 option is listed in Radeon settings. [HOW] Enable DP YCbCr420 mode support for DCN10 Signed-off-by:
Gary Li <gary.li@amd.com> Reviewed-by:
Eric Yang <eric.yang2@amd.com> Acked-by:
Qingqing Zhuo <qingqing.zhuo@amd.com> Signed-off-by:
Alex Deucher <alexander.deucher@amd.com>
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Wesley Chalmers authored
[WHY] When disabling DP video, the current REG_WAIT timeout of 50ms is too low for certain cases with very high VSYNC intervals. [HOW] Increase the timeout to 102ms, so that refresh rates as low as 10Hz can be handled properly. Signed-off-by:
Wesley Chalmers <Wesley.Chalmers@amd.com> Reviewed-by:
Aric Cyr <Aric.Cyr@amd.com> Acked-by:
Qingqing Zhuo <qingqing.zhuo@amd.com> Signed-off-by:
Alex Deucher <alexander.deucher@amd.com> Cc: <stable@vger.kernel.org>
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Wesley Chalmers authored
[WHY] Only the leftmost ODM pipe should be offset when scaling. A previous code change was intended to implement this policy, but a section of code was overlooked. Signed-off-by:
Wesley Chalmers <Wesley.Chalmers@amd.com> Reviewed-by:
Aric Cyr <Aric.Cyr@amd.com> Acked-by:
Qingqing Zhuo <qingqing.zhuo@amd.com> Signed-off-by:
Alex Deucher <alexander.deucher@amd.com> Cc: <stable@vger.kernel.org>
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Peikang Zhang authored
[Why] We dont's turn off backlight before power off eDP (VDD), which is a violation of eDP specs. [How] Power off eDP backlight before power off eDP Signed-off-by:
Peikang Zhang <peikang.zhang@amd.com> Reviewed-by:
Anthony Koo <Anthony.Koo@amd.com> Acked-by:
Qingqing Zhuo <qingqing.zhuo@amd.com> Signed-off-by:
Alex Deucher <alexander.deucher@amd.com>
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Peikang Zhang authored
[Why] dce_is_panel_backlight_on() will return wrong value if LVTMA_BLON_OVRD is 0 [How] When LVTMA_BLON_OVRD is 0, read LVTMA_PWRSEQ_TARGET_STATE instead Signed-off-by:
Peikang Zhang <peikang.zhang@amd.com> Reviewed-by:
Anthony Koo <Anthony.Koo@amd.com> Acked-by:
Qingqing Zhuo <qingqing.zhuo@amd.com> Signed-off-by:
Alex Deucher <alexander.deucher@amd.com>
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Aric Cyr authored
Signed-off-by:
Aric Cyr <aric.cyr@amd.com> Acked-by:
Qingqing Zhuo <qingqing.zhuo@amd.com> Signed-off-by:
Alex Deucher <alexander.deucher@amd.com>
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Anthony Koo authored
Signed-off-by:
Anthony Koo <Anthony.Koo@amd.com> Reviewed-by:
Aric Cyr <Aric.Cyr@amd.com> Acked-by:
Qingqing Zhuo <qingqing.zhuo@amd.com> Signed-off-by:
Alex Deucher <alexander.deucher@amd.com>
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David Galiffi authored
[Why] Typo in backlight refactor introduced wrong register offset. [How] SR(BIOS_SCRATCH_2) to NBIO_SR(BIOS_SCRATCH_2). Signed-off-by:
David Galiffi <David.Galiffi@amd.com> Reviewed-by:
Anthony Koo <Anthony.Koo@amd.com> Acked-by:
Qingqing Zhuo <qingqing.zhuo@amd.com> Signed-off-by:
Alex Deucher <alexander.deucher@amd.com> Cc: <stable@vger.kernel.org>
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Kent Russell authored
Since we're dynamically allocating the CPU VCRAT, use kvmalloc in case the allocation size is huge. Signed-off-by:
Kent Russell <kent.russell@amd.com> Reviewed-by:
Alex Deucher <alexander.deucher@amd.com> Signed-off-by:
Alex Deucher <alexander.deucher@amd.com>
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Philip Cox authored
amdkfd is dumping a stack during initialization. kfd_procfs_add_sysfs_stats is being called twice. This removes one of them. Fixes: 4327bed2 ("drm/amdkfd: Add process eviction counters to sysfs") Reviewed-by:
Kent Russell <kent.russell@amd.com> Signed-off-by:
Philip Cox <Philip.Cox@amd.com> Signed-off-by:
Alex Deucher <alexander.deucher@amd.com>
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Emily.Deng authored
Always start vblank timer, but only calls vblank function when vblank is enabled. This is used to fix the dead lock issue. When drm_crtc_vblank_off want to disable vblank, it first get event_lock, and then call hrtimer_cancel, but hrtimer_cancel want to wait timer handler function finished. Timer handler also want to aquire event_lock in drm_handle_vblank. Signed-off-by:
Emily.Deng <Emily.Deng@amd.com> Reviewed-by:
Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by:
Alex Deucher <alexander.deucher@amd.com>
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Shirish S authored
read/writes to aux_dpcd_* sysfs entries leads to system reboot or hang. Hence fix the handling of input data and reporting of errors appropriately to the user space. Signed-off-by:
Shirish S <shirish.s@amd.com> Reviewed-by:
Harry Wentland <harry.wentland@amd.com> Signed-off-by:
Alex Deucher <alexander.deucher@amd.com>
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Mukul Joshi authored
Move doorbell allocation for a process into kfd device and allocate doorbell space in each PDD during process creation. Currently, KFD manages its own doorbell space but for some devices, amdgpu would allocate the complete doorbell space instead of leaving a chunk of doorbell space for KFD to manage. In a system with mix of such devices, KFD would need to request process doorbell space based on the type of device, either from amdgpu or from its own doorbell space. Signed-off-by:
Mukul Joshi <mukul.joshi@amd.com> Reviewed-by:
Felix Kuehling <Felix.Kuehling@amd.com> Signed-off-by:
Alex Deucher <alexander.deucher@amd.com>
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Kent Russell authored
Instead of guessing at a sufficient size for the CPU VCRAT, base the size on the number of online NUMA nodes. v2: fix warning Signed-off-by:
Kent Russell <kent.russell@amd.com> Reviewed-by:
Felix Kuehling <Felix.Kuehling@amd.com> Signed-off-by:
Alex Deucher <alexander.deucher@amd.com>
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Felix Kuehling authored
Remember KFD module initializaton status in a global variable. Skip KFD device probing when the module was not initialized. Other amdgpu_amdkfd calls are then protected by the adev->kfd.dev check. Also print a clear error message when KFD disables itself. Amdgpu continues its initialization even when KFD failed. Signed-off-by:
Felix Kuehling <Felix.Kuehling@amd.com> Reviewed-by:
Kent Russell <kent.russell@amd.com> Signed-off-by:
Alex Deucher <alexander.deucher@amd.com>
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- 18 Sep, 2020 9 commits
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Jingwen Chen authored
smu_post_init needs to enable SMU feature, while this require virtualization off. Skip it since this feature is not used in SRIOV. v2: move the check to the early stage of smu_post_init. v3: fix typo Signed-off-by:
Jingwen Chen <Jingwen.Chen2@amd.com> Reviewed-by:
Emily.Deng <Emily.Deng@amd.com> Signed-off-by:
Alex Deucher <alexander.deucher@amd.com>
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Evan Quan authored
For CDR disabled case, the dummy reads workaround is not needed. Signed-off-by:
Evan Quan <evan.quan@amd.com> Acked-by:
Alex Deucher <alexander.deucher@amd.com> Signed-off-by:
Alex Deucher <alexander.deucher@amd.com>
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Alex Deucher authored
Navi12 has worked fine for a while now. Reviewed-by:
Evan Quan <evan.quan@amd.com> Signed-off-by:
Alex Deucher <alexander.deucher@amd.com>
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Philip Cox authored
Reduce the eviction and restore messages from INFO level to DEBUG level. Signed-off-by:
Philip Cox <Philip.Cox@amd.com> Reviewed-by:
Felix Kuehling <Felix.Kuehling@amd.com> Signed-off-by:
Alex Deucher <alexander.deucher@amd.com>
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Philip Cox authored
Add per-process eviction counters to sysfs to keep track of how many eviction events have happened for each process. v2: rename the stats dir, and track all evictions per process, per device. v3: Simplify the stats kobject handling and cleanup. v4: more code cleanup Signed-off-by:
Philip Cox <Philip.Cox@amd.com> Reviewed-by:
Felix Kuehling <Felix.Kuehling@amd.com> Signed-off-by:
Alex Deucher <alexander.deucher@amd.com>
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Philip Cox authored
Extending the module parameter debug_evictions to also print a stack trace when the eviction code path is called. Signed-off-by:
Philip Cox <Philip.Cox@amd.com> Reviewed-by:
Felix Kuehling <Felix.Kuehling@amd.com> Signed-off-by:
Alex Deucher <alexander.deucher@amd.com>
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Xiaoliang Pang authored
Return value should be -EINVAL rather than EINVAL Fixes: f83a9991("drm/amd/powerplay: add Vega10 powerplay support (v5)") Fixes: 2cac05de("drm/amd/powerplay: add the hw manager for vega12 (v4)") Cc: Eric Huang <JinHuiEric.Huang@amd.com> Cc: Evan Quan <evan.quan@amd.com> Reviewed-by:
Evan Quan <evan.quan@amd.com> Acked-by:
Christian König <christian.koenig@amd.com> Signed-off-by:
Xiaoliang Pang <dawning.pang@gmail.com> Signed-off-by:
Alex Deucher <alexander.deucher@amd.com>
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Ye Bin authored
Fixes coccicheck warnig: drivers/gpu/drm/amd/display/dc/dml/dcn30/display_rq_dlg_calc_30.c:282:12-42: duplicated argument to && or || drivers/gpu/drm/amd/display/dc/dml/dcn30/display_mode_vba_30.c:3240:12-42: duplicated argument to && or || drivers/gpu/drm/amd/display/dc/dml/dcn30/display_mode_vba_30.c:5520:7-91: duplicated argument to && or || drivers/gpu/drm/amd/display/dc/dml/dcn30/display_mode_vba_30.c:5309:86-122: duplicated argument to && or || Fixes: 6725a88f ("drm/amd/display: Add DCN3 DML") Reported-by:
Hulk Robot <hulkci@huawei.com> Signed-off-by:
Ye Bin <yebin10@huawei.com> Signed-off-by:
Alex Deucher <alexander.deucher@amd.com>
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Mauro Rossi authored
[Why] linux-next kernel test robot reported the following problem: warning: no previous prototype for 'dce60_get_dp_ref_freq_khz' [-Wmissing-prototypes] [How] mark dce60_get_dp_ref_freq_khz() as static Fixes: 3ecb3b79 "drm/amd/display: dc/clk_mgr: add support for SI parts (v2)" Reported-by:
kernel test robot <lkp@intel.com> Signed-off-by:
Mauro Rossi <issor.oruam@gmail.com> Signed-off-by:
Alex Deucher <alexander.deucher@amd.com>
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- 17 Sep, 2020 2 commits
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Likun Gao authored
Add device ID for sienna_cichlid. v2: squash in additional device ids. Reviewed-by:
Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by:
Likun Gao <Likun.Gao@amd.com> Reviewed-by:
Alex Deucher <alexander.deucher@amd.com> Signed-off-by:
Alex Deucher <alexander.deucher@amd.com>
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Alex Deucher authored
Switch from magic numbers to defines for AV1 clockgating. Reviewed-by:
Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by:
Alex Deucher <alexander.deucher@amd.com>
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