- 24 Jul, 2015 14 commits
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Cyrille Pitchen authored
This patch updates macro definitions in atmel_serial.h to fit the 80 column rule. Please note that some deprecated comments such as "[AT91SAM9261 only]" are removed as the corresponding bits also exist in some later chips. Signed-off-by: Cyrille Pitchen <cyrille.pitchen@atmel.com> Acked-by: Alexandre Belloni <alexandre.belloni@free-electrons.com> Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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Cyrille Pitchen authored
This patch adds a new DT property, "atmel,fifo-size", to enable and set the maximum number of data the RX and TX FIFOs can store on FIFO capable USARTs. Please be aware that the VERSION register can not be used to guess the size of FIFOs. Indeed, for a given hardware version, the USARTs can be integrated on Atmel SoCs with different FIFO sizes. Also the "atmel,fifo-size" property is optional as older USARTs don't embed FIFO at all. Besides, the FIFO size can not be read or guessed from other registers: When designing the FIFO feature, no dedicated registers were added to store this size. Unsed spaces in the I/O register range are limited and better reserved for future usages. Instead, the FIFO size of each peripheral is documented in the programmer datasheet. Finally, on a given SoC, there can be several instances of USART with different FIFO sizes. This explain why we'd rather use a dedicated DT property than use the "compatible" property. Signed-off-by: Cyrille Pitchen <cyrille.pitchen@atmel.com> Acked-by: Alexandre Belloni <alexandre.belloni@free-electrons.com> Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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Patrick Donnelly authored
task_pgrp requires an rcu or tasklist lock to be obtained if the returned pid is to be dereferenced, which kill_pgrp does. Obtain an RCU lock for the duration of use. Signed-off-by: Patrick Donnelly <batrick@batbytes.com> Reviewed-by: Peter Hurley <peter@hurleysoftware.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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Joerg Roedel authored
The XR17V35X UART needs the ECB bit set in its XR_EFR register to enable access to IER [7:5], ISR [5:4], FCR[5:4], MCR[7:5], and MSR [7:0]. Also reset the IER register to mask interrupts after access to all bits of this register has been enabled. This makes my 8-port XR17V35X working with the in-kernel serial driver. Cc: Joe Schultz <jschultz@xes-inc.com> Signed-off-by: Joerg Roedel <jroedel@suse.de> Reviewed-by: Peter Hurley <peter@hurleysoftware.com> Reviewed-by: Michael Welling <mwelling@ieee.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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Peter Hurley authored
An already-active sender can swamp the interrupt handler with "too much work" if the rx interrupts are enabled when the fifo is disabled and operating in single-byte mode. Defer rx and line status interrupt enable until after the fifos are enabled in set_termios(), but at least initialize the shadow IER value with the interrupts which will be enabled. Signed-off-by: Peter Hurley <peter@hurleysoftware.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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Jiri Slaby authored
We use __u8 in linux/gsmmux.h, so include linux/types.h to have that defined. Signed-off-by: Jiri Slaby <jslaby@suse.cz> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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Vineet Gupta authored
Commit ed71871b ("tty/8250_early: Turn serial_in/serial_out into weak symbols") made these routines weak to allow platform specific Big endian override However recent updates to core, specifically ebc5e200 ("serial: of_serial: Support big-endian register accesses") and 6e63be3f ("serial: earlycon: Add support for big-endian MMIO accesses") means that round about way to overide the early serial accessors is no longer needed. Cc: Jiri Slaby <jslaby@suse.cz> Cc: Peter Hurley <peter@hurleysoftware.com> Cc: Rob Herring <robh@kernel.org> Cc: Kevin Cernekee <cernekee@gmail.com> Acked-by: Noam Camus <noamc@ezchip.com> Signed-off-by: Vineet Gupta <vgupta@synopsys.com> Reviewed-by: Peter Hurley <peter@hurleysoftware.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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Peter Hurley authored
Refactor base port operations into new file; 8250_port.c. Legacy irq handling, RSA port support, port storage for universal driver, driver definition, module parameters and linkage remain in 8250_core.c The source file split and resulting modules is diagrammed below: 8250_core.c ====> 8250_core.c __ \ \ \ +-- 8250.ko (alias 8250_core) \ 8250_pnp.c __/ (universal driver) \ => 8250_port.c __ \ +-- 8250_base.ko 8250_dma.c __/ (port operations) Signed-off-by: Peter Hurley <peter@hurleysoftware.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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David Jander authored
If the UART has been in use before this driver was loaded, IRQs might be active and get fired as soon as we set the handler, which will crash in the spin_lock_irqsave(&sport->port.lock, flags) because port.lock is not initialized until the port is added at the end of probe. Signed-off-by: David Jander <david@protonic.nl> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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Manfred Schlaegl authored
To prevent problems with interrupt latency, and due to the fact, that the error will be counted anyway (icount.overrun), the dev_err is simply removed. Background: If an rx-fifo overflow occurs a dev_err message was called in interrupt context. Since dev_err messages are written to console in a synchronous way (unbuffered), and console may be a serial terminal, this leads to a highly increased interrupt-latency (several milliseconds). As a result of the high latency more rx-fifo overflows will happen, and therefore a feedback loop of errors is created. Signed-off-by: Manfred Schlaegl <manfred.schlaegl@gmx.at> Acked-By: Alexander Stein <alexander.stein@systec-electronic.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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Manfred Schlaegl authored
As can be seen in function uart_insert_char (serial_core) the element buf_overrun of struct uart_icount is used to count overruns of tty-buffer. Added support for counting of overruns in imx driver analogue to serial_core. Signed-off-by: Manfred Schlaegl <manfred.schlaegl@gmx.at> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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Fabio Estevam authored
Disable interrupts before requesting them in order to fix a kernel oops after lauching a kernel via kexec. Tested on a imx6sl-evk board. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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Ricardo Ribalda Delgado authored
Being a soft core, it can be located not only on PPC or Microblaze platforms. Since the driver already does endianness detection we only need to change the Kconfig to use it in other arches. This is also done in other softcores as xilinx-spi. Signed-off-by: Ricardo Ribalda Delgado <ricardo.ribalda@gmail.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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Maxime Coquelin authored
SysRq support activation depends on CONFIG_SERIAL_STM32_USART_CONSOLE, but this config flag does not exists. This patch fix this by depending on the valid config flag, which is SERIAL_STM32_CONSOLE. Reported-by: Andreas Ruprecht <andreas.ruprecht@fau.de> Signed-off-by: Maxime Coquelin <mcoquelin.stm32@gmail.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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- 23 Jul, 2015 16 commits
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Qipan Li authored
While UART work in DMA mode, function start_rx will request descriptor from DMA engine, if there is no left descriptor UART, driver will give err logs "DMA slave single fail". currently start_rx is called in set_termios function, so everytime, port setting will call start_rx once. Now put start_rx in startup, it will be called once while open the port. Signed-off-by: Qipan Li <Qipan.Li@csr.com> Signed-off-by: Barry Song <Baohua.Song@csr.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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Qipan Li authored
when UART works in DMA mode and left bytes in rx fifo less than a dma transfer unit, DMA engine can't transfer the bytes out to rx DMA buffer. so it need a way to fetch them out and flush them into tty buffer in time. in the above case, we want UART switch from DMA mode to PIO mode and fetch && flush bytes into tty layer buffer until rxfifo become empty, after that done let UART switch from PIO mode back to DMA mode. (record as method1) method1 result in the next receive result wrong. for example in PIO part of method1, we fetched && pushed X1...X3 bytes, when UART rxfifo newly received Y1...Y4 bytes, UART trigger a DMA unit transfer, the DMA unit's content is X1...X3Y1 and rxfifo fifo status is empty, so X1X2X3 pushed twice by PIO way and DMA way also the bytes Y2Y3Y4 missed. add rxfifo reset operation before UART switch back to DMA mode would resolve the issue. ([method1 + do fifo reset] record as method2) before the commit, UART driver use method2. but methd2 have a risk of data loss, as if UART's shift register receive a complete byte and transfer it into rxfifo before rxfifo reset operation the byte will loss. UART and USP have the similar bits CLEAR_RX_ADDR_EN(uart)/FRADDR_CLR_EN(usp), When found UART controller changing I/O to DMA mode, UART controller clears the two low bits of read point (rx_fifo_addr[1:0]). when enable the bit + method1(record as method3), in above example the DMA unit's content is X1...X3Y1 and there are Y2Y3Y4 in rxfifo by experiment, we just push bytes in rx DMA buffer. BTW, the workaround works only for UART receive DMA channel use SINGLE DMA mode. Signed-off-by: Qipan Li <Qipan.Li@csr.com> Signed-off-by: Barry Song <Baohua.Song@csr.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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Axel Lin authored
The implementation of cris_console_device() is exactly the same as uart_console_device(), so let's switch to use uart_console_device(). Signed-off-by: Axel Lin <axel.lin@ingics.com> Acked-by: Niklas Cassel <nks@flawful.org> Acked-by: Jesper Nilsson <jesper.nilsson@axis.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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Peter Hurley authored
OMAP h/w-assisted IXON flow control is borked. The transmitter becomes stuck if XON is never received; clearing the fifos or resetting the rx flow control bits has no effect. Remove auto-IXANY as well, since without auto-IXON, it has no purpose. Signed-off-by: Peter Hurley <peter@hurleysoftware.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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Sekhar Nori authored
Due to Advisory 21 as documented in AM437x errata document, UART module cannot be disabled once DMA is used. The only workaround is to softreset the module before disabling it. DRA7x UARTs are compatible to AM437x UARTs in terms of this errata and prescribed workaround. Enable usage of workaround for this errata on DRA7x SoCs. Signed-off-by: Sekhar Nori <nsekhar@ti.com> Acked-by: Tony Lindgren <tony@atomide.com> Reviewed-by: Peter Hurley <peter@hurleysoftware.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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Sekhar Nori authored
AM335x, AM437x and DRA7x SoCs have an errata[1] due to which UART cannot be idled after it has been used with DMA. OMAP3 has a similar sounding errata which has been worked around in a2fc3661 ("ARM: OMAP3: Use manual idle for UARTs because of DMA errata"). But the workaround used there does not apply to AM335x, AM437x SoCs. After using DMA, the UART module on these SoCs must be soft reset to go to idle. This patch implements that errata workaround. It is expected that UART will be used with DMA so no explicit check for DMA usage has been added for errata applicability. MDR1 register needs to be restored right after soft-reset because "UART mode" must be set in that register for module wake-up on AM335x to work. As a result, SCR register is now used to determine if context was lost during sleep. [1] See Advisory 21 in AM437x errata SPRZ408B, updated April 2015. http://www.ti.com/lit/er/sprz408b/sprz408b.pdfSigned-off-by: Sekhar Nori <nsekhar@ti.com> Acked-by: Tony Lindgren <tony@atomide.com> Reviewed-by: Peter Hurley <peter@hurleysoftware.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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Sekhar Nori authored
Use of of_machine_is_compatible() for handling AM335x specific "DMA kick" quirk in 8250_omap driver makes it ugly to extend the quirk for other platforms. Instead use a new compatible. The new compatible will also make it easier to take care of other quirks on AM335x and like SoCs. In order to not break backward DTB compatibility for users of 8250_omap driver on AM335x based boards, existing use of of_machine_is_compatible() has not been removed. Signed-off-by: Sekhar Nori <nsekhar@ti.com> Acked-by: Tony Lindgren <tony@atomide.com> Reviewed-by: Peter Hurley <peter@hurleysoftware.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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Sekhar Nori authored
The silicon errata[1] workaround implemented in a follow-on patch, "serial: 8250_omap: workaround errata on disabling UART after using DMA", requires MDR1 register programming. Extract MDR1 register update into helper function, omap8250_update_mdr1() to help with that. [1] Advisory 21 in http://www.ti.com/lit/er/sprz408b/sprz408b.pdfSigned-off-by: Sekhar Nori <nsekhar@ti.com> Acked-by: Tony Lindgren <tony@atomide.com> Reviewed-by: Peter Hurley <peter@hurleysoftware.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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Sekhar Nori authored
The compatible "ti,am4372-uart" is used in arch/arm/boot/dts/am4372.dtsi but not documented. Add necessary documentation. Signed-off-by: Sekhar Nori <nsekhar@ti.com> Acked-by: Tony Lindgren <tony@atomide.com> Reviewed-by: Peter Hurley <peter@hurleysoftware.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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Sekhar Nori authored
omap_device infrastructure has a suspend_noirq hook which runtime suspends all devices late in the suspend cycle (see _od_suspend_noirq() in arch/arm/mach-omap2/omap_device.c) This leads to a NULL pointer exception in 8250_omap driver since by the time omap8250_runtime_suspend() is called, 8250_dma driver has already set rxchan to NULL via serial8250_release_dma(). Make an explicit check to see if rxchan is NULL in runtime_{suspend|resume} hooks to fix this. Signed-off-by: Sekhar Nori <nsekhar@ti.com> Acked-by: Tony Lindgren <tony@atomide.com> Reviewed-by: Peter Hurley <peter@hurleysoftware.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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Ricardo Ribalda Delgado authored
Fintek chip can be configured for io addresses different than the standard. Query the chip for the configured addresses and try to match it with the pnp address. Reported-by: Peter Hong <peter_hong@fintek.com.tw> Reviewed-by: Alan Cox <alan@linux.intel.com> Signed-off-by: Ricardo Ribalda Delgado <ricardo.ribalda@gmail.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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Ricardo Ribalda Delgado authored
Chip can be configured to use entry key different than 0x77. Try all the valid keys until one gives out the right chip id. Reported-by: Peter Hong <peter_hong@fintek.com.tw> Reviewed-by: Alan Cox <alan@linux.intel.com> Signed-off-by: Ricardo Ribalda Delgado <ricardo.ribalda@gmail.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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Ricardo Ribalda Delgado authored
There are some chips with the same interface but different chip ip. Reported-by: Peter Hong <peter_hong@fintek.com.tw> Reviewed-by: Alan Cox <alan@linux.intel.com> Signed-off-by: Ricardo Ribalda Delgado <ricardo.ribalda@gmail.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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Ricardo Ribalda Delgado authored
Fintek chip can be connected at address 0x4e and also 0x2e. Add some logic to find out the address of the chip. Reported-by: Peter Hong <peter_hong@fintek.com.tw> Reviewed-by: Alan Cox <alan@linux.intel.com> Signed-off-by: Ricardo Ribalda Delgado <ricardo.ribalda@gmail.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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Ricardo Ribalda Delgado authored
Save the port index and the line id in a private structure. Reported-by: Peter Hong <peter_hong@fintek.com.tw> Reviewed-by: Alan Cox <alan@linux.intel.com> Signed-off-by: Ricardo Ribalda Delgado <ricardo.ribalda@gmail.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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Vaishali Thakkar authored
In little endian cases, macro htons unfolds to __swab16 which provides special case for constants. In big endian cases, __constant_htons and htons expand directly to the same expression. So, replace __constant_htons with htons with the goal of getting rid of the definition of __constant_htons completely. The semantic patch that performs this transformation is as follows: @@expression x;@@ - __constant_htons(x) + htons(x) Signed-off-by: Vaishali Thakkar <vthakkar1994@gmail.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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- 19 Jul, 2015 8 commits
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Linus Torvalds authored
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git://git.kernel.org/pub/scm/linux/kernel/git/jejb/scsiLinus Torvalds authored
Pull SCSI fixes from James Bottomley: "Two fairly simple fixes: one is a change that causes us to have a very low queue depth leading to performance issues and the other is a null deref occasionally in tapes thanks to use after put" * tag 'scsi-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/jejb/scsi: scsi: fix host max depth checking for the 'queue_depth' sysfs interface st: null pointer dereference panic caused by use after kref_put by st_open
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git://git.linux-mips.org/pub/scm/ralf/upstream-linusLinus Torvalds authored
Pull MIPS fixes from Ralf Baechle: "Another round of MIPS fixes for 4.2. Things are looking quite decent at this stage but the recent work on the FPU support took its toll: - fix an incorrect overly restrictive ifdef - select O32 64-bit FP support for O32 binary compatibility - remove workarounds for Sibyte SB1250 Pass1 parts. There are rare fixing the workarounds is not worth the effort. - patch up an outdated and now incorrect comment" * 'upstream' of git://git.linux-mips.org/pub/scm/ralf/upstream-linus: MIPS: fpu.h: Allow 64-bit FPU on a 64-bit MIPS R6 CPU MIPS: SB1: Remove support for Pass 1 parts. MIPS: Require O32 FP64 support for MIPS64 with O32 compat MIPS: asm-offset.c: Patch up various comments refering to the old filename.
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git://git.kernel.org/pub/scm/linux/kernel/git/deller/parisc-linuxLinus Torvalds authored
Pull parisc fix from Helge Deller: "A memory leak fix from Christophe Jaillet which was introduced with kernel 4.0 and which leads to kernel crashes on parisc after 1-3 days" * 'parisc-4.2-2' of git://git.kernel.org/pub/scm/linux/kernel/git/deller/parisc-linux: parisc: mm: Fix a memory leak related to pmd not attached to the pgd
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git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-socLinus Torvalds authored
Pull ARM SoC fixes from Olof Johansson: "By far most of the fixes here are updates to DTS files to deal with some mostly minor bugs. There's also a fix to deal with non-PM kernel configs on i.MX, a regression fix for ethernet on PXA platforms and a dependency fix for OMAP" * tag 'armsoc-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: ARM: keystone: dts: rename pcie nodes to help override status ARM: keystone: dts: fix dt bindings for PCIe ARM: pxa: fix dm9000 platform data regression ARM: dts: Correct audio input route & set mic bias for am335x-pepper ARM: OMAP2+: Add HAVE_ARM_SCU for AM43XX MAINTAINERS: digicolor: add dts files ARM: ux500: fix MMC/SD card regression ARM: ux500: define serial port aliases ARM: dts: OMAP5: Add #iommu-cells property to IOMMUs ARM: dts: OMAP4: Add #iommu-cells property to IOMMUs ARM: dts: Fix frequency scaling on Gumstix Pepper ARM: dts: configure regulators for Gumstix Pepper ARM: dts: omap3: overo: Update LCD panel names ARM: dts: cros-ec-keyboard: Add support for some Japanese keys ARM: imx6: gpc: always enable PU domain if CONFIG_PM is not set ARM: dts: imx53-qsb: fix TVE entry ARM: dts: mx23: fix iio-hwmon support ARM: dts: imx27: Adjust the GPT compatible string ARM: socfpga: dts: Fix entries order ARM: socfpga: dts: Fix adxl34x formating and compatible string
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Markos Chandras authored
Commit 6134d949 ("MIPS: asm: fpu: Allow 64-bit FPU on MIPS32 R6") added support for 64-bit FPU on a 32-bit MIPS R6 processor but it missed the 64-bit CPU case leading to FPU failures when requesting FR=1 mode (which is always the case for MIPS R6 userland) when running a 32-bit kernel on a 64-bit CPU. We also fix the MIPS R2 case. Signed-off-by: Markos Chandras <markos.chandras@imgtec.com> Fixes: 6134d949 ("MIPS: asm: fpu: Allow 64-bit FPU on MIPS32 R6") Reviewed-by: Paul Burton <paul.burton@imgtec.com> Cc: <stable@vger.kernel.org> # 4.0+ Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/10734/Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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Christophe Jaillet authored
Commit 0e0da48d ("parisc: mm: don't count preallocated pmds") introduced a memory leak. After this commit, the 'return' statement in pmd_free is executed in all cases. Even for pmd that are not attached to the pgd. So 'free_pages' can never be called anymore, leading to a memory leak. Signed-off-by: Christophe JAILLET <christophe.jaillet@wanadoo.fr> Acked-by: Kirill A. Shutemov <kirill.shutemov@linux.intel.com> Acked-by: Mikulas Patocka <mpatocka@redhat.com> Acked-by: Helge Deller <deller@gmx.de> Cc: stable@vger.kernel.org # v4.0+ Signed-off-by: Helge Deller <deller@gmx.de>
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https://github.com/rjarzmik/linuxOlof Johansson authored
Merge "pxa fixes for v4.2" from Robert Jarzmik: ARM: pxa: fixes for v4.2-rc2 This single fix reenables ethernet cards for several pxa boards, broken by regulator addition to dm9000 driver. * tag 'pxa-fixes-v4.2-rc2' of https://github.com/rjarzmik/linux: ARM: pxa: fix dm9000 platform data regression
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- 18 Jul, 2015 2 commits
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git://ftp.arm.linux.org.uk/~rmk/linux-armLinus Torvalds authored
Pull ARM fixes from Russell King: "A small set of ARM fixes for -rc3, most of them not far off one-liners, with the exception of fixing the V7 cache invalidation for incoming SMP processors which was causing problems for SoCFPGA devices" * 'fixes' of git://ftp.arm.linux.org.uk/~rmk/linux-arm: ARM: fix __virt_to_idmap build error on !MMU ARM: invalidate L1 before enabling coherency ARM: 8404/1: dma-mapping: fix off-by-one error in bitmap size check ARM: 8402/1: perf: Don't use of_node after putting it ARM: 8400/1: use virt_to_idmap to get phys_reset address
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git://git.kernel.org/pub/scm/linux/kernel/git/tip/tipLinus Torvalds authored
Pull x86 fixes from Ingo Molnar: "Two families of fixes: - Fix an FPU context related boot crash on newer x86 hardware with larger context sizes than what most people test. To fix this without ugly kludges or extensive reverts we had to touch core task allocator, to allow x86 to determine the task size dynamically, at boot time. I've tested it on a number of x86 platforms, and I cross-built it to a handful of architectures: (warns) (warns) testing x86-64: -git: pass ( 0), -tip: pass ( 0) testing x86-32: -git: pass ( 0), -tip: pass ( 0) testing arm: -git: pass ( 1359), -tip: pass ( 1359) testing cris: -git: pass ( 1031), -tip: pass ( 1031) testing m32r: -git: pass ( 1135), -tip: pass ( 1135) testing m68k: -git: pass ( 1471), -tip: pass ( 1471) testing mips: -git: pass ( 1162), -tip: pass ( 1162) testing mn10300: -git: pass ( 1058), -tip: pass ( 1058) testing parisc: -git: pass ( 1846), -tip: pass ( 1846) testing sparc: -git: pass ( 1185), -tip: pass ( 1185) ... so I hope the cross-arch impact 'none', as intended. (by Dave Hansen) - Fix various NMI handling related bugs unearthed by the big asm code rewrite and generally make the NMI code more robust and more maintainable while at it. These changes are a bit late in the cycle, I hope they are still acceptable. (by Andy Lutomirski)" * 'x86-urgent-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip: x86/fpu, sched: Introduce CONFIG_ARCH_WANTS_DYNAMIC_TASK_STRUCT and use it on x86 x86/fpu, sched: Dynamically allocate 'struct fpu' x86/entry/64, x86/nmi/64: Add CONFIG_DEBUG_ENTRY NMI testing code x86/nmi/64: Make the "NMI executing" variable more consistent x86/nmi/64: Minor asm simplification x86/nmi/64: Use DF to avoid userspace RSP confusing nested NMI detection x86/nmi/64: Reorder nested NMI checks x86/nmi/64: Improve nested NMI comments x86/nmi/64: Switch stacks on userspace NMI entry x86/nmi/64: Remove asm code that saves CR2 x86/nmi: Enable nested do_nmi() handling for 64-bit kernels
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