Merge "Documentation: bindings: Add DT bindings for ARM Juno boards" from Liviu Dudau:

* 'for-upstream/juno-dts' of git://linux-arm.org/linux-ld:
  Documentation: bindings: Add DT bindings for ARM Juno boards.
  arm64: Add DT support for Juno r1 board.
  arm64: Juno: Add GICv2m support in device tree.
  arm64: Juno: Add memory mapped timer node
  arm64: Juno: Split juno.dts into juno-base.dtsi and juno.dts.
  arm64: Juno: Fix the GIC node address label and the frequency of FAXI clock.

List the required properties and nodes used to describe the
ARM Juno boards.
Signed-off-by: Liviu Dudau <Liviu.Dudau@arm.com>

This board is based on Juno r0 with updated Cortex A5x revisions
and board errata fixes. It also contains coherent ThinLinks ports
on the expansion slot that allow for an AXI master on the daughter
card to participate in a coherency domain.

Support for SoC PCIe host bridge will be added as a separate series.
Signed-off-by: Liviu Dudau <Liviu.Dudau@arm.com>
Acked-by: Jon Medhurst <tixy@linaro.org>
Acked-by: Sudeep Holla <sudeep.holla@arm.com>

Juno contains a GICv2m extension for handling PCIe MSI messages.
Add a node declaring the first frame of the extension.
Signed-off-by: Liviu Dudau <Liviu.Dudau@arm.com>
Acked-by: Jon Medhurst <tixy@linaro.org>
Acked-by: Sudeep Holla <sudeep.holla@arm.com>

Juno based boards have a memory mapped timer @ 0x2a810000. This
is disabled on r0 version of the board due to an SoC errata.
Signed-off-by: Liviu Dudau <Liviu.Dudau@arm.com>
Acked-by: Jon Medhurst <tixy@linaro.org>
Acked-by: Sudeep Holla <sudeep.holla@arm.com>

Prepare the device tree for adding more boards based on Juno r0.
Signed-off-by: Liviu Dudau <Liviu.Dudau@arm.com>
Acked-by: Jon Medhurst <tixy@linaro.org>
Acked-by: Sudeep Holla <sudeep.holla@arm.com>

During the review of the Juno DT files I've noticed that the GIC
node label had two digits swapped leading to a different address
being shown in the /sys/devices fs.

Sudeep also pointed that public revisions of the Juno documentation
list a different frequency for the FAXI system than what the one
I've been using when creating the DT file. Verified with the firmware
people to be the correct value in the shipped systems.
Reported-by: Sudeep Holla <sudeep.holla@arm.com>
Signed-off-by: Liviu Dudau <Liviu.Dudau@arm.com>
Acked-by: Sudeep Holla <sudeep.holla@arm.com>
Acked-by: Jon Medhurst <tixy@linaro.org>

Merge tag 'at91-dt3' of git://git.kernel.org/pub/scm/linux/kernel/git/nferre/linux-at91 into next/dt

Merge "Third batch of DT changes for 4.2" from Nicolas Ferre:

- USB host clock refine following changes in drivers
- one little fix for usart pinctrl

* tag 'at91-dt3' of git://git.kernel.org/pub/scm/linux/kernel/git/nferre/linux-at91:
  ARM: at91/dt: remove useless usb clock
  ARM: at91/dt: remove useless uhpck clock references from ehci defintions
  USB: atmel: update DT bindings documentation
  ARM: at91/dt: at91sam9x5: fix usart1 sck pin definition

Merge tag 'v4.2-rockchip-dts2' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into next/dt

Merge "ARM: rockchip: dts relicensing for 4.2" from Heiko Stuebner:

Relicense all Rockchip-related devicetree files to the GPL2/X11 combo.
I've now finally aquired necessary Acks from all contributors.

* tag 'v4.2-rockchip-dts2' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip:
  ARM: dts: rockchip: relicense rk3288-evb* under GPLv2/X11
  ARM: dts: rockchip: relicense rk3288.dtsi under GPLv2/X11
  ARM: dts: rockchip: relicense rk3188-radxarock.dts under GPLv2/X11
  ARM: dts: rockchip: relicense rk3066a-bqcurie2.dts under GPLv2/X11
  ARM: dts: rockchip: relicense rk3288-thermal.dtsi under GPLv2/X11
  ARM: dts: rockchip: relicense rk3188.dtsi under GPLv2/X11
  ARM: dts: rockchip: relicense rk3066a.dtsi under GPLv2/X11
  ARM: dts: rockchip: relicense rk3xxx.dtsi under GPLv2/X11

The ohci driver now calls clk_set_rate on the uhpck clock (which forwards
set_rate requests to its parent: the usb clock).
Remove useless references to usb clocks from ohci definitions.
Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>

The uhpck is useless for High-Speed communications, remove the reference
to this clock in all ehci definitions.
Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>

Add documentation for the missing clocks, clock-names, reg and interrupts
properties.
Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>

This adds an initial device tree to run Linux on the Cortex-M4 on
the Vybrid based Colibri VF61 module.
Signed-off-by: Stefan Agner <stefan@agner.ch>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>

Merge "Berlin DT changes for v4.2" from Sebastian Hesselbarth:
- GPLv2/X11 dual licensing
- Mark Berlin DT bindings as unstable
- Updated binding documentation for reworked
  chip/system ctrl nodes

* tag 'berlin-dt-4.2-1' of git://git.infradead.org/users/hesselba/linux-berlin:
  Documentation: bindings: update the berlin chip and system ctrl doc
  Documentation: bindings: move the Berlin clock documentation
  Documentation: bindings: move the Berlin pinctrl documentation
  Documentation: bindings: move the Berlin reset documentation
  Documentation: bindings: update the Berlin controllers documentation
  Documentation: bindings: berlin: consider our dt bindings as unstable
  ARM: dts: berlin: relicense the BG2CD Google Chromecast dts under GPLv2/X11
  ARM: dts: berlin: relicense the berlin2cd dtsi under GPLv2/X11
  ARM: dts: berlin: relicense the BG2 Sony NSZ-GS7 dts under GPLv2/X11
  ARM: dts: berlin: relicense the berlin2 dtsi under GPLv2/X11
  ARM: dts: berlin: relicense the BG2Q Marvell DMP dts under GPLv2/X11
  ARM: dts: berlin: relicense the berlin2q dtsi under GPLv2/X11

Merge tag 'at91-dt2' of git://git.kernel.org/pub/scm/linux/kernel/git/nferre/linux-at91 into next/dt

Merge "Second batch of DT changes for 4.2:" from Nicolas Ferre:
- sama5d4: more peripherals: usarts, uarts, spi, pioD access
- sama5d3: phy address for gmac
- change NFC register map
- regulator additions for the sd/mmc

* tag 'at91-dt2' of git://git.kernel.org/pub/scm/linux/kernel/git/nferre/linux-at91:
  ARM: at91/dt: sama5d4 xplained: add regulators for v(q)mmc1 supplies
  ARM: at91/dt: sama5d3 xplained: add fixed regulator for vmmc0
  ARM: at91/dt: sama5d3 xplained: add mmc0 vqmmc entry
  ARM: at91/dt: sama5d3 xplained: fill in mmc1 and set it to disabled
  ARM: at91/dt: sama5: reduce the NFC command register map
  ARM: at91/dt: sama5d4: update pinctrl ranges
  ARM: at91/dt: sama5d3 xplained: add phy address for macb0
  ARM: at91/dt: sama5d4 xplained: add spi1 on j14 connector
  ARM: at91/dt: sama5d4: add spi1, spi2 dt nodes
  ARM: at91/dt: sama5d4: add uart0, uart1 dt nodes
  ARM: at91/dt: sama5d4: add usart0, usart1 dt nodes

SCK1 pin is pioC 29. Comment was okay.
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>

Add vcc_mmc1 fixed regulator to remove the 'no vmmc regulator found' warning
when probing the mmc1 device.
Signed-off-by: Ludovic Desroches <ludovic.desroches@atmel.com>
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>

Add fixed regulator for vmmc0 and attach the vmmc for it to the mmc0
node on the SAM5D3 Xplained board. This will remove the following
warning from the kernel:

atmel_mci f0000000.mmc: No vmmc regulator found

Note, atmel_defconfig will need fixed regulator support enabled if this
is to be used properly.
Signed-off-by: Ben Dooks <ben.dooks@codethink.co.uk>
[use a fixed regulator instead of gpio one]
Signed-off-by: Ludovic Desroches <ludovic.desroches@atmel.com>
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>

The SAM5D3 Xplained device tree is missing the vqmmc node which is
tied to 3.3V on the board. Add this to avoid the kernel warning that
there is no vqmmc node.

atmel_mci f0000000.mmc: No vqmmc regulator found
Signed-off-by: Ben Dooks <ben.dooks@codethink.co.uk>
Signed-off-by: Ludovic Desroches <ludovic.desroches@atmel.com>
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>

The mmc1 channel is not populated on the SAM5D3 Xplained board, however
it is enabled and therefore the driver is attaching to it.

The node configuration for mmc1 is missing, so add an mmc1 node in the
device tree and set its status to disabled. Also add the vmmc and the
necessary slot configuration if this node were enabled to avoid the following
warnings from the driver:

atmel_mci f8000000.mmc: No vmmc regulator found
atmel_mci f8000000.mmc: No vqmmc regulator found
Signed-off-by: Ben Dooks <ben.dooks@codethink.co.uk>
Signed-off-by: Ludovic Desroches <ludovic.desroches@atmel.com>
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>

commit 111573cc ("mtd: atmel_nand: check NFC busy flag by HSMC_SR
instead of NFC cmd regs")
check NFC busy by nfc SR instead of NFC cmd regs. So we don't need to
map NFC cmd registers to include NFCBUSY bit.
That means we only need map 0x08000000 instead of 0x10000000 for NFC
cmd regs.

This patch reduce the NFC cmd regs map for sama5d3 & sama5d4.
Signed-off-by: Josh Wu <josh.wu@atmel.com>
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>

Update the pinctrl ranges property to support pioD controller whose
mapping is not contiguous with other pio controllers. Without this
update, getting resource will fail, then pinctrl probe will fail too
because there is a missing pio controller.
Signed-off-by: Ludovic Desroches <ludovic.desroches@atmel.com>
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>

Specify the phy address on macb0 node aka GEM.
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>

Route SPI1 on the Arduino "in the middle" spi connector.
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>

Add sama5d4 spi1, spi2 dt nodes & pinctrl.
Signed-off-by: Suchang Ko <suchangko@samul.kr>
[nicolas.ferre@atmel.com: split patch, reorder & whitespace fixes]
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>

Now that the rework to have one sub-node per device in the chip and
system controllers is done, their dedicated compatible can be removed.
Signed-off-by: Antoine Tenart <antoine.tenart@free-electrons.com>
Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>

The Berlin clock documentation was part of the Marvell Berlin SoC
documentation because the Berlin clock configuration was inside the
chip controller. With the recent rework of the chip and system
controller handling (now all sub-devices of the soc and system
controller nodes are registred with simple-mfd, and each device has its
own sub-node), the documentation of the Berlin clock driver can be moved
to the generic clock documentation directory.
Signed-off-by: Antoine Tenart <antoine.tenart@free-electrons.com>
Acked-by: Stephen Boyd <sboyd@codeaurora.org>
Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>

The Berlin pinctrl documentation was part of the Marvell Berlin SoC
documentation because the Berlin pinctrl configuration was inside the
chip and the system controllers. With the recent rework of the chip and
system controller handling (now an MFD driver registers all sub-devices
of the two soc and system controller nodes and each device has its own
sub-node), the documentation of the Berlin pinctrl driver can be moved
to the generic pinctrl documentation directory.
Signed-off-by: Antoine Tenart <antoine.tenart@free-electrons.com>
Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>

The Berlin reset documentation was part of the Marvell Berlin SoC
documentation because the Berlin reset configuration was inside the chip
controller. With the recent rework of the chip and system controller
handling (now an MFD driver registers all sub-devices of the two soc and
system controller nodes and each device has its own sub-node), the
documentation of the Berlin reset driver can be moved to the generic
reset documentation directory.
Signed-off-by: Antoine Tenart <antoine.tenart@free-electrons.com>
Acked-by: Philipp Zabel <p.zabel@pengutronix.de>
Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>

We're moving from a single node for multiple devices to a node with one
sub-node per sub-device, registered by simple-mfd. Update the
documentation to reflect the changes.
Signed-off-by: Antoine Tenart <antoine.tenart@free-electrons.com>
Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>

Because the support of Marvell Berlin SoCs is still a work in progress,
add a statement to explicitly consider our device tree files and
bindings as unstable.
Signed-off-by: Antoine Tenart <antoine.tenart@free-electrons.com>
Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>

The current GPLv2 only licensing on this dts makes it very impractical
for other software components licensed under another license.

In order to make it easier for them to reuse our device trees, relicense
this dts under a GPLv2/X11 dual-license.
Signed-off-by: Antoine Tenart <antoine.tenart@free-electrons.com>
Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>

The current GPLv2 only licensing on this dtsi makes it very impractical
for other software components licensed under another license.

In order to make it easier for them to reuse our device trees, relicense
this dtsi under a GPLv2/X11 dual-license.
Signed-off-by: Antoine Tenart <antoine.tenart@free-electrons.com>
Acked-by: Jisheng Zhang <jszhang@marvell.com>
Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>

The current GPLv2 only licensing on this dts makes it very impractical
for other software components licensed under another license.

In order to make it easier for them to reuse our device trees, relicense
this dts under a GPLv2/X11 dual-license.
Signed-off-by: Antoine Tenart <antoine.tenart@free-electrons.com>
Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>

The current GPLv2 only licensing on this dtsi makes it very impractical
for other software components licensed under another license.

In order to make it easier for them to reuse our device trees, relicense
this dtsi under a GPLv2/X11 dual-license.
Signed-off-by: Antoine Tenart <antoine.tenart@free-electrons.com>
Acked-by: Jisheng Zhang <jszhang@marvell.com>
Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>

The current GPLv2 only licensing on this dts makes it very impractical
for other software components licensed under another license.

In order to make it easier for them to reuse our device trees, relicense
this dts under a GPLv2/X11 dual-license.
Signed-off-by: Antoine Tenart <antoine.tenart@free-electrons.com>
Acked-by: Jisheng Zhang <jszhang@marvell.com>
Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>

The current GPLv2 only licensing on this dtsi makes it very impractical
for other software components licensed under another license.

In order to make it easier for them to reuse our device trees, relicense
this dtsi under a GPLv2/X11 dual-license.
Signed-off-by: Antoine Tenart <antoine.tenart@free-electrons.com>
Acked-by: Jisheng Zhang <jszhang@marvell.com>
Acked-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>

Add basic support for Hitex LPC4350 Evaluation Board. Board
features a LPC4350 Soc, 8 MB SDRAM, 8 MB SPI Flash, USB and
Ethernet.

More information can be found on:
http://www.hitex.com/index.php?id=3212Signed-off-by: Ariel D'Alessandro <ariel.dalessandro@gmail.com>
Signed-off-by: Joachim Eastwood <manabian@gmail.com>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>

Adds basic support for Embedded Artists' LPC4357 Developer's Kit. Board
features a LPC4357 Soc, 32 MB SDRAM, 128 MB NAND Flash, 16 MB SPI
Flash, USB and Ethernet.

More information can be found on:
http://www.embeddedartists.com/products/kits/lpc4357_kit.phpSigned-off-by: Joachim Eastwood <manabian@gmail.com>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>

NXP LPC18xx/43xx SoCs are very similar devices and should be able to
share a common base (lpc18xx.dtsi). Diffences between the devices are
put in a dtsi which is specific to that device.
Signed-off-by: Joachim Eastwood <manabian@gmail.com>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>