1. 14 Jul, 2020 40 commits
    • Horatiu Vultur's avatar
      bridge: mrp: Add br_mrp_in_port_open function · 4139d4b5
      Horatiu Vultur authored
      This function notifies the userspace when the node lost the continuity
      of MRP_InTest frames.
      Signed-off-by: default avatarHoratiu Vultur <horatiu.vultur@microchip.com>
      Acked-by: default avatarNikolay Aleksandrov <nikolay@cumulusnetworks.com>
      Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
      4139d4b5
    • Horatiu Vultur's avatar
      bridge: mrp: Rename br_mrp_port_open to br_mrp_ring_port_open · 4cc625c6
      Horatiu Vultur authored
      This patch renames the function br_mrp_port_open to
      br_mrp_ring_port_open. In this way is more clear that a ring port lost
      the continuity because there will be also a br_mrp_in_port_open.
      Signed-off-by: default avatarHoratiu Vultur <horatiu.vultur@microchip.com>
      Acked-by: default avatarNikolay Aleksandrov <nikolay@cumulusnetworks.com>
      Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
      4cc625c6
    • Horatiu Vultur's avatar
      bridge: mrp: Extend br_mrp for MRP interconnect · 78c1b4fb
      Horatiu Vultur authored
      This patch extends the 'struct br_mrp' to contain information regarding
      the MRP interconnect. It contains the following:
      - the interconnect port 'i_port', which is NULL if the node doesn't have
        a interconnect role
      - the interconnect id, which is similar with the ring id, but this field
        is also part of the MRP_InTest frames.
      - the interconnect role, which can be MIM or MIC.
      - the interconnect state, which can be open or closed.
      - the interconnect delayed_work for sending MRP_InTest frames and check
        for lost of continuity.
      Signed-off-by: default avatarHoratiu Vultur <horatiu.vultur@microchip.com>
      Acked-by: default avatarNikolay Aleksandrov <nikolay@cumulusnetworks.com>
      Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
      78c1b4fb
    • Horatiu Vultur's avatar
      bridge: mrp: Extend bridge interface · 43364ef1
      Horatiu Vultur authored
      This patch adds a new flag(BR_MRP_LOST_IN_CONT) to the net bridge
      ports. This bit will be set when the port lost the continuity of
      MRP_InTest frames.
      Signed-off-by: default avatarHoratiu Vultur <horatiu.vultur@microchip.com>
      Acked-by: default avatarNikolay Aleksandrov <nikolay@cumulusnetworks.com>
      Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
      43364ef1
    • Horatiu Vultur's avatar
      bridge: uapi: mrp: Extend MRP attributes for MRP interconnect · 28017583
      Horatiu Vultur authored
      Extend the existing MRP netlink attributes to allow to configure MRP
      Interconnect:
      
      IFLA_BRIDGE_MRP_IN_ROLE - the parameter type is br_mrp_in_role which
        contains the interconnect id, the ring id, the interconnect role(MIM
        or MIC) and the port ifindex that represents the interconnect port.
      
      IFLA_BRIDGE_MRP_IN_STATE - the parameter type is br_mrp_in_state which
        contains the interconnect id and the interconnect state.
      
      IFLA_BRIDGE_MRP_IN_TEST - the parameter type is br_mrp_start_in_test
        which contains the interconnect id, the interval at which to send
        MRP_InTest frames, how many test frames can be missed before declaring
        the interconnect ring open and the period which represents for how long
        to send MRP_InTest frames.
      Signed-off-by: default avatarHoratiu Vultur <horatiu.vultur@microchip.com>
      Acked-by: default avatarNikolay Aleksandrov <nikolay@cumulusnetworks.com>
      Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
      28017583
    • Horatiu Vultur's avatar
      switchdev: mrp: Extend switchdev API for MRP Interconnect · cf7c5274
      Horatiu Vultur authored
      Extend switchdev API to add support for MRP interconnect. The HW is
      notified in the following cases:
      
      SWITCHDEV_OBJ_ID_IN_ROLE_MRP: This is used when the interconnect role
        of the node changes. The supported roles are MIM and MIC.
      
      SWITCHDEV_OBJ_ID_IN_STATE_MRP: This is used when the interconnect ring
        changes it states to open or closed.
      
      SWITCHDEV_OBJ_ID_IN_TEST_MRP: This is used to start/stop sending
        MRP_InTest frames on all MRP ports. This is called only on nodes that
        have the interconnect role MIM.
      Signed-off-by: default avatarHoratiu Vultur <horatiu.vultur@microchip.com>
      Reviewed-by: default avatarNikolay Aleksandrov <nikolay@cumulusnetworks.com>
      Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
      cf7c5274
    • David S. Miller's avatar
      Merge git://git.kernel.org/pub/scm/linux/kernel/git/bpf/bpf-next · 07dd1b7e
      David S. Miller authored
      Alexei Starovoitov says:
      
      ====================
      pull-request: bpf-next 2020-07-13
      
      The following pull-request contains BPF updates for your *net-next* tree.
      
      We've added 36 non-merge commits during the last 7 day(s) which contain
      a total of 62 files changed, 2242 insertions(+), 468 deletions(-).
      
      The main changes are:
      
      1) Avoid trace_printk warning banner by switching bpf_trace_printk to use
         its own tracing event, from Alan.
      
      2) Better libbpf support on older kernels, from Andrii.
      
      3) Additional AF_XDP stats, from Ciara.
      
      4) build time resolution of BTF IDs, from Jiri.
      
      5) BPF_CGROUP_INET_SOCK_RELEASE hook, from Stanislav.
      ====================
      Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
      07dd1b7e
    • Alexander A. Klimov's avatar
      wan: Replace HTTP links with HTTPS ones · bfe4c403
      Alexander A. Klimov authored
      Rationale:
      Reduces attack surface on kernel devs opening the links for MITM
      as HTTPS traffic is much harder to manipulate.
      
      Deterministic algorithm:
      For each file:
        If not .svg:
          For each line:
            If doesn't contain `\bxmlns\b`:
              For each link, `\bhttp://[^# \t\r\n]*(?:\w|/)`:
      	  If neither `\bgnu\.org/license`, nor `\bmozilla\.org/MPL\b`:
                  If both the HTTP and HTTPS versions
                  return 200 OK and serve the same content:
                    Replace HTTP with HTTPS.
      Signed-off-by: default avatarAlexander A. Klimov <grandmaster@al2klimov.de>
      Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
      bfe4c403
    • Christophe JAILLET's avatar
      pcnet32: switch from 'pci_' to 'dma_' API · da6e8ace
      Christophe JAILLET authored
      The wrappers in include/linux/pci-dma-compat.h should go away.
      
      The patch has been generated with the coccinelle script below and has been
      hand modified to replace GPF_ with a correct flag.
      It has been compile tested.
      
      When memory is allocated in 'pcnet32_realloc_tx_ring()' and
      'pcnet32_realloc_rx_ring()', GFP_ATOMIC must be used because a spin_lock is
      hold.
      The call chain is:
         pcnet32_set_ringparam
         ** spin_lock_irqsave(&lp->lock, flags);
         --> pcnet32_realloc_tx_ring
         --> pcnet32_realloc_rx_ring
         ** spin_unlock_irqrestore(&lp->lock, flags);
      
      When memory is in 'pcnet32_probe1()' and 'pcnet32_alloc_ring()', GFP_KERNEL
      can be used.
      
      While at it, update a few comments and pr_err messages to be more in line
      with the new function names.
      
      @@
      @@
      -    PCI_DMA_BIDIRECTIONAL
      +    DMA_BIDIRECTIONAL
      
      @@
      @@
      -    PCI_DMA_TODEVICE
      +    DMA_TO_DEVICE
      
      @@
      @@
      -    PCI_DMA_FROMDEVICE
      +    DMA_FROM_DEVICE
      
      @@
      @@
      -    PCI_DMA_NONE
      +    DMA_NONE
      
      @@
      expression e1, e2, e3;
      @@
      -    pci_alloc_consistent(e1, e2, e3)
      +    dma_alloc_coherent(&e1->dev, e2, e3, GFP_)
      
      @@
      expression e1, e2, e3;
      @@
      -    pci_zalloc_consistent(e1, e2, e3)
      +    dma_alloc_coherent(&e1->dev, e2, e3, GFP_)
      
      @@
      expression e1, e2, e3, e4;
      @@
      -    pci_free_consistent(e1, e2, e3, e4)
      +    dma_free_coherent(&e1->dev, e2, e3, e4)
      
      @@
      expression e1, e2, e3, e4;
      @@
      -    pci_map_single(e1, e2, e3, e4)
      +    dma_map_single(&e1->dev, e2, e3, e4)
      
      @@
      expression e1, e2, e3, e4;
      @@
      -    pci_unmap_single(e1, e2, e3, e4)
      +    dma_unmap_single(&e1->dev, e2, e3, e4)
      
      @@
      expression e1, e2, e3, e4, e5;
      @@
      -    pci_map_page(e1, e2, e3, e4, e5)
      +    dma_map_page(&e1->dev, e2, e3, e4, e5)
      
      @@
      expression e1, e2, e3, e4;
      @@
      -    pci_unmap_page(e1, e2, e3, e4)
      +    dma_unmap_page(&e1->dev, e2, e3, e4)
      
      @@
      expression e1, e2, e3, e4;
      @@
      -    pci_map_sg(e1, e2, e3, e4)
      +    dma_map_sg(&e1->dev, e2, e3, e4)
      
      @@
      expression e1, e2, e3, e4;
      @@
      -    pci_unmap_sg(e1, e2, e3, e4)
      +    dma_unmap_sg(&e1->dev, e2, e3, e4)
      
      @@
      expression e1, e2, e3, e4;
      @@
      -    pci_dma_sync_single_for_cpu(e1, e2, e3, e4)
      +    dma_sync_single_for_cpu(&e1->dev, e2, e3, e4)
      
      @@
      expression e1, e2, e3, e4;
      @@
      -    pci_dma_sync_single_for_device(e1, e2, e3, e4)
      +    dma_sync_single_for_device(&e1->dev, e2, e3, e4)
      
      @@
      expression e1, e2, e3, e4;
      @@
      -    pci_dma_sync_sg_for_cpu(e1, e2, e3, e4)
      +    dma_sync_sg_for_cpu(&e1->dev, e2, e3, e4)
      
      @@
      expression e1, e2, e3, e4;
      @@
      -    pci_dma_sync_sg_for_device(e1, e2, e3, e4)
      +    dma_sync_sg_for_device(&e1->dev, e2, e3, e4)
      
      @@
      expression e1, e2;
      @@
      -    pci_dma_mapping_error(e1, e2)
      +    dma_mapping_error(&e1->dev, e2)
      
      @@
      expression e1, e2;
      @@
      -    pci_set_dma_mask(e1, e2)
      +    dma_set_mask(&e1->dev, e2)
      
      @@
      expression e1, e2;
      @@
      -    pci_set_consistent_dma_mask(e1, e2)
      +    dma_set_coherent_mask(&e1->dev, e2)
      Signed-off-by: default avatarChristophe JAILLET <christophe.jaillet@wanadoo.fr>
      Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
      da6e8ace
    • Christophe JAILLET's avatar
      amd8111e: switch from 'pci_' to 'dma_' API · 428f09c2
      Christophe JAILLET authored
      The wrappers in include/linux/pci-dma-compat.h should go away.
      
      The patch has been generated with the coccinelle script below and has been
      hand modified to replace GPF_ with a correct flag.
      It has been compile tested.
      
      When memory is allocated in 'amd8111e_init_ring()', GFP_ATOMIC must be used
      because a spin_lock is hold.
      One of the call chains is:
         amd8111e_open
         ** spin_lock_irq(&lp->lock);
         --> amd8111e_restart
            --> amd8111e_init_ring
         ** spin_unlock_irq(&lp->lock);
      
      The rest of the patch is produced by coccinelle with a few adjustments to
      please checkpatch.pl.
      
      @@
      @@
      -    PCI_DMA_BIDIRECTIONAL
      +    DMA_BIDIRECTIONAL
      
      @@
      @@
      -    PCI_DMA_TODEVICE
      +    DMA_TO_DEVICE
      
      @@
      @@
      -    PCI_DMA_FROMDEVICE
      +    DMA_FROM_DEVICE
      
      @@
      @@
      -    PCI_DMA_NONE
      +    DMA_NONE
      
      @@
      expression e1, e2, e3;
      @@
      -    pci_alloc_consistent(e1, e2, e3)
      +    dma_alloc_coherent(&e1->dev, e2, e3, GFP_)
      
      @@
      expression e1, e2, e3;
      @@
      -    pci_zalloc_consistent(e1, e2, e3)
      +    dma_alloc_coherent(&e1->dev, e2, e3, GFP_)
      
      @@
      expression e1, e2, e3, e4;
      @@
      -    pci_free_consistent(e1, e2, e3, e4)
      +    dma_free_coherent(&e1->dev, e2, e3, e4)
      
      @@
      expression e1, e2, e3, e4;
      @@
      -    pci_map_single(e1, e2, e3, e4)
      +    dma_map_single(&e1->dev, e2, e3, e4)
      
      @@
      expression e1, e2, e3, e4;
      @@
      -    pci_unmap_single(e1, e2, e3, e4)
      +    dma_unmap_single(&e1->dev, e2, e3, e4)
      
      @@
      expression e1, e2, e3, e4, e5;
      @@
      -    pci_map_page(e1, e2, e3, e4, e5)
      +    dma_map_page(&e1->dev, e2, e3, e4, e5)
      
      @@
      expression e1, e2, e3, e4;
      @@
      -    pci_unmap_page(e1, e2, e3, e4)
      +    dma_unmap_page(&e1->dev, e2, e3, e4)
      
      @@
      expression e1, e2, e3, e4;
      @@
      -    pci_map_sg(e1, e2, e3, e4)
      +    dma_map_sg(&e1->dev, e2, e3, e4)
      
      @@
      expression e1, e2, e3, e4;
      @@
      -    pci_unmap_sg(e1, e2, e3, e4)
      +    dma_unmap_sg(&e1->dev, e2, e3, e4)
      
      @@
      expression e1, e2, e3, e4;
      @@
      -    pci_dma_sync_single_for_cpu(e1, e2, e3, e4)
      +    dma_sync_single_for_cpu(&e1->dev, e2, e3, e4)
      
      @@
      expression e1, e2, e3, e4;
      @@
      -    pci_dma_sync_single_for_device(e1, e2, e3, e4)
      +    dma_sync_single_for_device(&e1->dev, e2, e3, e4)
      
      @@
      expression e1, e2, e3, e4;
      @@
      -    pci_dma_sync_sg_for_cpu(e1, e2, e3, e4)
      +    dma_sync_sg_for_cpu(&e1->dev, e2, e3, e4)
      
      @@
      expression e1, e2, e3, e4;
      @@
      -    pci_dma_sync_sg_for_device(e1, e2, e3, e4)
      +    dma_sync_sg_for_device(&e1->dev, e2, e3, e4)
      
      @@
      expression e1, e2;
      @@
      -    pci_dma_mapping_error(e1, e2)
      +    dma_mapping_error(&e1->dev, e2)
      
      @@
      expression e1, e2;
      @@
      -    pci_set_dma_mask(e1, e2)
      +    dma_set_mask(&e1->dev, e2)
      
      @@
      expression e1, e2;
      @@
      -    pci_set_consistent_dma_mask(e1, e2)
      +    dma_set_coherent_mask(&e1->dev, e2)
      Signed-off-by: default avatarChristophe JAILLET <christophe.jaillet@wanadoo.fr>
      Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
      428f09c2
    • Alexander A. Klimov's avatar
      net: wan: cosa: Replace HTTP links with HTTPS ones · 350d1931
      Alexander A. Klimov authored
      Rationale:
      Reduces attack surface on kernel devs opening the links for MITM
      as HTTPS traffic is much harder to manipulate.
      
      Deterministic algorithm:
      For each file:
        If not .svg:
          For each line:
            If doesn't contain `\bxmlns\b`:
              For each link, `\bhttp://[^# \t\r\n]*(?:\w|/)`:
      	  If neither `\bgnu\.org/license`, nor `\bmozilla\.org/MPL\b`:
                  If both the HTTP and HTTPS versions
                  return 200 OK and serve the same content:
                    Replace HTTP with HTTPS.
      Signed-off-by: default avatarAlexander A. Klimov <grandmaster@al2klimov.de>
      Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
      350d1931
    • Alexander A. Klimov's avatar
      net: jme: Replace HTTP links with HTTPS ones · d788a0b5
      Alexander A. Klimov authored
      Rationale:
      Reduces attack surface on kernel devs opening the links for MITM
      as HTTPS traffic is much harder to manipulate.
      
      Deterministic algorithm:
      For each file:
        If not .svg:
          For each line:
            If doesn't contain `\bxmlns\b`:
              For each link, `\bhttp://[^# \t\r\n]*(?:\w|/)`:
      	  If neither `\bgnu\.org/license`, nor `\bmozilla\.org/MPL\b`:
                  If both the HTTP and HTTPS versions
                  return 200 OK and serve the same content:
                    Replace HTTP with HTTPS.
      Signed-off-by: default avatarAlexander A. Klimov <grandmaster@al2klimov.de>
      Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
      d788a0b5
    • Alexander A. Klimov's avatar
      net: ethernet: Replace HTTP links with HTTPS ones · a7d02782
      Alexander A. Klimov authored
      Rationale:
      Reduces attack surface on kernel devs opening the links for MITM
      as HTTPS traffic is much harder to manipulate.
      
      Deterministic algorithm:
      For each file:
        If not .svg:
          For each line:
            If doesn't contain `\bxmlns\b`:
              For each link, `\bhttp://[^# \t\r\n]*(?:\w|/)`:
      	  If neither `\bgnu\.org/license`, nor `\bmozilla\.org/MPL\b`:
                  If both the HTTP and HTTPS versions
                  return 200 OK and serve the same content:
                    Replace HTTP with HTTPS.
      Signed-off-by: default avatarAlexander A. Klimov <grandmaster@al2klimov.de>
      Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
      a7d02782
    • David S. Miller's avatar
      Merge branch 'New-DSA-driver-for-VSC9953-Seville-switch' · 35c891e1
      David S. Miller authored
      Vladimir Oltean says:
      
      ====================
      New DSA driver for VSC9953 Seville switch
      
      Looking at the Felix and Ocelot drivers, Maxim asked if it would be
      possible to use them as a base for a new driver for the Seville switch
      inside NXP T1040. Turns out, it is! The result is that the mscc_felix
      driver was extended to probe on Seville.
      
      The biggest challenge seems to be getting register read/write API
      generic enough to cover such wild bitfield variations between hardware
      generations.
      
      Currently, both felix and seville are built under the same kernel config
      option (NET_DSA_MSCC_FELIX). This has both some advantages (no need to
      duplicate the Lynx PCS code from felix_vsc9959.c) and some disadvantages
      (Seville needs to depend on PCI and on ENETC_MDIO). This will be further
      refined as time progresses.
      
      The driver has been completely reviewed. Previous submission was here,
      it wasn't accepted due to a conflict with Mark Brown's tree, very late
      in the release cycle:
      
      https://patchwork.ozlabs.org/project/netdev/cover/20200531122640.1375715-1-olteanv@gmail.com/
      
      So this is more of a repost, with the only changes being related to
      rebasing on top of the cleanup I had to do in Ocelot.
      ====================
      Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
      35c891e1
    • Vladimir Oltean's avatar
      docs: devicetree: add bindings for Seville DSA switch inside Felix driver · 77710929
      Vladimir Oltean authored
      There are no non-standard bindings being used. However Felix is a PCI
      device and Seville is a platform device. So give an example of device
      tree for this switch and document its compatible string.
      Signed-off-by: default avatarVladimir Oltean <vladimir.oltean@nxp.com>
      Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
      77710929
    • Maxim Kochetkov's avatar
      net: dsa: felix: introduce support for Seville VSC9953 switch · 84705fc1
      Maxim Kochetkov authored
      This is another switch from Vitesse / Microsemi / Microchip, that has
      10 ports (8 external, 2 internal) and is integrated into the Freescale /
      NXP T1040 PowerPC SoC. It is very similar to Felix from NXP LS1028A,
      except that this is a platform device and Felix is a PCI device, and it
      doesn't support IEEE 1588 and TSN.
      
      Like Felix, this driver configures its own PCS on the internal MDIO bus
      using a phy_device abstraction for it (yes, it will be refactored to use
      a raw mdio_device, like other phylink drivers do, but let's keep it like
      that for now). But unlike Felix, the MDIO bus and the PCS are not from
      the same vendor. The PCS is the same QorIQ/Layerscape PCS as found in
      Felix/ENETC/DPAA*, but the internal MDIO bus that is used to access it
      is actually an instantiation of drivers/net/phy/mdio-mscc-miim.c. But it
      would be difficult to reuse that driver (it doesn't even use regmap, and
      it's less than 200 lines of code), so we hand-roll here some internal
      MDIO bus accessors within seville_vsc9953.c, which serves the purpose of
      driving the PCS absolutely fine.
      
      Also, same as Felix, the PCS doesn't support dynamic reconfiguration of
      SerDes protocol, so we need to do pre-validation of PHY mode from device
      tree and not let phylink change it.
      Signed-off-by: default avatarMaxim Kochetkov <fido_max@inbox.ru>
      Signed-off-by: default avatarVladimir Oltean <vladimir.oltean@nxp.com>
      Reviewed-by: default avatarFlorian Fainelli <f.fainelli@gmail.com>
      Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
      84705fc1
    • Vladimir Oltean's avatar
      net: dsa: felix: move probing to felix_vsc9959.c · 375e1314
      Vladimir Oltean authored
      Felix is not actually meant to be a DSA driver only for the switch
      inside NXP LS1028A, but an umbrella for all Vitesse / Microsemi /
      Microchip switches that are register-compatible with Ocelot and that are
      using in DSA mode (with an NPI Ethernet port).
      
      For the dsa_switch_ops exported by the felix driver to be generic enough
      to be used by other non-PCI switches, we need to move the PCI-specific
      probing to the low-level translation module felix_vsc9959.c. This way,
      other switches can have their own probing functions, as platform devices
      or otherwise.
      
      This patch also removes the "Felix instance table", which did not stand
      the test of time and is unnecessary at this point.
      Signed-off-by: default avatarVladimir Oltean <vladimir.oltean@nxp.com>
      Reviewed-by: default avatarFlorian Fainelli <f.fainelli@gmail.com>
      Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
      375e1314
    • Maxim Kochetkov's avatar
      net: mscc: ocelot: extend watermark encoding function · aa92d836
      Maxim Kochetkov authored
      The ocelot_wm_encode function deals with setting thresholds for pause
      frame start and stop. In Ocelot and Felix the register layout is the
      same, but for Seville, it isn't. The easiest way to accommodate Seville
      hardware configuration is to introduce a function pointer for setting
      this up.
      Signed-off-by: default avatarMaxim Kochetkov <fido_max@inbox.ru>
      Signed-off-by: default avatarVladimir Oltean <vladimir.oltean@nxp.com>
      Reviewed-by: default avatarFlorian Fainelli <f.fainelli@gmail.com>
      Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
      aa92d836
    • Maxim Kochetkov's avatar
      net: mscc: ocelot: convert SYS_PAUSE_CFG register access to regfield · 541132f0
      Maxim Kochetkov authored
      Seville has a different bitwise layout than Ocelot and Felix.
      Signed-off-by: default avatarMaxim Kochetkov <fido_max@inbox.ru>
      Signed-off-by: default avatarVladimir Oltean <vladimir.oltean@nxp.com>
      Reviewed-by: default avatarFlorian Fainelli <f.fainelli@gmail.com>
      Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
      541132f0
    • Vladimir Oltean's avatar
      net: mscc: ocelot: disable flow control on NPI interface · b3964807
      Vladimir Oltean authored
      The Ocelot switches do not support flow control on Ethernet interfaces
      where a DSA tag must be added. If pause frames are enabled, they will be
      encapsulated in the DSA tag just like regular frames, and the DSA master
      will not recognize them.
      Signed-off-by: default avatarVladimir Oltean <vladimir.oltean@nxp.com>
      Reviewed-by: default avatarFlorian Fainelli <f.fainelli@gmail.com>
      Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
      b3964807
    • Vladimir Oltean's avatar
      net: mscc: ocelot: split writes to pause frame enable bit and to thresholds · e8e6e73d
      Vladimir Oltean authored
      We don't want ocelot_port_set_maxlen to enable pause frame TX, just to
      adjust the pause thresholds.
      
      Move the unconditional enabling of pause TX to ocelot_init_port. There
      is no good place to put such setting because it shouldn't be
      unconditional. But at the moment it is, we're not changing that.
      Signed-off-by: default avatarVladimir Oltean <vladimir.oltean@nxp.com>
      Reviewed-by: default avatarFlorian Fainelli <f.fainelli@gmail.com>
      Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
      e8e6e73d
    • Vladimir Oltean's avatar
      net: dsa: felix: create a template for the DSA tags on xmit · 67c24049
      Vladimir Oltean authored
      With this patch we try to kill 2 birds with 1 stone.
      
      First of all, some switches that use tag_ocelot.c don't have the exact
      same bitfield layout for the DSA tags. The destination ports field is
      different for Seville VSC9953 for example. So the choices are to either
      duplicate tag_ocelot.c into a new tag_seville.c (sub-optimal) or somehow
      take into account a supposed ocelot->dest_ports_offset when packing this
      field into the DSA injection header (again not ideal).
      
      Secondly, tag_ocelot.c already needs to memset a 128-bit area to zero
      and call some packing() functions of dubious performance in the
      fastpath. And most of the values it needs to pack are pretty much
      constant (BYPASS=1, SRC_PORT=CPU, DEST=port index). So it would be good
      if we could improve that.
      
      The proposed solution is to allocate a memory area per port at probe
      time, initialize that with the statically defined bits as per chip
      hardware revision, and just perform a simpler memcpy in the fastpath.
      
      Other alternatives have been analyzed, such as:
      - Create a separate tag_seville.c: too much code duplication for just 1
        bit field difference.
      - Create a separate DSA_TAG_PROTO_SEVILLE under tag_ocelot.c, just like
        tag_brcm.c, which would have a separate .xmit function. Again, too
        much code duplication for just 1 bit field difference.
      - Allocate the template from the init function of the tag_ocelot.c
        module, instead of from the driver: couldn't figure out a method of
        accessing the correct port template corresponding to the correct
        tagger in the .xmit function.
      Signed-off-by: default avatarVladimir Oltean <vladimir.oltean@nxp.com>
      Reviewed-by: default avatarFlorian Fainelli <f.fainelli@gmail.com>
      Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
      67c24049
    • Vladimir Oltean's avatar
      net: mscc: ocelot: convert QSYS_SWITCH_PORT_MODE and SYS_PORT_MODE to regfields · 886e1387
      Vladimir Oltean authored
      Currently Felix and Ocelot share the same bit layout in these per-port
      registers, but Seville does not. So we need reg_fields for that.
      
      Actually since these are per-port registers, we need to also specify the
      number of ports, and register size per port, and use the regmap API for
      multiple ports.
      
      There's a more subtle point to be made about the other 2 register
      fields:
      - QSYS_SWITCH_PORT_MODE_SCH_NEXT_CFG
      - QSYS_SWITCH_PORT_MODE_INGRESS_DROP_MODE
      which we are not writing any longer, for 2 reasons:
      - Using the previous API (ocelot_write_rix), we were only writing 1 for
        Felix and Ocelot, which was their hardware-default value, and which
        there wasn't any intention in changing.
      - In the case of SCH_NEXT_CFG, in fact Seville does not have this
        register field at all, and therefore, if we want to have common code
        we would be required to not write to it.
      Signed-off-by: default avatarVladimir Oltean <vladimir.oltean@nxp.com>
      Reviewed-by: default avatarFlorian Fainelli <f.fainelli@gmail.com>
      Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
      886e1387
    • Maxim Kochetkov's avatar
      soc: mscc: ocelot: add MII registers description · 2789658f
      Maxim Kochetkov authored
      Add the register definitions for the MSCC MIIM MDIO controller in
      preparation for seville_vsc9959.c to create its accessors for the
      internal MDIO bus.
      
      Since we've introduced elements to ocelot_regfields that are not
      instantiated by felix and ocelot, we need to define the size of the
      regfields arrays explicitly, otherwise ocelot_regfields_init, which
      iterates up to REGFIELD_MAX, will fault on the undefined regfield
      entries (if we're lucky).
      Signed-off-by: default avatarMaxim Kochetkov <fido_max@inbox.ru>
      Signed-off-by: default avatarVladimir Oltean <vladimir.oltean@nxp.com>
      Reviewed-by: default avatarFlorian Fainelli <f.fainelli@gmail.com>
      Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
      2789658f
    • Vladimir Oltean's avatar
      net: mscc: ocelot: convert port registers to regmap · 91c724cf
      Vladimir Oltean authored
      At the moment, there are some minimal register differences between
      VSC7514 Ocelot and VSC9959 Felix. To be precise, the PCS1G registers are
      missing from Felix because it was integrated with an NXP PCS.
      
      But with VSC9953 Seville (not yet introduced), the register differences
      are more pronounced.  The MAC registers are located at different offsets
      within the DEV_GMII target. So we need to refactor the driver to keep a
      regmap even for per-port registers. The callers of the ocelot_port_readl
      and ocelot_port_writel were kept unchanged, only the implementation is
      now more generic.
      Signed-off-by: default avatarVladimir Oltean <vladimir.oltean@nxp.com>
      Reviewed-by: default avatarFlorian Fainelli <f.fainelli@gmail.com>
      Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
      91c724cf
    • Ido Schimmel's avatar
      devlink: Fix use-after-free when destroying health reporters · 5d037b4d
      Ido Schimmel authored
      Dereferencing the reporter after it was destroyed in order to unlock the
      reporters lock results in a use-after-free [1].
      
      Fix this by storing a pointer to the lock in a local variable before
      destroying the reporter.
      
      [1]
      ==================================================================
      BUG: KASAN: use-after-free in devlink_health_reporter_destroy+0x15c/0x1b0 net/core/devlink.c:5476
      Read of size 8 at addr ffff8880650fd020 by task syz-executor.1/904
      
      CPU: 0 PID: 904 Comm: syz-executor.1 Not tainted 5.8.0-rc2+ #35
      Hardware name: QEMU Standard PC (i440FX + PIIX, 1996), BIOS rel-1.12.1-0-ga5cab58e9a3f-prebuilt.qemu.org 04/01/2014
      Call Trace:
       __dump_stack lib/dump_stack.c:77 [inline]
       dump_stack+0xf6/0x16e lib/dump_stack.c:118
       print_address_description.constprop.0+0x1c/0x250 mm/kasan/report.c:383
       __kasan_report mm/kasan/report.c:513 [inline]
       kasan_report.cold+0x1f/0x37 mm/kasan/report.c:530
       devlink_health_reporter_destroy+0x15c/0x1b0 net/core/devlink.c:5476
       nsim_dev_health_exit+0x8b/0xe0 drivers/net/netdevsim/health.c:317
       nsim_dev_reload_destroy+0x7f/0x110 drivers/net/netdevsim/dev.c:1134
       nsim_dev_reload_down+0x6e/0xd0 drivers/net/netdevsim/dev.c:712
       devlink_reload+0xc6/0x3b0 net/core/devlink.c:2952
       devlink_nl_cmd_reload+0x2f1/0x7c0 net/core/devlink.c:2987
       genl_family_rcv_msg_doit net/netlink/genetlink.c:691 [inline]
       genl_family_rcv_msg net/netlink/genetlink.c:736 [inline]
       genl_rcv_msg+0x611/0x9d0 net/netlink/genetlink.c:753
       netlink_rcv_skb+0x152/0x440 net/netlink/af_netlink.c:2469
       genl_rcv+0x24/0x40 net/netlink/genetlink.c:764
       netlink_unicast_kernel net/netlink/af_netlink.c:1303 [inline]
       netlink_unicast+0x53a/0x750 net/netlink/af_netlink.c:1329
       netlink_sendmsg+0x850/0xd90 net/netlink/af_netlink.c:1918
       sock_sendmsg_nosec net/socket.c:652 [inline]
       sock_sendmsg+0x150/0x190 net/socket.c:672
       ____sys_sendmsg+0x6d8/0x840 net/socket.c:2363
       ___sys_sendmsg+0xff/0x170 net/socket.c:2417
       __sys_sendmsg+0xe5/0x1b0 net/socket.c:2450
       do_syscall_64+0x56/0xa0 arch/x86/entry/common.c:359
       entry_SYSCALL_64_after_hwframe+0x44/0xa9
      RIP: 0033:0x4748ad
      Code: Bad RIP value.
      RSP: 002b:00007fd0358adc38 EFLAGS: 00000246 ORIG_RAX: 000000000000002e
      RAX: ffffffffffffffda RBX: 000000000056bf00 RCX: 00000000004748ad
      RDX: 0000000000000000 RSI: 00000000200000c0 RDI: 0000000000000003
      RBP: 00000000ffffffff R08: 0000000000000000 R09: 0000000000000000
      R10: 0000000000000000 R11: 0000000000000246 R12: 0000000000000000
      R13: 00000000004d1a4b R14: 00007fd0358ae6b4 R15: 00007fd0358add80
      
      Allocated by task 539:
       save_stack+0x1b/0x40 mm/kasan/common.c:48
       set_track mm/kasan/common.c:56 [inline]
       __kasan_kmalloc mm/kasan/common.c:494 [inline]
       __kasan_kmalloc.constprop.0+0xc2/0xd0 mm/kasan/common.c:467
       kmalloc include/linux/slab.h:555 [inline]
       kzalloc include/linux/slab.h:669 [inline]
       __devlink_health_reporter_create+0x91/0x2f0 net/core/devlink.c:5359
       devlink_health_reporter_create+0xa1/0x170 net/core/devlink.c:5431
       nsim_dev_health_init+0x95/0x3a0 drivers/net/netdevsim/health.c:279
       nsim_dev_probe+0xb1e/0xeb0 drivers/net/netdevsim/dev.c:1086
       really_probe+0x287/0x6d0 drivers/base/dd.c:525
       driver_probe_device+0xfe/0x1d0 drivers/base/dd.c:701
       __device_attach_driver+0x21e/0x290 drivers/base/dd.c:807
       bus_for_each_drv+0x161/0x1e0 drivers/base/bus.c:431
       __device_attach+0x21a/0x360 drivers/base/dd.c:873
       bus_probe_device+0x1e6/0x290 drivers/base/bus.c:491
       device_add+0xaf2/0x1b00 drivers/base/core.c:2680
       nsim_bus_dev_new drivers/net/netdevsim/bus.c:336 [inline]
       new_device_store+0x374/0x590 drivers/net/netdevsim/bus.c:215
       bus_attr_store+0x75/0xa0 drivers/base/bus.c:122
       sysfs_kf_write+0x113/0x170 fs/sysfs/file.c:138
       kernfs_fop_write+0x25d/0x480 fs/kernfs/file.c:315
       __vfs_write+0x7c/0x100 fs/read_write.c:495
       vfs_write+0x265/0x5e0 fs/read_write.c:559
       ksys_write+0x12d/0x250 fs/read_write.c:612
       do_syscall_64+0x56/0xa0 arch/x86/entry/common.c:359
       entry_SYSCALL_64_after_hwframe+0x44/0xa9
      
      Freed by task 904:
       save_stack+0x1b/0x40 mm/kasan/common.c:48
       set_track mm/kasan/common.c:56 [inline]
       kasan_set_free_info mm/kasan/common.c:316 [inline]
       __kasan_slab_free+0x12c/0x170 mm/kasan/common.c:455
       slab_free_hook mm/slub.c:1474 [inline]
       slab_free_freelist_hook mm/slub.c:1507 [inline]
       slab_free mm/slub.c:3072 [inline]
       kfree+0xe6/0x320 mm/slub.c:4063
       devlink_health_reporter_free net/core/devlink.c:5449 [inline]
       devlink_health_reporter_put+0xb7/0xf0 net/core/devlink.c:5456
       __devlink_health_reporter_destroy net/core/devlink.c:5463 [inline]
       devlink_health_reporter_destroy+0x11b/0x1b0 net/core/devlink.c:5475
       nsim_dev_health_exit+0x8b/0xe0 drivers/net/netdevsim/health.c:317
       nsim_dev_reload_destroy+0x7f/0x110 drivers/net/netdevsim/dev.c:1134
       nsim_dev_reload_down+0x6e/0xd0 drivers/net/netdevsim/dev.c:712
       devlink_reload+0xc6/0x3b0 net/core/devlink.c:2952
       devlink_nl_cmd_reload+0x2f1/0x7c0 net/core/devlink.c:2987
       genl_family_rcv_msg_doit net/netlink/genetlink.c:691 [inline]
       genl_family_rcv_msg net/netlink/genetlink.c:736 [inline]
       genl_rcv_msg+0x611/0x9d0 net/netlink/genetlink.c:753
       netlink_rcv_skb+0x152/0x440 net/netlink/af_netlink.c:2469
       genl_rcv+0x24/0x40 net/netlink/genetlink.c:764
       netlink_unicast_kernel net/netlink/af_netlink.c:1303 [inline]
       netlink_unicast+0x53a/0x750 net/netlink/af_netlink.c:1329
       netlink_sendmsg+0x850/0xd90 net/netlink/af_netlink.c:1918
       sock_sendmsg_nosec net/socket.c:652 [inline]
       sock_sendmsg+0x150/0x190 net/socket.c:672
       ____sys_sendmsg+0x6d8/0x840 net/socket.c:2363
       ___sys_sendmsg+0xff/0x170 net/socket.c:2417
       __sys_sendmsg+0xe5/0x1b0 net/socket.c:2450
       do_syscall_64+0x56/0xa0 arch/x86/entry/common.c:359
       entry_SYSCALL_64_after_hwframe+0x44/0xa9
      
      The buggy address belongs to the object at ffff8880650fd000
       which belongs to the cache kmalloc-512 of size 512
      The buggy address is located 32 bytes inside of
       512-byte region [ffff8880650fd000, ffff8880650fd200)
      The buggy address belongs to the page:
      page:ffffea0001943f00 refcount:1 mapcount:0 mapping:0000000000000000 index:0xffff8880650ff800 head:ffffea0001943f00 order:2 compound_mapcount:0 compound_pincount:0
      flags: 0x100000000010200(slab|head)
      raw: 0100000000010200 ffffea0001a06a08 ffffea00010ad308 ffff88806c402500
      raw: ffff8880650ff800 0000000000100009 00000001ffffffff 0000000000000000
      page dumped because: kasan: bad access detected
      
      Memory state around the buggy address:
       ffff8880650fcf00: fc fc fc fc fc fc fc fc fc fc fc fc fc fc fc fc
       ffff8880650fcf80: fc fc fc fc fc fc fc fc fc fc fc fc fc fc fc fc
      >ffff8880650fd000: fb fb fb fb fb fb fb fb fb fb fb fb fb fb fb fb
                                     ^
       ffff8880650fd080: fb fb fb fb fb fb fb fb fb fb fb fb fb fb fb fb
       ffff8880650fd100: fb fb fb fb fb fb fb fb fb fb fb fb fb fb fb fb
      ==================================================================
      
      Fixes: 3c5584bf ("devlink: Rework devlink health reporter destructor")
      Fixes: 15c724b9 ("devlink: Add devlink health port reporters API")
      Signed-off-by: default avatarIdo Schimmel <idosch@mellanox.com>
      Reviewed-by: default avatarMoshe Shemesh <moshe@mellanox.com>
      Reviewed-by: default avatarJiri Pirko <jiri@mellanox.com>
      Reviewed-by: default avatarJakub Kicinski <kuba@kernel.org>
      Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
      5d037b4d
    • Bartosz Golaszewski's avatar
      net: phy: fix mdio-mscc-miim build · c15841dd
      Bartosz Golaszewski authored
      PHYLIB is not selected by mdio-mscc-miim but it uses mdio devres helpers.
      Explicitly select MDIO_DEVRES in this driver's Kconfig entry.
      Reported-by: default avatarkernel test robot <lkp@intel.com>
      Fixes: 1814cff2 ("net: phy: add a Kconfig option for mdio_devres")
      Signed-off-by: default avatarBartosz Golaszewski <bgolaszewski@baylibre.com>
      Reviewed-by: default avatarAndrew Lunn <andrew@lunn.ch>
      Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
      c15841dd
    • Alexander A. Klimov's avatar
      isdn/capi: Replace HTTP links with HTTPS ones · e7fff95c
      Alexander A. Klimov authored
      Rationale:
      Reduces attack surface on kernel devs opening the links for MITM
      as HTTPS traffic is much harder to manipulate.
      
      Deterministic algorithm:
      For each file:
        If not .svg:
          For each line:
            If doesn't contain `\bxmlns\b`:
              For each link, `\bhttp://[^# \t\r\n]*(?:\w|/)`:
      	  If neither `\bgnu\.org/license`, nor `\bmozilla\.org/MPL\b`:
                  If both the HTTP and HTTPS versions
                  return 200 OK and serve the same content:
                    Replace HTTP with HTTPS.
      Signed-off-by: default avatarAlexander A. Klimov <grandmaster@al2klimov.de>
      Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
      e7fff95c
    • Wei Yongjun's avatar
      net: make symbol 'flush_works' static · ce1e2a77
      Wei Yongjun authored
      The sparse tool complains as follows:
      
      net/core/dev.c:5594:1: warning:
       symbol '__pcpu_scope_flush_works' was not declared. Should it be static?
      
      'flush_works' is not used outside of dev.c, so marks
      it static.
      
      Fixes: 41852497 ("net: batch calls to flush_all_backlogs()")
      Reported-by: default avatarHulk Robot <hulkci@huawei.com>
      Signed-off-by: default avatarWei Yongjun <weiyongjun1@huawei.com>
      Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
      ce1e2a77
    • David S. Miller's avatar
      Merge branch 'mlxsw-Add-support-for-buffer-drops-mirroring' · ea64ce6d
      David S. Miller authored
      Petr Machata says:
      
      ====================
      mlxsw: Add support for buffer drops mirroring
      
      This set offloads the recently introduced qevent infrastructure in TC and
      allows mlxsw to support mirroring of packets that were dropped due to
      buffer related reasons (e.g., early drops) during forwarding.
      
      Up until now mlxsw only supported mirroring that was either triggered by
      per-port triggers (i.e., via matchall) or by the policy engine (i.e.,
      via flower). Packets that are dropped due to buffer related reasons are
      mirrored using a third type of trigger, a global trigger.
      
      Global triggers are bound once to a mirroring (SPAN) agent and enabled
      on a per-{port, TC} basis. This allows users, for example, to request
      that only packets that were early dropped on a specific netdev to be
      mirrored.
      
      Patch set overview:
      
      Patch #1 extends flow_block_offload and indirect offload structure to pass
      a scheduler instead of a netdevice. That is necessary, because binding type
      and netdevice are not a unique identifier of the block anymore.
      
      Patches #2-#3 add the required registers to support above mentioned
      functionality.
      
      Patches #4-#6 gradually add support for global mirroring triggers.
      
      Patch #7 adds support for enablement of global mirroring triggers.
      
      Patches #8-#11 are cleanups in the flow offload code and shuffle some
      code around to make the qevent offload easier.
      
      Patch #12 implements offload of RED early_drop qevent.
      
      Patch #13 extends the RED selftest for offloaded datapath to cover
      early_drop qevent.
      
      v2:
      - Patch #1:
          - In struct flow_block_indr, track both sch and dev.
      ====================
      Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
      ea64ce6d
    • Petr Machata's avatar
      selftests: mlxsw: RED: Test offload of mirror on RED early_drop qevent · 1add9212
      Petr Machata authored
      Add a selftest for offloading a mirror action attached to the block
      associated with RED early_drop qevent.
      Signed-off-by: default avatarPetr Machata <petrm@mellanox.com>
      Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
      1add9212
    • Petr Machata's avatar
      mlxsw: spectrum_qdisc: Offload mirroring on RED qevent early_drop · f6668eac
      Petr Machata authored
      The RED qevents early_drop and mark can be offloaded under the following
      fairly strict conditions:
      
      - At most one filter is configured at the qevent block
      - The protocol is "any"
      - The classifier is matchall
      - The action is trap, sample, or mirror with the same conditions as
        with other SPAN offloads
      - The hw_counters type is none
      
      In this patchset, implement offload of mirror for early_drop qevent.
      The ECN trigger is currently not implemented in the FW and therefore
      the mark qevent is not supported.
      
      The qevent notifications look exactly like regular block binding
      notifications with a binder type that identifies them as qevents.
      Therefore the details of processing this binding are fairly similar
      to the matchall offload.
      
      struct flow_block_offload.sch points at the qdisc in question. Use it to
      figure out if the qdisc is offloaded at all and what TC it configures.
      Bounce bindings on not-offloaded qdiscs.
      
      Individual bindings are kept in a list so that several qevents can share
      the same block and all binding points get configured as the configured
      filters change.
      Signed-off-by: default avatarPetr Machata <petrm@mellanox.com>
      Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
      f6668eac
    • Petr Machata's avatar
      mlxsw: spectrum_flow: Promote binder-type dispatch to spectrum.c · f7a439cb
      Petr Machata authored
      Two RED qevents have been introduced recently. From the point of view of a
      driver, qevents are simply blocks with unusual binder types. However they
      need to be handled by different logic than ACL-like flows.
      
      Thus rename mlxsw_sp_setup_tc_block() to mlxsw_sp_setup_tc_block_clsact()
      and move the binder-type dispatch from there to spectrum.c into a new
      function of the original name. The new dispatcher is easier to extend with
      new binder types.
      Signed-off-by: default avatarPetr Machata <petrm@mellanox.com>
      Reviewed-by: default avatarJiri Pirko <jiri@mellanox.com>
      Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
      f7a439cb
    • Petr Machata's avatar
      mlxsw: spectrum_matchall: Publish matchall data structures · b50f60a0
      Petr Machata authored
      A following patch introduces offloading of filters attached to blocks bound
      to the RED tail_drop qevent. The only classifier that mlxsw will permit in
      this role is matchall. mlxsw currently offloads matchall filters used with
      clsact qdisc. The data structures used for that offload will come handy for
      the qevent offload as well. Publish them in spectrum.h.
      Signed-off-by: default avatarPetr Machata <petrm@mellanox.com>
      Reviewed-by: default avatarJiri Pirko <jiri@mellanox.com>
      Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
      b50f60a0
    • Petr Machata's avatar
      mlxsw: spectrum_flow: Drop an unused field · d928f821
      Petr Machata authored
      The field "dev" in struct mlxsw_sp_flow_block_binding is not used. Drop it.
      Signed-off-by: default avatarPetr Machata <petrm@mellanox.com>
      Reviewed-by: default avatarJiri Pirko <jiri@mellanox.com>
      Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
      d928f821
    • Petr Machata's avatar
      mlxsw: spectrum_flow: Convert a goto to a return · 2c4950ea
      Petr Machata authored
      No clean-up is performed at the target label of this goto. Convert it to a
      direct return.
      Signed-off-by: default avatarPetr Machata <petrm@mellanox.com>
      Reviewed-by: default avatarJiri Pirko <jiri@mellanox.com>
      Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
      2c4950ea
    • Ido Schimmel's avatar
      mlxsw: spectrum_span: Add APIs to enable / disable global mirroring triggers · 2bafb216
      Ido Schimmel authored
      While the binding of global mirroring triggers to a SPAN agent is
      global, packets are only mirrored if they belong to a port and TC on
      which the trigger was enabled. This allows, for example, to mirror
      packets that were tail-dropped on a specific netdev.
      
      Implement the operations that allow to enable / disable a global
      mirroring trigger on a specific port and TC.
      Signed-off-by: default avatarIdo Schimmel <idosch@mellanox.com>
      Reviewed-by: default avatarPetr Machata <petrm@mellanox.com>
      Reviewed-by: default avatarJiri Pirko <jiri@mellanox.com>
      Signed-off-by: default avatarPetr Machata <petrm@mellanox.com>
      Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
      2bafb216
    • Ido Schimmel's avatar
      mlxsw: spectrum_span: Add support for global mirroring triggers · ab8c06b7
      Ido Schimmel authored
      Global mirroring triggers are triggers that are only keyed by their
      trigger, as opposed to per-port triggers, which are keyed by their
      trigger and port.
      
      Such triggers allow mirroring packets that were tail/early dropped or
      ECN marked to a SPAN agent.
      
      Implement the previously added trigger operations for these global
      triggers. Since such triggers are only supported from Spectrum-2
      onwards, have the Spectrum-1 operations return an error.
      Signed-off-by: default avatarIdo Schimmel <idosch@mellanox.com>
      Reviewed-by: default avatarPetr Machata <petrm@mellanox.com>
      Reviewed-by: default avatarJiri Pirko <jiri@mellanox.com>
      Signed-off-by: default avatarPetr Machata <petrm@mellanox.com>
      Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
      ab8c06b7
    • Ido Schimmel's avatar
      mlxsw: spectrum_span: Prepare for global mirroring triggers · 08a3641f
      Ido Schimmel authored
      Currently, a SPAN agent can only be bound to a per-port trigger where
      the trigger is either an incoming packet (INGRESS) or an outgoing packet
      (EGRESS) to / from the port.
      
      The subsequent patch will introduce the concept of global mirroring
      triggers. The binding / unbinding of global triggers is different than
      that of per-port triggers. Such triggers also need to be enabled /
      disabled on a per-{port, TC} basis and are only supported from
      Spectrum-2 onwards.
      
      Add trigger operations that allow us to abstract these differences. Only
      implement the operations for per-port triggers. Next patch will
      implement the operations for global triggers.
      Signed-off-by: default avatarIdo Schimmel <idosch@mellanox.com>
      Reviewed-by: default avatarPetr Machata <petrm@mellanox.com>
      Reviewed-by: default avatarJiri Pirko <jiri@mellanox.com>
      Signed-off-by: default avatarPetr Machata <petrm@mellanox.com>
      Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
      08a3641f
    • Ido Schimmel's avatar
      mlxsw: spectrum_span: Move SPAN operations out of global file · 4bafb85a
      Ido Schimmel authored
      The per-ASIC SPAN operations are relevant to the SPAN module and
      therefore should be implemented there and not in the main driver file.
      Move them.
      
      These operations will be extended later on.
      Signed-off-by: default avatarIdo Schimmel <idosch@mellanox.com>
      Reviewed-by: default avatarJiri Pirko <jiri@mellanox.com>
      Reviewed-by: default avatarPetr Machata <petrm@mellanox.com>
      Signed-off-by: default avatarPetr Machata <petrm@mellanox.com>
      Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
      4bafb85a