- 28 Feb, 2013 24 commits
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Thomas Petazzoni authored
Now that the mvsdio MMC driver has a Device Tree binding, we add the Device Tree informations to describe the SDIO interface available in the Armada 370/XP SoCs. Signed-off-by:
Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Signed-off-by:
Jason Cooper <jason@lakedaemon.net>
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Gregory CLEMENT authored
The Armada 370 and Armada XP Socs have the same controller that the one used in the orion platforms. This patch updates the device tree for these SoCs. Signed-off-by:
Gregory CLEMENT <gregory.clement@free-electrons.com> Acked-by:
Andrew Lunn <andrew@lunn.ch> Tested-by:
Florian Fainelli <florian@openwrt.org> Acked-by:
Arnd Bergmann <arnd@arndb.de> Signed-off-by:
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Gregory CLEMENT authored
Some of the mvebu boards (mainly the development board) come with plug-in RAM modules. This patch allows to let the bootloaders which have no support for DTS to give the real amount of memory available on the board. Signed-off-by:
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Ezequiel Garcia authored
The Armada XP DB-MV784MP-GP board has an SPI flash device. These options allow to access that device over MTD. Signed-off-by:
Ezequiel Garcia <ezequiel.garcia@free-electrons.com> Signed-off-by:
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Ezequiel Garcia authored
Cc: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Cc: Lior Amsalem <alior@marvell.com> Acked-by:
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Gregory CLEMENT authored
This is the new Armada XP evaluation board from Marvell. It comes with a RS232 port over USB, a SATA link, an internal SSD, 4 Ethernet Gigabit links. Support for USB (Host and device), SDIO, PCIe will be added as drivers when they become available for Armada XP in mainline. Tested-by:
Simon Guinot <simon.guinot@sequanux.org> Tested-by:
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Gregory CLEMENT authored
Now that we have support for local timers, enable it by default Signed-off-by:
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Gregory CLEMENT authored
On the SOCs Armada 370 and Armada XP, each CPU comes with two private timers. This patch use the timer 0 of each CPU as local timer for the clockevent if CONFIG_LOCAL_TIMER is selected. In the other case, use only the private Timer 0 of CPU 0. Signed-off-by:
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Gregory CLEMENT authored
MPIC allows the use of private interrupt for each CPUs. The 28th first interrupts are per-cpu. This patch adds support to use them. Signed-off-by:
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Ezequiel Garcia authored
Cc: Lior Amsalem <alior@marvell.com> Cc: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Cc: Gregory CLEMENT <gregory.clement@free-electrons.com> Tested-by:
Nobuhiro Iwamatsu <iwamatsu@nigauri.org> Tested-by:
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Willy Tarreau authored
Add a device tree entry for the Guruplug Server Plus board. This port was based both on the work done on the dreamplug and the dockstar. It builds, boots and works on my Guruplug Server Plus. Signed-off-by:
Willy Tarreau <w@1wt.eu> Signed-off-by:
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Florian Fainelli authored
This patch adds the DTS file to support the Marvell RD-A370-A1 (Reference Design board) also known as RD-88F6710 board. It is almost entirely similar to the DB-A370 board except that the first Ethernet PHY is SGMII-wired and the second is a switch which is RGMII-wired. Signed-off-by:
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Gregory CLEMENT authored
This patch makes the interrupt controller driver more SMP aware for the Armada XP SoCs. It adds the support for the per-CPU irq. It also adds the implementation for the set_affinity hook. Patch initialy wrote by Yehuda Yitschak and reworked by Gregory CLEMENT. Signed-off-by:
Yehuda Yitschak <yehuday@marvell.com> Signed-off-by:
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Arnd Bergmann authored
In the beginning of DT for Dove it was reasonable to have it close to non-DT code. With improved DT support, it became more and more difficult to not break non-DT while changing DT code. This patch splits up DT board setup and introduces a DOVE_LEGACY config to allow to remove legacy code for DT-only kernels. Signed-off-by:
Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com> Signed-off-by:
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Olof Johansson authored
This refreshes the dove_defconfig, and adds: PRINTK_TIME DEVTMPFS EXT4 They're quite useful, and allows booting a cubox ubuntu rootfs on SD card, since that by default uses ext4. The rest of the churn is due to options and defaults moving around, no functional difference. Signed-off-by:
Olof Johansson <olof@lixom.net> Cc: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com> Signed-off-by:
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Andrew Lunn authored
Now that SDIO is instantiated via DT, and the SDIO DT node has a clocks property, we no longer need a C coded clock alias. Remove it. Signed-off-by:
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Andrew Lunn authored
Now that USB is instantiated via DT, and the USB DT node has a clocks property, we no longer need a C coded clock alias. Remove it. Signed-off-by:
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Thomas Petazzoni authored
The OpenBlocks AX3-4 platform has several LEDs, so it sounds wise to enable LED support in mvebu_defconfig. We anticipate that more platforms using Marvell EBU SoCs will have LEDs in the future. Signed-off-by:
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Thomas Petazzoni authored
The Globalscale Mirabox platform, based on the Armada 370 from Marvell, has a SD8787 Wireless/Bluetooth chip connected on the SDIO interface. Now that the mvsdio has a Device Tree binding, and the necessary Device Tree informations have been added at the SoC and board level, let's enable the btmrvl driver for the Bluetooth part of the SD8787 chip. For now, the driver gets probed correctly, detects the device but apparently fails to push the firmware to the device: Bluetooth: vendor=0x2df, device=0x911a, class=255, fn=2 Bluetooth: FW failed to be active in time! Bluetooth: Downloading firmware failed! Bluetooth: vendor=0x2df, device=0x911b, class=255, fn=3 Bluetooth: FW failed to be active in time! Bluetooth: Downloading firmware failed! This will have to be investigated separately. Signed-off-by:
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Thomas Petazzoni authored
The Globalscale Mirabox platform, based on the Armada 370 from Marvell, has a SD8787 Wireless chip connected on the SDIO interface. Now that the mvsdio has a Device Tree binding, and the necessary Device Tree informations have been added at the SoC and board level, let's enable the mwifiex driver for the Wireless part of the SD8787 chip. For now, the driver gets probed correctly, detects a device and shows the network interfaces. However, scanning Wifi networks doesn't work for now, with a 'CMD_RESP: cmd 0x6 error, result=0x1' message. This will have to be investigated separately. Signed-off-by:
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Thomas Petazzoni authored
Now that the mvsdio driver has gained Device Tree support and the necessary Device Tree informations has been added for Armada 370 and Armada XP platforms, we enable the MMC subsystem and the mvsdio driver in mvebu_defconfig. Signed-off-by:
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Gregory CLEMENT authored
The RTC class driver is already part of the mvebu_defconfig but the Marvell internal RTC not yet. Now that its support is added for mvebu let's update the config file. Signed-off-by:
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Arnd Bergmann authored
Basing the mvebu patches on top of the timer cleanup avoids some nasty merges. Signed-off-by: -
Arnd Bergmann authored
These patches from the mmc tree were merged into v3.9 already and the later mvebu patches depend on them. Signed-off-by:
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- 24 Feb, 2013 1 commit
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Thomas Petazzoni authored
On many Marvell SoCs, the pins used for the SDIO interface are part of the MPP pins, that are muxable pins. In order to get the muxing of those pins correct, this commit integrates the mvsdio driver with the pinctrl infrastructure by calling devm_pinctrl_get_select_default() during ->probe(). Note that we permit this function to fail because not all Marvell platforms have yet been fully converted to using the pinctrl infrastructure. Signed-off-by:
Stefan Peter <s.peter@mpl.ch> Tested-by:
Chris Ball <cjb@laptop.org>
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- 11 Feb, 2013 15 commits
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Thomas Petazzoni authored
This patch adds a simple Device Tree binding for the mvsdio driver, as well as the necessary documentation for it. Compatibility with non-DT platforms is preserved, by keeping the platform_data based initialization. We introduce a small difference between non-DT and DT platforms: DT platforms are required to provide a clocks = <...> property, which the driver uses to get the frequency of the clock that goes to the SDIO IP. The behaviour on non-DT platforms is kept unchanged: a clock reference is not mandatory, but the clock frequency must be passed in the "clock" field of the mvsdio_platform_data structure. Signed-off-by:
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Thomas Petazzoni authored
The MMC core subsystem provides in drivers/mmc/core/slot-gpio.c a nice set of helper functions to simplify the management of the card detect GPIO in MMC host drivers. This patch migrates the mvsdio driver to using those helpers, which will make the ->probe() code simpler, and therefore ease the process of adding a Device Tree binding for this driver. Signed-off-by:
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Thomas Petazzoni authored
The MMC core subsystem provides in drivers/mmc/core/slot-gpio.c a nice set of helper functions to simplify the management of the write protect GPIO in MMC host drivers. This patch migrates the mvsdio driver to using those helpers, which will make the ->probe() code simpler, and therefore ease the process of adding a Device Tree binding for this driver. Signed-off-by:
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Shawn Guo authored
With commit 9444e07 (mmc: remove unncessary mmc_gpio_free_cd() call from slot-gpio users) in place, the ESDHC_CD_GPIO handling in IO accessories becomes unnecessary. Remove it. Signed-off-by:
Shawn Guo <shawn.guo@linaro.org> Signed-off-by:
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Andy Shevchenko authored
There are three places where same piece of code is used. Let's split it to a separate function. Signed-off-by:
Andy Shevchenko <andriy.shevchenko@linux.intel.com> Signed-off-by:
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Kevin Liu authored
[cjb: The MMP3 architecture requires a registered interrupt to retire wfi when waking from suspend.] Signed-off-by:
Jialing Fu <jlfu@marvell.com> Signed-off-by:
Kevin Liu <kliu5@marvell.com> Signed-off-by:
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Kevin Liu authored
Don't disable SD Host IRQ during suspend if it is wake up source. Enable wakeup event during suspend. Signed-off-by:
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Kevin Liu authored
Current code missed disabling interrupts before free irq which is shared. Notice below comments for function free_irq (kernel/irq/manage.c): On a shared IRQ the caller must ensure the interrupt is disabled on the card it drives before calling this function. Original code has below issue during suspend/resume when multiple SD hosts share the same IRQ: 1. Assume there are two hosts (host1 for emmc while host2 for sd) share the same mmc irq. 2. When system suspend, host2 will be suspended before host1. So the sequence is below: step1: irq handler for host2 removed -> step2: irq handler for host1 removed and irq disabled -> ... system suspended ... ... system resumed ... step3: irq enabled and the irq handler for host1 restored -> step4: irq handler for host2 restored 3. So there is the buggy time slot that the irq is enabled but the irq handler for host2 is removed. Then host2 interrupt can be triggered but can't be handled at that moment. Signed-off-by:
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Stephen Warren authored
Add a very simple driver for the BCM2835 SoC, which is used in the Raspberry Pi board. Signed-off-by:
Stephen Warren <swarren@wwwdotorg.org> Signed-off-by:
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Konstantin Dorfman authored
When current request is running on the bus and if next request fetched by mmcqd is NULL, mmc context (mmcqd thread) gets blocked until the current request completes. This means that if new request comes in while the mmcqd thread is blocked, this new request can not be prepared in parallel to current ongoing request. This may result in delaying the new request execution and increase it's latency. This change allows to wake up the MMC thread on new request arrival. Now once the MMC thread is woken up, a new request can be fetched and prepared in parallel to the current running request which means this new request can be started immediately after the current running request completes. With this change read throughput is improved by 16%. Signed-off-by:
Konstantin Dorfman <kdorfman@codeaurora.org> Reviewed-by:
Seungwon Jeon <tgih.jun@samsung.com> Signed-off-by:
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Seungwon Jeon authored
Unlike normal r/w request, special requests(discard, flush) is finished with a one-time issue_fn. Request change to mqrq_prev makes unnecessary call. Signed-off-by:
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Guennadi Liakhovetski authored
The classical way to process IRQs is read out the status, ack all triggered IRQs, possibly mask them, then process them. Follow this simple procesure instead of the current complex custom algorithm. Signed-off-by:
Guennadi Liakhovetski <g.liakhovetski@gmx.de> Signed-off-by:
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Teppei Kamijou authored
Make error reporting in the driver more verbose. This patch is based on an earlier work by Teppei Kamijou, but we try to not add any new error messages to the log in the normal case to avoid confusing the user, and also add a few more dev_dbg() calls. Signed-off-by:
Teppei Kamijou <teppei.kamijou.yb@renesas.com> Signed-off-by:
Shinya Kuribayashi <shinya.kuribayashi.px@renesas.com> [g.liakhovetski@gmx.de: avoid producing new errors in normal case] Signed-off-by:
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Guennadi Liakhovetski authored
The INT_BUFWEN IRQ often arrives with other bits set too. If they are not cleared, an additional IRQ can be triggered, sometimes also after the MMC request has already been completed. This leads to block I/O errors. Earlier Teppei Kamijou also observed these additional interrupts and proposed to explicitly wait for them. This patch chooses an alternative approach of clearing all active bits immediately, when processing the main interrupt. Reported-by:
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Guennadi Liakhovetski authored
DMA completion can be signalled from the DMA callback and from the error handler. If both are called, the completion struct can enter an inconsistent state. To prevent this move completion initialisation immediately before activating DMA. Signed-off-by:
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