- 02 Jan, 2016 7 commits
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Wolfram Sang authored
These macros don't really hide complexity, but C idioms. Removing them makes the code easier to read IMO and make a planned extension easier. Acked-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
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Wolfram Sang authored
We need this binding because some I2C master drivers will need to adapt their PM settings for the arbitration circuitry. Acked-by: Geert Uytterhoeven <geert+renesas@glider.be> Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
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Sifan Naeem authored
In version 3.3 of the IP when transaction halt is set, an interrupt will be generated after each byte of a transfer instead of after every transfer but before the stop bit. Due to this behaviour we have to be careful that every time we release the transaction halt we have to re-enable it straight away so that we only process a single byte, not doing so will result in all remaining bytes been processed and a stop bit being issued, which will prevent us having a repeated start. This change will have no effect on earlier versions of the IP. Signed-off-by: Sifan Naeem <sifan.naeem@imgtec.com> Acked-by: James Hogan <james.hogan@imgtec.com> Reviewed-by: James Hartley <james.hartley@imgtec.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
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Sifan Naeem authored
Master halt is issued after each byte of a transaction is processed in IP version 3.3. Master halt will stall the bus by holding the SCK line low until the halt bit in the scb_general_control is cleared. After the last byte of a transfer is processed we can use the Master Halt interrupt to facilitate a repeated start transfer without issuing a stop bit. Signed-off-by: Sifan Naeem <sifan.naeem@imgtec.com> Reviewed-by: James Hartley <james.hartley@imgtec.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
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Sifan Naeem authored
Stop Detected interrupt is triggered when a Stop bit is detected on the bus, which indicates the end of the current transfer. When the end of a transfer is indicated by the Stop Detected interrupt, drain the FIFO and signal completion for the transaction. Signed-off-by: Sifan Naeem <sifan.naeem@imgtec.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
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Sifan Naeem authored
Now that we are using the transaction halt interrupt to safely control repeated start transfers, we no longer need to handle the fifo emptying interrupts. Handling this interrupt along with Transaction Halt interrupt can cause erratic behaviour. Signed-off-by: Sifan Naeem <sifan.naeem@imgtec.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
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Sifan Naeem authored
This commit adds support for the I2C_M_IGNORE_NAK protocol modification. Such behaviour can only be implemented in atomic mode. So, if a transaction contains a message with such flag the drivers switches to atomic mode. The implementation consists simply in treating NAKs as ACKs. Signed-off-by: Sifan Naeem <sifan.naeem@imgtec.com> Acked-by: James Hogan <james.hogan@imgtec.com> Reviewed-by: James Hartley <james.hartley@imgtec.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
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- 17 Dec, 2015 2 commits
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Wolfram Sang authored
This function used to be DT only, so it lived inside a CONFIG_OF block. Now it uses device attributes and must be moved outside of it. No further code changes, only one whitespace improvement. Reported-by: Jim Davis <jim.epost@gmail.com> Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Reviewed-by: Mika Westerberg <mika.westerberg@linux.intel.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
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Wolfram Sang authored
Until we have proper support to make I2C slave support fully optional, select it to prevent build errors on randconfigs. Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
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- 16 Dec, 2015 2 commits
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Måns Rullgård authored
The Sigma Designs variant of this controller has the ability to generate interrupts. This is controlled using two additional registers, oddly enough overlapping with the defined but unused HDSTATIM. This patch adds support for using this feature instead of busy-looping if an IRQ is specified. Signed-off-by: Mans Rullgard <mans@mansr.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
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Måns Rullgård authored
The BYTECNT register holds the transfer size minus one. Setting it to the correct value removes the need for a dummy read/write at the end of each transfer. As zero-length transfers are not supported, do not advertise I2C_FUNC_SMBUS_QUICK. In other words, this patch makes the driver transfer the number of bytes requested unless this is zero, which is not supported by the hardware and is thus refused. Signed-off-by: Mans Rullgard <mans@mansr.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
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- 15 Dec, 2015 1 commit
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Måns Rullgård authored
Sigma Designs chips use a variant of this controller with the following differences: - The BUSY bit in the STATUS register is inverted - Bit 8 of the CONFIG register must be set - The controller can generate interrupts This patch adds support for the first two of these. It also calculates and sets the correct clock divisor if a clk is provided. The bus frequency is optionally speficied in the device tree node. Signed-off-by: Mans Rullgard <mans@mansr.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
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- 14 Dec, 2015 9 commits
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Masahiro Yamada authored
There is code to divide by "bus_speed" some lines below. To eliminate the possibility of division by zero, bail out if "clock-frequency" is specified as zero. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
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Masahiro Yamada authored
This input clock is used to generate the sampling clock for I2C bus. If the clock rate is zero, there is something wrong with the clock driver. Bail out with the appropriate error message in such a case. It would make it easier to find the root cause of failure. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
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Masahiro Yamada authored
There is code to divide by "bus_speed" some lines below. To eliminate the possibility of division by zero, bail out if "clock-frequency" is specified as zero. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
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Masahiro Yamada authored
This input clock is used to generate the sampling clock for I2C bus. If the clock rate is zero, there is something wrong with the clock driver. Bail out with the appropriate error message in such a case. It would make it easier to find the root cause of failure. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
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Wolfram Sang authored
Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
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Wolfram Sang authored
Switch to the new generic functions. Plain convert, no functionality added yet. Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
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Wolfram Sang authored
The probe function is a little bit messy, something here, something there. Rework it so that there is some order: first init the private structure, then the adapter, then do HW init. This also allows us to remove the device argument of the clock calculation function, because it now can be deduced from the private structure. Also, shorten some lines where possible. This is a preparation for further refactoring. Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
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Wolfram Sang authored
Inspired from the i2c-rk3x driver (thanks guys!) but refactored and extended. See built-in docs for further information. Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Reviewed-by: Mika Westerberg <mika.westerberg@linux.intel.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
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Wolfram Sang authored
Also, sort the properties alphabetically and make indentation consistent. Wording largely taken from i2c-rk3x.txt, thanks guys! Only "i2c-scl-internal-delay-ns" is new, the rest is used by two drivers already and was documented in their driver binding documentation. Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
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- 05 Dec, 2015 1 commit
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Niklas Söderlund authored
Add I2C slave provider using the generic slave interface. Signed-off-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
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- 03 Dec, 2015 4 commits
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Paul Burton authored
Allow the eg20t I2C driver to be built for MIPS platforms, in preparation for use on the MIPS Boston board. Signed-off-by: Paul Burton <paul.burton@imgtec.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
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Paul Burton authored
Set the I2C adapter devices of_node to that of the PCI device, such that I2C clients may be instantiated via device tree. Signed-off-by: Paul Burton <paul.burton@imgtec.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
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Ludovic Desroches authored
The hold field allows to configure the data hold time which can be set with the help of the generic binding 'i2c-sda-hold-time-ns'. This feature has been introduced with SAMA5D4 SoC family. Signed-off-by: Ludovic Desroches <ludovic.desroches@atmel.com> Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com> Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
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Wolfram Sang authored
smatch rightfully says: drivers/i2c/busses/i2c-piix4.c:504 piix4_access warn: unused return: i = inb_p() drivers/i2c/busses/i2c-piix4.c:537 piix4_access warn: unused return: i = inb_p() Signed-off-by: Wolfram Sang <wsa@the-dreams.de> Tested-by: Christian Fetzer <fetzer.ch@gmail.com>
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- 01 Dec, 2015 1 commit
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Liguo Zhang authored
For platform with auto restart support, between every transfer, i2c controller will trigger an interrupt and SW need to handle it to start new transfer. When doing write-then-read transfer, instead of restart mechanism, using WRRD mode to have controller send both transfer in one request to reduce latency. Signed-off-by: Liguo Zhang <liguo.zhang@mediatek.com> Reviewed-by: Eddie Huang <eddie.huang@mediatek.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
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- 30 Nov, 2015 13 commits
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Shubhrajyoti Datta authored
The suspended flag is a flag holding the device's PM status. The runtime framework does that for us. Use pm_runtime_suspended call instead. Signed-off-by: Shubhrajyoti Datta <shubhrajyoti.datta@xilinx.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
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Shubhrajyoti Datta authored
Currently the clocks are enabled at probe and disabled at remove. Which keeps the clocks enabled even if no transaction is going on. This patch enables the clocks at the start of transfer and disables after it. Also adapts to runtime pm. converts dev pm to const to silence a checkpatch warning. Signed-off-by: Shubhrajyoti Datta <shubhrajyoti.datta@xilinx.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
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Nicola Corna authored
This patch adds a i2c_check_quirks helper function to check the quirk flags of an i2c adapter, in a similar way to i2c_check_functionality. Signed-off-by: Nicola Corna <nicola@corna.info> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
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Nicola Corna authored
As reported in the links given below. the BCM2835 has a hardware bug in its i2c module which prevents a correct clock stretching. This patch adds the I2C_AQ_NO_CLK_STRETCH quirk flag to i2c-bcm2835. Signed-off-by: Nicola Corna <nicola@corna.info> [wsa: put the links into the code as comments] Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
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Nicola Corna authored
Add I2C_AQ_NO_CLK_STRETCH to drivers/i2c/algos/i2c-algo-bit.c when getscl is not available. Signed-off-by: Nicola Corna <nicola@corna.info> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
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Nicola Corna authored
Add I2C_AQ_NO_CLK_STRETCH quirk flag, to be used when clock stretching is not supported. Signed-off-by: Nicola Corna <nicola@corna.info> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
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Lars-Peter Clausen authored
All protected sections are only called from sleep-able context, so there is no need to use a spinlock. Signed-off-by: Lars-Peter Clausen <lars@metafoo.de> Reviewed-by: Shubhrajyoti Datta <shubhraj@xilinx.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
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LABBE Corentin authored
The simple_strtoul function is marked as obsolete. This patch replace it by kstrtou8. Reviewed-by: Jean Delvare <jdelvare@suse.de> Tested-by: Jean Delvare <jdelvare@suse.de> Signed-off-by: LABBE Corentin <clabbe.montjoie@gmail.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
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Christian Fetzer authored
This patch adds support for port names for the SB800 chipset. Since the chipset supports a multiplexed main SMBus controller, adding the channel name to the adapter name is necessary to differentiate the ports better (for example in sensors output). Signed-off-by: Christian Fetzer <fetzer.ch@gmail.com> Reviewed-by: Mika Westerberg <mika.westerberg@linux.intel.com> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
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Christian Fetzer authored
The SB800 chipset supports a multiplexed main SMBus controller with four ports. The multiplexed ports share the same SMBus address and register set. The port is selected by bits 2:1 of the smb_en register (0x2C). Only one port can be active at any point in time therefore a mutex is needed in order to synchronize access. Additionally, the commit avoids requesting and releasing the SMBus base address index region on every multiplexed transfer by moving the request_region call into piix4_probe. Tested on HP ProLiant MicroServer G7 N54L (where this patch adds support to access sensor data from the w83795adg). Cc: Thomas Brandon <tbrandonau@gmail.com> Cc: Eddi De Pieri <eddi@depieri.net> Signed-off-by: Christian Fetzer <fetzer.ch@gmail.com> Reviewed-by: Mika Westerberg <mika.westerberg@linux.intel.com> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
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Christian Fetzer authored
The SB800 chipset supports a multiplexed main SMBus controller with four ports. Therefore the static variable piix4_main_adapter is converted into a piix4_main_adapters array that can hold one i2c_adapter for each multiplexed port. The auxiliary adapter remains unchanged since it represents the second (not multiplexed) SMBus controller on the SB800 chipset. Signed-off-by: Christian Fetzer <fetzer.ch@gmail.com> Reviewed-by: Mika Westerberg <mika.westerberg@linux.intel.com> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
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Wolfram Sang authored
Signed-off-by: Ryo Kataoka <ryo.kataoka.wt@renesas.com> Signed-off-by: Hiromitsu Yamasaki <hiromitsu.yamasaki.ym@renesas.com> Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
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Wolfram Sang authored
Update the comments to match current behaviour. Shorten some comments. Update copyrights. Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
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