- 01 Nov, 2022 3 commits
-
-
Yifan Zha authored
[Why] GRBM_CNTL is a PF_only register on gfx_v11. RLCG interface will return "out of range" under SRIOV VF. [How] Skip access GRBM_CNTL under gfx_v11 SRIOV VF. Signed-off-by:
Yifan Zha <Yifan.Zha@amd.com> Acked-by:
Alex Deucher <alexander.deucher@amd.com> Signed-off-by:
-
Gavin Wan authored
The recent change brought a bug on SRIOV envrionment. It caused unloading amdgpu failed on Guest VM. The reason is that the VF FLR was requested while unloading amdgpu driver, but the VF FLR of SRIOV sequence is wrong while removing PCI device. For SRIOV, the guest driver should not trigger the whole XGMI hive to do the reset. Host driver control how the device been reset. Fixes: f5c7e779 ("drm/amdgpu: Adjust removal control flow for smu v13_0_2") Acked-by:
Shaoyun Liu <Shaoyun.Liu@amd.com> Signed-off-by:
Gavin Wan <Gavin.Wan@amd.com> Signed-off-by:
-
Candice Li authored
v1: Support gfx ras feature enablement for gfx v11_0_3. v2: Update function name and error message. Signed-off-by:
Candice Li <candice.li@amd.com> Reviewed-by:
Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by:
-
- 27 Oct, 2022 37 commits
-
-
Jiapeng Chong authored
No functional modification involved. drivers/gpu/drm/amd/amdgpu/../display/dc/dc_dmub_srv.c:615: warning: expecting prototype for setup_subvp_dmub_command(). Prototype was for populate_subvp_cmd_pipe_info() instead. Link: https://bugzilla.openanolis.cn/show_bug.cgi?id=2587Reported-by:
Abaci Robot <abaci@linux.alibaba.com> Signed-off-by:
Jiapeng Chong <jiapeng.chong@linux.alibaba.com> Signed-off-by:
-
Jiapeng Chong authored
This symbol is not used outside of dc_link_dp.c, so marks it static. drivers/gpu/drm/amd/amdgpu/../display/dc/core/dc_link_dp.c:5230:16: warning: no previous prototype for function 'wake_up_aux_channel'. Link: https://bugzilla.openanolis.cn/show_bug.cgi?id=2581Reported-by:
-
Mukul Joshi authored
Cleanup kfd_dev struct by removing ddev and pdev as both drm_device and pci_dev can be fetched from amdgpu_device. Signed-off-by:
Mukul Joshi <mukul.joshi@amd.com> Tested-by:
Amber Lin <Amber.Lin@amd.com> Reviewed-by:
Felix Kuehling <Felix.Kuehling@amd.com> Acked-by:
Christian König <christian.koenig@amd.com> Signed-off-by:
-
Graham Sider authored
Temporary workaround to fix issues observed in some compute applications when GFXOFF is enabled on GFX11. Signed-off-by:
Graham Sider <Graham.Sider@amd.com> Acked-by:
Harish Kasiviswanathan <Harish.Kasiviswanathan@amd.com> Signed-off-by:
-
Mario Limonciello authored
If a system does not have swap and memory is under 100% usage, amdgpu will fail to evict resources. Currently the suspend carries on proceeding to reset the GPU: ``` [drm] evicting device resources failed [drm:amdgpu_device_ip_suspend_phase2 [amdgpu]] *ERROR* suspend of IP block <vcn_v3_0> failed -12 [drm] free PSP TMR buffer [TTM] Failed allocating page table [drm] evicting device resources failed amdgpu 0000:03:00.0: amdgpu: MODE1 reset amdgpu 0000:03:00.0: amdgpu: GPU mode1 reset amdgpu 0000:03:00.0: amdgpu: GPU smu mode1 reset ``` At this point if the suspend actually succeeded I think that amdgpu would have recovered because the GPU would have power cut off and restored. However the kernel fails to continue the suspend from the memory pressure and amdgpu fails to run the "resume" from the aborted suspend. ``` ACPI: PM: Preparing to enter system sleep state S3 SLUB: Unable to allocate memory on node -1, gfp=0xdc0(GFP_KERNEL|__GFP_ZERO) cache: Acpi-State, object size: 80, buffer size: 80, default order: 0, min order: 0 node 0: slabs: 22, objs: 1122, free: 0 ACPI Error: AE_NO_MEMORY, Could not update object reference count (20210730/utdelete-651) [drm:psp_hw_start [amdgpu]] *ERROR* PSP load kdb failed! [drm:psp_resume [amdgpu]] *ERROR* PSP resume failed [drm:amdgpu_device_fw_loading [amdgpu]] *ERROR* resume of IP block <psp> failed -62 amdgpu 0000:03:00.0: amdgpu: amdgpu_device_ip_resume failed (-62). PM: dpm_run_callback(): pci_pm_resume+0x0/0x100 returns -62 amdgpu 0000:03:00.0: PM: failed to resume async: error -62 ``` To avoid this series of unfortunate events, fail amdgpu's suspend when the memory eviction fails. This will let the system gracefully recover and the user can try suspend again when the memory pressure is relieved. Reported-by: post@davidak.de Link: https://gitlab.freedesktop.org/drm/amd/-/issues/2223Signed-off-by:
Mario Limonciello <mario.limonciello@amd.com> Reviewed-by:
-
Hamza Mahfooz authored
This reverts commit 55eea8ef. This quirk is now handled in the DRM core, so we can drop all of the internal code that was added to handle it. Reviewed-by:
Harry Wentland <harry.wentland@amd.com> Signed-off-by:
Hamza Mahfooz <hamza.mahfooz@amd.com> Signed-off-by:
-
Hamza Mahfooz authored
Since, the quirk is handled in the DRM core now, we can use that value instead of the internal value. Reviewed-by:
-
Hamza Mahfooz authored
The LG 27GP950 and LG 27GN950 have visible display corruption when trying to use 10bpc modes. So, to fix this, cap their maximum DSC target bitrate to 15bpp. Suggested-by:
Roman Li <roman.li@amd.com> Reviewed-by:
-
Candice Li authored
1. Update EEPROM_I2C_MADDR_SMU_13_0_0 to EEPROM_I2C_MADDR_54H 2. Add EEPROM I2C address support for smu v13_0_0 and v13_0_10. Signed-off-by:
Tao Zhou <tao.zhou1@amd.com> Signed-off-by:
-
Candice Li authored
Enable RAS EEPROM support for smu v13_0_0 and v13_0_10. Signed-off-by:
-
Candice Li authored
1. Add a function pointer structure ta_funcs to psp context 2. Make the interfaces generic to all TAs 3. Leverage exisitng TA context and remove unused functions 4. Fix return code bugs v2: Add comments for ta funcs macros and correct typo Reviewed-by:
-
Candice Li authored
1. Save TA unload psp response status 2. Add RAS TA loading status check for initializaiton 3. Drop RAS context teardown to allow RAS TA to be reloaded Reviewed-by:
-
Yang Li authored
./drivers/gpu/drm/amd/amdkfd/kfd_migrate.c:985:58-62: ERROR: p is NULL but dereferenced. Link: https://bugzilla.openanolis.cn/show_bug.cgi?id=2549Reported-by:
Yang Li <yang.lee@linux.alibaba.com> Reviewed-by:
-
gehao authored
In dce6(0,1,4)_create_resource_pool and dce80_create_resource_pool the allocated memory should be released if construct pool fails. Reviewed-by:
Rodrigo Siqueira <Rodrigo.Siqueira@amd.com> Signed-off-by:
gehao <gehao@kylinos.cn> Signed-off-by:
-
Ao Zhong authored
pipes[pipe_cnt].pipe.src.dcc_fraction_of_zs_req_luma = 0; pipes[pipe_cnt].pipe.src.dcc_fraction_of_zs_req_chroma = 0; these two operations in dcn32/dcn32_resource.c still need to use FPU, This will cause compilation to fail on ARM64 platforms because -mgeneral-regs-only is enabled by default to disable the hardware FPU. Therefore, imitate the dcn31_zero_pipe_dcc_fraction function in dml/dcn31/dcn31_fpu.c, declare the dcn32_zero_pipe_dcc_fraction function in dcn32_fpu.c, and move above two operations into this function. Reviewed-by:
Ao Zhong <hacc1225@gmail.com> Signed-off-by:
-
Ao Zhong authored
In the process of enabling DCN support for arm64, I found that the dcn10_resource_construct_fp function in dcn10/dcn10_resource.c still needs to use FPU. This will cause compilation to fail on ARM64 platforms because -mgeneral-regs-only is enabled by default to disable the hardware FPU. So move dcn10_resource_construct_fp from dcn10 folder to dml/dcn10 folder to enable hardware FPU for that function. Reviewed-by:
-
Graham Sider authored
MES scheduler and kiq versions are stored in mes.sched_version and mes.kiq_version, respectively, which are read from a register after their queues are initialized. Remove mes.ucode_fw_version and mes.data_fw_version which tried to read this versioning info from the firmware headers (which don't contain this information). Signed-off-by:
Jack Xiao <Jack.Xiao@amd.com> Signed-off-by:
-
Graham Sider authored
Use mes.sched_version, mes.kiq_version for debugfs as mes.ucode_fw_version does not contain correct versioning information. Signed-off-by:
-
Alan Liu authored
[Why] Before we call psp_securedisplay_invoke(), we call psp_prep_securedisplay_cmd_buf() to prepare and initialize the command buffer. However, we didn't use the mutex_lock to protect the status of command buffer. So when multiple threads are using the command buffer, after thread A return from psp_securedisplay_invoke() and the command buffer status is set to SUCCESS, another thread B may call psp_prep_securedisplay_cmd_buf() and initialize the status to FAILURE again, and cause Thread A to get a failure return status. [How] Move the mutex_lock out of psp_securedisplay_invoke() to its caller to cover psp_prep_securedisplay_cmd_buf() and the code checking the return status of command buffer. Signed-off-by:
Alan Liu <HaoPing.Liu@amd.com> Reviewed-by:
-
Tao Zhou authored
Make the code simpler. Signed-off-by:
-
Tao Zhou authored
For MCA poison, if unmap queue fails, only gpu reset should be triggered without page retirement handling, MCA notifier will do it. v2: handle MCA poison consumption in umc_poison_handler directly. Signed-off-by:
-
Tao Zhou authored
Make the code more readable. Signed-off-by:
-
Tao Zhou authored
Define page retirement functions for MCA platform. v2: remove page retirement handling from MCA poison handler, let MCA notifier do page retirement. v3: remove specific poison handler for MCA to simplify code. Signed-off-by: -
Paulo Miguel Almeida authored
struct cdit_header was never used across any of the amd drivers nor this is exposed to UAPI so it can be removed. This patch removes struct cdit_header and refactor code accordingly Signed-off-by:
Paulo Miguel Almeida <paulo.miguel.almeida.rodenas@gmail.com> Reviewed-by:
-
Paulo Miguel Almeida authored
kfd_pm4_headers_diq.h header is a leftover from the old H/W debugger module support added on commit fbeb661b ("drm/amdkfd: Add skeleton H/W debugger module support"). That implementation was removed after a while and the last file that included that header was removed on commit 5bdd3eb2 ("drm/amdkfd: Remove unused old debugger implementation"). This patch removes the unused header file kfd_pm4_headers_diq.h Signed-off-by:
-
Fangzhi Zuo authored
[Why] Invalidate unsupported 420 modes on HDMI TMDS. HDMI TMDS does not support ODM. Any modes that are horizontally wider than 4096, cannot be supported via TMDS. So they must be filtered out and should not pass validation. [How] Create fake plane for the new stream, and validate global state by going through dml validation routine. Tested-by:
Mark Broadworth <mark.broadworth@amd.com> Acked-by:
Fangzhi Zuo <Jerry.Zuo@amd.com> Signed-off-by:
-
Rodrigo Siqueira authored
The file dc.c has multiple comments that do not follow the kernel-doc or are made in a distracting way. This commit alleviates part of this issue by reorganizing some comments inside the dc file. Signed-off-by:
-
Aric Cyr authored
DC version 3.2.209 brings along the following: * Improve color manipulation * Add corrections to DML and some flag configuration * Updates for DCN32x * Expand kernel-doc Tested-by:
Aric Cyr <Aric.Cyr@amd.com> Signed-off-by:
-
Yifan Zhang authored
This patch to fix the gdm3 start failure with virual display: /usr/libexec/gdm-x-session[1711]: (II) AMDGPU(0): Setting screen physical size to 270 x 203 /usr/libexec/gdm-x-session[1711]: (EE) AMDGPU(0): Failed to make import prime FD as pixmap: 22 /usr/libexec/gdm-x-session[1711]: (EE) AMDGPU(0): failed to set mode: Invalid argument /usr/libexec/gdm-x-session[1711]: (WW) AMDGPU(0): Failed to set mode on CRTC 0 /usr/libexec/gdm-x-session[1711]: (EE) AMDGPU(0): Failed to enable any CRTC gnome-shell[1840]: Running GNOME Shell (using mutter 42.2) as a X11 window and compositing manager /usr/libexec/gdm-x-session[1711]: (EE) AMDGPU(0): failed to set mode: Invalid argument vkms doesn't have modifiers support, set fb_modifiers_not_supported to bring the gdm back. Signed-off-by:
Yifan Zhang <yifan1.zhang@amd.com> Acked-by:
Guchun Chen <guchun.chen@amd.com> Reviewed-by:
Tim Huang <Tim.Huang@amd.com> Signed-off-by:
-
Rodrigo Siqueira authored
Add basic kernel-doc that describes some of the struct and functions that are part of the DC commit sequence.. Tested-by:
Aurabindo Pillai <Aurabindo.Pillai@amd.com> Acked-by:
-
Rodrigo Siqueira authored
Add kernel-doc to some important elements from DC struct that might help to understand DC sequence. Tested-by:
-
Rodrigo Siqueira authored
Add kernel-doc to some of the ODM-related functions. Tested-by:
-
Rodrigo Siqueira authored
Add a kernel-doc to the DE-Tile function hook. Tested-by:
-
Rodrigo Siqueira authored
This commit adds extra documentation for elements related to FAMs. Tested-by:
-
Ma Hanghong authored
[Why] For FreeSync HDR, native color space flag in AMD VSIF(BT.709) should be used when intepreting content and color space flag in VSC or AVI infoFrame should be ignored. However, it turned out some userspace application still use color flag in VSC or AVI infoFrame which is incorrect. [How] Transfer function is used when building the VSC and AVI infoFrame. Set colorimetry to BT.709 when all the following match: 1. Pixel format is YCbCr; 2. In FreeSync 2 HDR, color is COLOR_SPACE_2020_YCBCR; 3. Transfer function is TRANSFER_FUNC_GAMMA_22; Tested-by:
Krunoslav Kovac <Krunoslav.Kovac@amd.com> Acked-by:
Ma Hanghong <hanghong.ma@amd.com> Signed-off-by:
-
zhikzhai authored
[WHY] Now dynamic ODM will now be disabled when MPO is required safe transitions to avoid underflow, but we are triggering the way of minimal transition too often. Commit state of dc with no check will do pipeline setup which may re-initialize the component with no need such as audio. [HOW] Just do the minimal transition when all of pipes are in use, otherwise return true to skip. Tested-by:
Dillon Varone <Dillon.Varone@amd.com> Acked-by:
zhikzhai <zhikai.zhai@amd.com> Signed-off-by:
-
Haiyi Zhou authored
[WHY] Skipping vblank during global sync update request can result in underflow on certain displays. [HOW] Roll back to the previous behavior where DC waits for vblank during pipe programming. Fixes: 5d3e1442 ("drm/amd/display: do not wait for vblank during pipe programming") Tested-by:
Martin Leung <Martin.Leung@amd.com> Acked-by:
Haiyi Zhou <Haiyi.Zhou@amd.com> Signed-off-by:
-
